diff options
64 files changed, 2496 insertions, 559 deletions
@@ -0,0 +1,40 @@ +This NOTICE file contains certain notices of software components included +with the software that Qualcomm Technologies, Inc. ("Qualcomm Technologies") is required to +provide you. Notwithstanding anything in the notices in this file, your use +of these software components together with the Qualcomm Technologies software (Qualcomm Technologies +software hereinafter referred to as "Software") is subject to the terms of +your license from Qualcomm Technologies. Compliance with all copyright laws and software +license agreements included in the notice section of this file are the +responsibility of the user. Except as may be granted by separate express +written agreement, this file provides no license to any patents, +trademarks, copyrights, or other intellectual property. + +Copyright (c) 2021 Qualcomm Technologies, Inc. All rights reserved. +Qualcomm is a registered trademark and registered service mark of +QUALCOMM Incorporated. All other trademarks and service marks are the +property of their respective owners. +________________________________________ +NOTICES +________________________________________ +/* + * Copyright (C) 2008 Shanghai awinic technology co.,ltd. All rights reserved. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be + * included in all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS + * IN THE SOFTWARE. + */ diff --git a/bindings/clock/qcom,debugcc.txt b/bindings/clock/qcom,debugcc.txt index 59b99da2..67a6f450 100644 --- a/bindings/clock/qcom,debugcc.txt +++ b/bindings/clock/qcom,debugcc.txt @@ -5,9 +5,9 @@ Required properties : - compatible: Shall contain "qcom,kona-debugcc", "qcom,lito-debugcc", "qcom,bengal-debugcc", "qcom,lagoon-debugcc" "qcom,sdm660-debugcc" "qcom,sdm429w-debugcc" - "qcom,msm8937-debugcc" "qcom,msm8917-debugcc" - "qcom,sdm429w-debugcc", "qcom,qm215-debugcc" - or "qcom,sdm450-debugcc", "qcom,khaje-debugcc". + "qcom,sdm439-debugcc", "qcom,sdm429-debugcc" + "qcom,qm215-debugcc" or "qcom,khaje-debugcc". + - qcom,gcc: phandle to the GCC device node. - qcom,videocc: phandle to the Video CC device node. - qcom,camcc: phandle to the Camera CC device node. diff --git a/bindings/gpu/adreno.txt b/bindings/gpu/adreno.txt index 390b44c4..0858c6c0 100644 --- a/bindings/gpu/adreno.txt +++ b/bindings/gpu/adreno.txt @@ -140,6 +140,19 @@ Optional Properties: mask - mask for the relevant bits in the efuse register. shift - number of bits to right shift to get the speed bin value. + +- qcom,gpu-speed-bin-vectors: + GPU speed bin vectors property is the series of all the vectors + in format specified below. Values from individual fuses are read, + masked and shifted to form a value. At the end all fuse values + are ordered together to form final speed bin value. + <offset mask shift> + <offset mask shift> + < .. .. .. > + offset - offset of the efuse register from the base. + mask - mask for the relevant bits in the efuse register. + shift - number of bits to right shift. + - qcom,gpu-disable-fuse: GPU disable fuse <offset mask shift> offset - offset of the efuse register from the base. diff --git a/bindings/leds/leds-aw2016.txt b/bindings/leds/leds-aw2016.txt new file mode 100644 index 00000000..de2c921c --- /dev/null +++ b/bindings/leds/leds-aw2016.txt @@ -0,0 +1,136 @@ +/* + * Copyright (C) 2008 Shanghai awinic technology co.,ltd. All rights reserved. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be + * included in all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS + * IN THE SOFTWARE. + */ + +Awinic. AW2016 LED + +AW2016 LED device supports 3 LED channels and the driver +register each channel as a single LED class device and +exports interfaces to update brightness, set timer trigger +and enable HW based blink functionalities. + +- compatible + Usage: required + Value type: <string> + Definition: Must be "awinic,aw2016_led" + +- reg + Usage: required + Value type: <u32> + Definition: The 7-bit I2C address for AW2016 chip. + +Properties for child properties: +- awinic,name + Usage: required + Value type: <string> + Definition: Name of the LED which will be register as the LED class + device name. + +- awinic,id + Usage: required + Value type: <u32> + Definition: It represents the LED hardware channel index. The valid + values are: 0, 1, 2. + +- awinic,imax + Usage: required + Value type: <u32> + Definition: The setting of the maximum current for the given LED channel, + the valid values are: 0, 1, 2, 3, and the corresponding current + setting are: 15mA, 30mA, 5mA, 10mA. + +- awinic,led-current + Usage: required + Value type: <u32> + Definition: The setting of the current when the LED channel is enabled. + +- awinic,max-brightness + Usage: required + Value type: <u32> + Definition: The maximum brightness value for the LED class device. + +- awinic,rise-time-ms + Usage: required + Value type <u32> + Definition: The duration of the led ramping from 0 to maximum brightness + when breath function is enabled. + +- awinic,hold-time-ms + Usage: required + Value type: <u32> + Definition: The duration of the led staying at the maximum brightness + when breath function is enabled. + +- awinic,fall-time-ms + Usage: required + Value type: <u32> + Definition: The duration of the led ramping down from maximum brightness + to 0 when breath function is enabled. + +- awinic,off-time-ms + Usage: required + Value type: <u32> + Definition: The duration of the led staying at 0 brightness when breath + function is enabled. + +Example: + awinic@64 { + compatible = "awinic,aw2016_led"; + reg = <0x64>; + + awinic,red { + awinic,name = "red"; + awinic,id = <0>; + awinic,imax = <2>; + awinic,led-current = <3>; + awinic,max-brightness = <255>; + awinic,rise-time-ms = <6>; + awinic,hold-time-ms = <0>; + awinic,fall-time-ms = <6>; + awinic,off-time-ms = <4>; + }; + + awinic,green { + awinic,name = "green"; + awinic,id = <1>; + awinic,imax = <2>; + awinic,led-current = <3>; + awinic,max-brightness = <255>; + awinic,rise-time-ms = <6>; + awinic,hold-time-ms = <0>; + awinic,fall-time-ms = <6>; + awinic,off-time-ms = <4>; + }; + + awinic,blue { + awinic,name = "blue"; + awinic,id = <2>; + awinic,imax = <2>; + awinic,led-current = <3>; + awinic,max-brightness = <255>; + awinic,rise-time-ms = <6>; + awinic,hold-time-ms = <0>; + awinic,fall-time-ms = <6>; + awinic,off-time-ms = <4>; + }; + }; + diff --git a/bindings/sound/qcom-audio-dev.txt b/bindings/sound/qcom-audio-dev.txt index 9875cb2c..e28521a5 100644 --- a/bindings/sound/qcom-audio-dev.txt +++ b/bindings/sound/qcom-audio-dev.txt @@ -1873,6 +1873,7 @@ Optional properties: - qcom,rxtx-bolero-codec: Property to specify RX-TX macros supported. - qcom,wsa-bolero-codec: Property to specify WSA macro supported. - qcom,tdm-audio-intf: Property to specify if Aux PCM interface is used for the target +- qcom,wcd-datalane-mismatch: Property to specify if wcd datalane mismatch. Example: bengal_snd: sound { @@ -1885,6 +1886,7 @@ Example: qcom,va-bolero-codec = <1>; qcom,rxtx-bolero-codec = <1>; qcom,tdm-audio-intf = <1>; + qcom,wcd-datalane-mismatch = <1>; asoc-platform = <&pcm0>, <&pcm1>, <&pcm2>, <&voip>, <&voice>, <&loopback>, <&compress>, <&hostless>, diff --git a/bindings/thermal/qcom,rpm-smd-cdev.txt b/bindings/thermal/qcom,rpm-smd-cdev.txt new file mode 100644 index 00000000..0a5da03c --- /dev/null +++ b/bindings/thermal/qcom,rpm-smd-cdev.txt @@ -0,0 +1,27 @@ +Qualcomm Technologies, Inc. RPM SMD cooling device + +The RPM shared memory(SMD) cooling device, will be used to set +different thermal band level to RPM hardware. When threshold violation +occurs, RPM SMD cooling device sends pre-configured thermal band level +to RPM hardware via SMD. + +Required Parameters: +- compatible: + Usage: required + Value type: <string> + Definition: should be "qcom,rpm-smd-cooling-device" + +- #cooling-cells: + Usage: required + Value type: <integer> + Definition: Must be 2. This is required by of-thermal and refer the doc + <devicetree/bindings/thermal/thermal.txt> for more details. + +Example: + +&rpm_bus { + rpm_smd_cdev: rpm-smd-cdev { + compatible = "qcom,rpm-smd-cooling-device"; + #cooling-cells = <2>; + }; +}; diff --git a/bindings/vendor-prefixes.txt b/bindings/vendor-prefixes.txt index e2f0ec8a..a9ca78a7 100644 --- a/bindings/vendor-prefixes.txt +++ b/bindings/vendor-prefixes.txt @@ -52,6 +52,7 @@ avago Avago Technologies avia avia semiconductor avic Shanghai AVIC Optoelectronics Co., Ltd. avnet Avnet, Inc. +awinic Shanghai Awinic Electronic Technology Co., LTD. axentia Axentia Technologies AB axis Axis Communications AB bananapi BIPAI KEJI LIMITED diff --git a/qcom/Makefile b/qcom/Makefile index e12f05a9..d31e4dda 100644 --- a/qcom/Makefile +++ b/qcom/Makefile @@ -8,8 +8,9 @@ ifeq ($(CONFIG_BUILD_ARM64_DT_OVERLAY),y) kona-xr-overlay.dtbo \ kona-rumi-overlay.dtbo \ kona-qrd-overlay.dtbo \ - kona-xrfusion-overlay.dtbo \ - kona-xrfusion-ult-overlay.dtbo \ + kona-xrfusion-overlay.dtbo \ + kona-xrfusion-ult-overlay.dtbo \ + kona-arglass-overlay.dtbo \ kona-hdk-overlay.dtbo kona-cdp-overlay.dtbo-base := kona.dtb kona-v2.dtb kona-v2.1.dtb @@ -22,6 +23,7 @@ kona-rumi-overlay.dtbo-base := kona.dtb kona-v2.dtb kona-v2.1.dtb kona-qrd-overlay.dtbo-base := kona.dtb kona-v2.dtb kona-v2.1.dtb kona-xrfusion-overlay.dtbo-base := kona.dtb kona-v2.dtb kona-v2.1.dtb kona-xrfusion-ult-overlay.dtbo-base := kona.dtb kona-v2.dtb kona-v2.1.dtb +kona-arglass-overlay.dtbo-base := kona.dtb kona-v2.dtb kona-v2.1.dtb kona-hdk-overlay.dtbo-base := kona.dtb kona-v2.dtb kona-v2.1.dtb else dtb-$(CONFIG_ARCH_KONA) += kona-rumi.dtb \ @@ -29,8 +31,9 @@ dtb-$(CONFIG_ARCH_KONA) += kona-rumi.dtb \ kona-mtp-ws.dtb \ kona-mtp-sa.dtb \ kona-xr.dtb \ - kona-xrfusion.dtb \ - kona-xrfusion-ult.dtb \ + kona-xrfusion.dtb \ + kona-xrfusion-ult.dtb \ + kona-arglass.dtb \ kona-cdp.dtb \ kona-cdp-lcd.dtb \ kona-qrd.dtb \ @@ -40,8 +43,9 @@ dtb-$(CONFIG_ARCH_KONA) += kona-rumi.dtb \ kona-v2-mtp-sa.dtb \ kona-v2-cdp.dtb \ kona-v2-qrd.dtb \ - kona-v2-xrfusion.dtb \ - kona-v2-xrfusion-ult.dtb \ + kona-v2-xrfusion.dtb \ + kona-v2-xrfusion-ult.dtb \ + kona-v2-arglass.dtb \ kona-hdk.dtb \ kona-v2.1-mtp.dtb \ kona-v2.1-mtp-ws.dtb \ @@ -49,8 +53,9 @@ dtb-$(CONFIG_ARCH_KONA) += kona-rumi.dtb \ kona-v2.1-cdp.dtb \ kona-v2.1-qrd.dtb \ kona-v2.1-hdk.dtb \ - kona-v2.1-xrfusion.dtb \ - kona-v2.1-xrfusion-ult.dtb \ + kona-v2.1-xrfusion.dtb \ + kona-v2.1-xrfusion-ult.dtb \ + kona-v2.1-arglass.dtb \ qrb5165-iot-rb5.dtb \ kona-v2.1-iot-rb5.dtb endif @@ -232,21 +237,30 @@ ifeq ($(CONFIG_BUILD_ARM64_DT_OVERLAY),y) dtbo-$(CONFIG_ARCH_KHAJE) += \ khaje-idp-overlay.dtbo \ khaje-qrd-overlay.dtbo \ + khaje-qrd-hvdcp3p5-overlay.dtbo \ + khaje-qrd-wcd9368-overlay.dtbo \ khaje-idp-nopmi-overlay.dtbo \ + khaje-idp-usbc-overlay.dtbo \ khaje-qrd-nopmi-overlay.dtbo \ khaje-idps-display-90hz-overlay.dtbo \ khaje-atp-overlay.dtbo khaje-idp-overlay.dtbo-base := khaje.dtb khaje-qrd-overlay.dtbo-base := khaje.dtb +khaje-qrd-hvdcp3p5-overlay.dtbo-base := khaje.dtb +khaje-qrd-wcd9368-overlay.dtbo-base := khaje.dtb khaje-idp-nopmi-overlay.dtbo-base := khaje.dtb +khaje-idp-usbc-overlay.dtbo-base := khaje.dtb khaje-qrd-nopmi-overlay.dtbo-base := khaje.dtb khaje-idps-display-90hz-overlay.dtbo-base := khaje.dtb khaje-atp-overlay.dtbo-base := khaje.dtb else dtb-$(CONFIG_ARCH_KHAJE) += khaje-idp.dtb \ khaje-qrd.dtb \ + khaje-qrd-hvdcp3p5.dtb \ + khaje-qrd-wcd9368.dtb \ khaje-idp-nopmi.dtb \ + khaje-idp-usbc.dtb \ khaje-qrd-nopmi.dtb \ khaje-idps-display-90hz.dtb \ khaje-atp.dtb diff --git a/qcom/dsi-panel-arglass-seeya-dual-1080p-video.dtsi b/qcom/dsi-panel-arglass-seeya-dual-1080p-video.dtsi new file mode 100644 index 00000000..4525814b --- /dev/null +++ b/qcom/dsi-panel-arglass-seeya-dual-1080p-video.dtsi @@ -0,0 +1,100 @@ +&mdss_mdp { + dsi_dual_arglass_seeya_video: qcom,mdss_dsi_arglass_seeya_video { + qcom,mdss-dsi-panel-name = + "sy049wdm02 uoled video mode dsi seeya panel with DSC"; + qcom,mdss-dsi-panel-type = "dsi_video_mode"; + qcom,dsi-ctrl-num = <0 1>; + qcom,dsi-phy-num = <0 1>; + + qcom,mdss-dsi-virtual-channel-id = <0>; + qcom,mdss-dsi-stream = <0>; + qcom,mdss-dsi-bpp = <24>; + qcom,mdss-dsi-border-color = <0>; + qcom,mdss-dsi-traffic-mode = "non_burst_sync_event"; + qcom,mdss-dsi-bllp-eof-power-mode; + qcom,mdss-dsi-bllp-power-mode; + qcom,mdss-dsi-lane-0-state; + qcom,mdss-dsi-lane-1-state; + qcom,mdss-dsi-lane-2-state; + qcom,mdss-dsi-lane-3-state; + qcom,mdss-dsi-dma-trigger = "trigger_sw"; + qcom,mdss-dsi-mdp-trigger = "none"; + qcom,mdss-dsi-reset-sequence = <1 20>, <0 20>, <1 50>; + qcom,adjust-timer-wakeup-ms = <1>; + qcom,mdss-dsi-panel-hdr-enabled; + qcom,mdss-dsi-panel-hdr-color-primaries = <14500 15500 32000 + 17000 15500 30000 8000 3000>; + qcom,mdss-dsi-panel-peak-brightness = <4200000>; + qcom,mdss-dsi-panel-blackness-level = <3230>; + + qcom,mdss-dsi-display-timings { + timing@0 { + qcom,mdss-dsi-panel-width = <1920>; + qcom,mdss-dsi-panel-height = <1080>; + qcom,mdss-dsi-h-front-porch = <88>; + qcom,mdss-dsi-h-back-porch = <148>; + qcom,mdss-dsi-h-pulse-width = <44>; + qcom,mdss-dsi-h-sync-skew = <0>; + qcom,mdss-dsi-v-back-porch = <36>; + qcom,mdss-dsi-v-front-porch = <5>; + qcom,mdss-dsi-v-pulse-width = <5>; + qcom,mdss-dsi-h-left-border = <0>; + qcom,mdss-dsi-panel-framerate = <60>; + qcom,mdss-dsi-on-command = [ + 39 01 00 00 00 00 02 53 29 + 39 01 00 00 00 00 03 51 FF 01 + 39 01 00 00 00 00 02 03 00 + 39 01 00 00 00 00 07 80 00 E0 E0 0E 00 31 + 39 01 00 00 00 00 08 81 03 04 00 29 00 05 00 + 39 01 00 00 00 00 08 82 03 04 00 29 00 05 01 + 39 01 00 00 00 00 02 35 00 + 39 01 00 00 00 00 02 26 20 + /* CMD2 P1 */ + 39 01 00 00 00 00 03 F0 AA 11 + 39 01 00 00 00 00 02 C0 00 + 39 01 00 00 00 00 0C C2 03 FF 03 FF 03 FF 03 FF 82 00 00 + /* CMD2 P2 */ + 39 01 00 00 00 00 03 F0 AA 12 + 39 01 00 00 00 00 03 BF 37 A9 + /* H mirror dsi1 */ + 39 01 00 00 00 00 03 FF 5A 80 + 39 01 00 00 00 00 02 65 2F + 39 01 00 00 00 00 02 F2 01 + 39 01 00 00 00 00 02 36 02 + /* V mirror dsi0 */ + 39 01 00 04 00 00 03 FF 5A 80 + 39 01 00 04 00 00 02 65 2F + 39 01 00 04 00 00 02 F2 01 + 39 01 00 04 00 00 02 36 01 + 39 01 00 04 00 00 03 F0 AA 13 + 39 01 00 04 00 00 02 65 01 + 39 01 00 04 00 00 02 C1 A2 + 39 01 00 04 00 00 07 C4 12 53 64 31 42 56 + 39 01 00 04 00 00 03 F0 AA 16 + 39 01 00 04 00 00 07 B6 12 53 64 31 42 56 + 39 01 00 04 00 00 03 B0 00 55 + /* CMD3 P0 */ + 39 01 00 00 00 00 03 FF 5A 80 + 39 01 00 00 00 00 02 65 2F + 39 01 00 00 00 00 02 F2 01 + /* CMD3 P1 */ + 39 01 00 00 00 00 03 FF 5A 81 + 39 01 00 00 00 00 02 65 05 + 39 01 00 00 00 00 02 F2 22 + 39 01 00 00 00 00 02 65 0A + 39 01 00 00 00 00 02 F2 00 + 39 01 00 00 00 00 02 65 16 + 39 01 00 00 00 00 0F F9 01 5F 61 64 67 6A 6D 6F 75 7B 80 86 8B 91 + 05 01 00 00 cb 00 02 11 00 + 05 01 00 00 00 00 02 29 00 + 39 01 00 00 00 00 03 F0 AA 11 + ]; + qcom,mdss-dsi-off-command = [05 01 00 00 0a 00 + 02 28 00 05 01 00 00 3c 00 02 10 00]; + + qcom,mdss-dsi-on-command-state = "dsi_lp_mode"; + qcom,mdss-dsi-off-command-state = "dsi_hs_mode"; + }; + }; + }; +}; diff --git a/qcom/khaje-atp-overlay.dts b/qcom/khaje-atp-overlay.dts index 7fe1e405..bc5789fc 100644 --- a/qcom/khaje-atp-overlay.dts +++ b/qcom/khaje-atp-overlay.dts @@ -9,5 +9,6 @@ compatible = "qcom,khaje-atp", "qcom,khaje", "qcom,atp"; qcom,msm-id = <518 0x10000>; qcom,board-id = <33 0>; + qcom,pmic-id = <0x2D 0x2E 0x0 0x0>; }; diff --git a/qcom/khaje-atp.dts b/qcom/khaje-atp.dts index 1a3ad5fa..fc94ce2e 100644 --- a/qcom/khaje-atp.dts +++ b/qcom/khaje-atp.dts @@ -7,5 +7,6 @@ model = "Qualcomm Technologies, Inc. Khaje ATP"; compatible = "qcom,khaje-atp", "qcom,khaje", "qcom,atp"; qcom,board-id = <33 0>; + qcom,pmic-id = <0x2D 0x2E 0x0 0x0>; }; diff --git a/qcom/khaje-atp.dtsi b/qcom/khaje-atp.dtsi index b6bcf1b4..39832cf9 100644 --- a/qcom/khaje-atp.dtsi +++ b/qcom/khaje-atp.dtsi @@ -1,4 +1,8 @@ #include <dt-bindings/gpio/gpio.h> +#include <dt-bindings/iio/qcom,spmi-vadc.h> +#include <dt-bindings/input/input.h> +#include "khaje-sde-display.dtsi" +#include "khaje-pm7250b.dtsi" &pm6125_gpios { eldo9_pin { @@ -26,6 +30,256 @@ }; }; +&sdhc_1 { + vdd-supply = <&L24A>; + qcom,vdd-voltage-level = <2960000 2960000>; + qcom,vdd-current-level = <0 570000>; + + vdd-io-supply = <&L11A>; + qcom,vdd-io-always-on; + qcom,vdd-io-lpm-sup; + qcom,vdd-io-voltage-level = <1800000 1800000>; + qcom,vdd-io-current-level = <0 325000>; + + pinctrl-names = "active", "sleep"; + pinctrl-0 = <&sdc1_clk_on &sdc1_cmd_on &sdc1_data_on + &sdc1_rclk_on>; + pinctrl-1 = <&sdc1_clk_off &sdc1_cmd_off &sdc1_data_off + &sdc1_rclk_off>; + + status = "ok"; +}; + +&sdhc_2 { + vdd-supply = <&L22A>; + qcom,vdd-voltage-level = <2960000 2960000>; + qcom,vdd-current-level = <0 800000>; + + vdd-io-supply = <&L5A>; + qcom,vdd-io-voltage-level = <1800000 2960000>; + qcom,vdd-io-current-level = <0 22000>; + + vdd-io-bias-supply = <&L7A>; + qcom,vdd-io-bias-voltage-level = <1256000 1256000>; + qcom,vdd-io-bias-current-level = <0 6000>; + + pinctrl-names = "active", "sleep"; + pinctrl-0 = <&sdc2_clk_on &sdc2_cmd_on &sdc2_data_on &sdc2_cd_on>; + pinctrl-1 = <&sdc2_clk_off &sdc2_cmd_off &sdc2_data_off &sdc2_cd_off>; + + cd-gpios = <&tlmm 88 GPIO_ACTIVE_LOW>; + + status = "ok"; +}; + +&ufsphy_mem { + compatible = "qcom,ufs-phy-qmp-v4"; + + vdda-phy-supply = <&L4A>; /* 0.9v */ + vdda-pll-supply = <&L18A>; /* 1.8v */ + vdda-phy-max-microamp = <85700>; + vdda-pll-max-microamp = <18300>; + + status = "ok"; +}; + +&ufshc_mem { + vdd-hba-supply = <&gcc_ufs_phy_gdsc>; + vdd-hba-fixed-regulator; + vcc-supply = <&L24A>; + vcc-voltage-level = <2950000 2960000>; + vccq2-supply = <&L11A>; + vcc-max-microamp = <800000>; + vccq2-max-microamp = <800000>; + vccq2-pwr-collapse-sup; + + qcom,vddp-ref-clk-supply = <&L18A>; + qcom,vddp-ref-clk-max-microamp = <100>; + qcom,vddp-ref-clk-min-uV = <1232000>; + qcom,vddp-ref-clk-max-uV = <1232000>; + + status = "ok"; +}; + &usb_qmp_dp_phy { vdd-supply = <&vdda_usb_ss_dp_core>; }; + +&pm6125_vadc { + pinctrl-0 = <&camera_therm_default &emmc_therm_default &rf_pa1_therm_default>; + + rf_pa1_therm { + reg = <ADC_GPIO4_PU2>; + label = "rf_pa1_therm"; + qcom,ratiometric; + qcom,hw-settle-time = <200>; + qcom,pre-scaling = <1 1>; + }; +}; + +&pm6125_adc_tm { + io-channels = <&pm6125_vadc ADC_AMUX_THM1_PU2>, + <&pm6125_vadc ADC_AMUX_THM2_PU2>, + <&pm6125_vadc ADC_XO_THERM_PU2>, + <&pm6125_vadc ADC_GPIO4_PU2>; + + rf_pa1_therm { + reg = <ADC_GPIO4_PU2>; + qcom,ratiometric; + qcom,hw-settle-time = <200>; + }; +}; + +&thermal_zones { + rf-pa1-therm-usr { + polling-delay-passive = <0>; + polling-delay = <0>; + thermal-governor = "user_space"; + thermal-sensors = <&pm6125_adc_tm ADC_GPIO4_PU2>; + wake-capable-sensor; + trips { + active-config0 { + temperature = <125000>; + hysteresis = <1000>; + type = "passive"; + }; + }; + }; +}; + +&pm6125_gpios { + + rf_pa1_therm { + rf_pa1_therm_default: rf_pa1_therm_default { + pins = "gpio7"; + bias-high-impedance; + }; + }; + + key_vol_up { + key_vol_up_default: key_vol_up_default { + pins = "gpio5"; + function = "normal"; + input-enable; + bias-pull-up; + power-source = <0>; + }; + }; +}; + +&soc { + gpio_keys { + compatible = "gpio-keys"; + label = "gpio-keys"; + + pinctrl-names = "default"; + pinctrl-0 = <&key_vol_up_default>; + + vol_up { + label = "volume_up"; + gpios = <&pm6125_gpios 5 GPIO_ACTIVE_LOW>; + linux,input-type = <1>; + linux,code = <KEY_VOLUMEUP>; + linux,can-disable; + debounce-interval = <15>; + gpio-key,wakeup; + }; + }; +}; + +&pm7250b_charger { + status = "ok"; + io-channels = <&pm7250b_vadc ADC_USB_IN_V_16>, + <&pm7250b_vadc ADC_USB_IN_I>, + <&pm7250b_vadc ADC_CHG_TEMP>, + <&pm7250b_vadc ADC_DIE_TEMP>, + <&pm7250b_vadc ADC_AMUX_THM3_PU2>, + <&pm7250b_vadc ADC_SBUx>, + <&pm7250b_vadc ADC_VPH_PWR>; + io-channel-names = "usb_in_voltage", + "usb_in_current", + "chg_temp", + "die_temp", + "conn_temp", + "sbux_res", + "vph_voltage"; + qcom,batteryless-platform; + qcom,sec-charger-config = <0>; + qcom,auto-recharge-soc = <98>; + qcom,step-charging-enable; + qcom,sw-jeita-enable; + qcom,charger-temp-max = <800>; + qcom,suspend-input-on-debug-batt; +}; + +&pm7250b_qg { + status = "ok"; + io-channels = <&pm7250b_vadc ADC_BAT_THERM_PU2>, + <&pm7250b_vadc ADC_BAT_ID_PU2>; + io-channel-names = "batt-therm", + "batt-id"; + qcom,qg-iterm-ma = <150>; + qcom,hold-soc-while-full; + qcom,linearize-soc; + qcom,cl-feedback-on; +}; + +&pm8008_8 { + status = "disabled"; +}; + +&pm8008_9 { + status = "disabled"; +}; + +&pm6125_pwm { + status = "okay"; +}; + +&dsi_nt36672e_fhd_plus_90hz_video { + qcom,panel-supply-entries = <&dsi_panel_pwr_supply_no_labibb>; + qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_pwm"; + pwms = <&pm6125_pwm 0 0>; + qcom,bl-pmic-pwm-period-usecs = <100>; + qcom,mdss-dsi-bl-min-level = <1>; + qcom,mdss-dsi-bl-max-level = <4095>; + qcom,platform-reset-gpio = <&tlmm 82 0>; + qcom,platform-en-gpio = <&pm7250b_gpios 5 0>; + qcom,platform-bklight-en-gpio = <&pm7250b_gpios 1 0>; + /delete-property/ qcom,esd-check-enabled; +}; + +&dsi_sim_vid { + qcom,panel-supply-entries = <&dsi_panel_pwr_supply_no_labibb>; + qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_dcs"; + qcom,platform-reset-gpio = <&tlmm 82 0>; +}; + +&sde_dsi { + qcom,dsi-default-panel = <&dsi_nt36672e_fhd_plus_90hz_video>; + pinctrl-0 = <&sde_dsi_active &sde_te_active &disp_lcd_bias_en_default>; +}; + +&qupv3_se2_i2c { + status = "okay"; + qcom,i2c-touch-active="novatek,NVT-ts"; + + novatek@62 { + compatible = "novatek,NVT-ts"; + reg = <0x62>; + status = "ok"; + + interrupt-parent = <&tlmm>; + interrupts = <80 0x2008>; + pinctrl-names = "pmx_ts_active","pmx_ts_suspend", + "pmx_ts_release"; + pinctrl-0 = <&ts_int_active &ts_reset_active>; + pinctrl-1 = <&ts_int_suspend &ts_reset_suspend>; + pinctrl-2 = <&ts_release>; + + novatek,reset-gpio = <&tlmm 86 0x00>; + novatek,irq-gpio = <&tlmm 80 0x2008>; + + panel = <&dsi_nt36672e_fhd_plus_90hz_video>; + }; +}; diff --git a/qcom/khaje-idp-nopmi-overlay.dts b/qcom/khaje-idp-nopmi-overlay.dts index baad62db..566b24f0 100644 --- a/qcom/khaje-idp-nopmi-overlay.dts +++ b/qcom/khaje-idp-nopmi-overlay.dts @@ -8,6 +8,6 @@ model = "Qualcomm Technologies, Inc. KHAJE IDP nopmi"; compatible = "qcom,khaje-idp", "qcom,khaje", "qcom,idp"; qcom,msm-id = <518 0x10000>; - qcom,board-id = <34 0>; + qcom,board-id = <0x10022 0>; qcom,pmic-id = <0x2D 0x0 0x0 0x0>; }; diff --git a/qcom/khaje-idp-nopmi.dts b/qcom/khaje-idp-nopmi.dts index 9c3ad4e9..31d8418b 100644 --- a/qcom/khaje-idp-nopmi.dts +++ b/qcom/khaje-idp-nopmi.dts @@ -6,6 +6,6 @@ / { model = "Qualcomm Technologies, Inc. KHAJE IDP nopmi"; compatible = "qcom,khaje-idp", "qcom,khaje", "qcom,idp"; - qcom,board-id = <34 0>; + qcom,board-id = <0x10022 0>; qcom,pmic-id = <0x2D 0x0 0x0 0x0>; }; diff --git a/qcom/khaje-idp-overlay.dts b/qcom/khaje-idp-overlay.dts index cc64dfa0..dea903c5 100644 --- a/qcom/khaje-idp-overlay.dts +++ b/qcom/khaje-idp-overlay.dts @@ -9,6 +9,6 @@ model = "Qualcomm Technologies, Inc. Khaje IDP"; compatible = "qcom,khaje-idp", "qcom,khaje", "qcom,idp"; qcom,msm-id = <518 0x10000>; - qcom,board-id = <34 0>; + qcom,board-id = <0x10022 0>; qcom,pmic-id = <0x2D 0x2E 0x0 0x0>; }; diff --git a/qcom/khaje-idp-pm7250b.dtsi b/qcom/khaje-idp-pm7250b.dtsi index f9a6fe0d..515b8deb 100644 --- a/qcom/khaje-idp-pm7250b.dtsi +++ b/qcom/khaje-idp-pm7250b.dtsi @@ -1,5 +1,6 @@ #include "khaje-pm7250b.dtsi" #include "khaje-thermal-pm7250b-overlay.dtsi" +#include <dt-bindings/pinctrl/qcom,pmic-gpio.h> &soc { mtp_batterydata: qcom,battery-data { @@ -11,8 +12,11 @@ &pm7250b_gpios { pm7250b_smb_int_default: pm7250b_smb_int_default { pins = "gpio6"; - function = "func1"; + function = "gpio"; input-enable; + bias-pull-up; + qcom,pull-up-strength = <PMIC_GPIO_PULL_UP_30>; + power-source = <0>; }; }; @@ -52,7 +56,7 @@ "vph_voltage", "skin_temp"; qcom,battery-data = <&mtp_batterydata>; - qcom,sec-charger-config = <1>; + qcom,sec-charger-config = <2>; qcom,auto-recharge-soc = <98>; qcom,step-charging-enable; qcom,sw-jeita-enable; @@ -107,3 +111,41 @@ qcom,platform-en-gpio = <&pm7250b_gpios 5 0>; qcom,platform-bklight-en-gpio = <&pm7250b_gpios 1 0>; }; + +&cam_res_mgr_label { + gpios = <&pm7250b_gpios 4 0>; +}; + +&led_flash_rear { + gpios = <&pm7250b_gpios 4 0>; +}; + +&led_flash_rear_aux { + gpios = <&pm7250b_gpios 4 0>; +}; + +&led_flash_rear_aux2 { + gpios = <&pm7250b_gpios 4 0>; +}; + +&pm7250b_charger { + dpdm-supply = <&usb2_phy0>; + + smb5_vbus: qcom,smb5-vbus { + regulator-name = "smb5-vbus"; + }; + + smb5_vconn: qcom,smb5-vconn { + regulator-name = "smb5-vconn"; + }; +}; + +&pm7250b_pdphy { + vdd-pdphy-supply = <&L15A>; + vbus-supply = <&smb5_vbus>; + vconn-supply = <&smb5_vconn>; +}; + +&usb0 { + extcon = <&pm7250b_pdphy>, <&pm7250b_charger>, <&eud>; +}; diff --git a/qcom/khaje-idp-usbc-overlay.dts b/qcom/khaje-idp-usbc-overlay.dts new file mode 100644 index 00000000..4993cdae --- /dev/null +++ b/qcom/khaje-idp-usbc-overlay.dts @@ -0,0 +1,16 @@ +/dts-v1/; +/plugin/; + +#include <dt-bindings/interrupt-controller/arm-gic.h> +#include "khaje-idp.dtsi" +#include "khaje-idp-pm7250b.dtsi" +#include "khaje-idp-usbc.dtsi" + +/ { + model = "Qualcomm Technologies, Inc. KHAJE IDP USBC Audio"; + compatible = "qcom,khaje-idp", "qcom,khaje", "qcom,idp"; + qcom,msm-id = <518 0x10000>; + qcom,board-id = <0x1010022 0>; + qcom,pmic-id = <0x2D 0x2E 0x0 0x0>; +}; + diff --git a/qcom/khaje-idp-usbc.dts b/qcom/khaje-idp-usbc.dts new file mode 100644 index 00000000..7a62a6d1 --- /dev/null +++ b/qcom/khaje-idp-usbc.dts @@ -0,0 +1,15 @@ +/dts-v1/; + +#include "khaje.dtsi" +#include "khaje-idp.dtsi" +#include "khaje-idp-pm7250b.dtsi" +#include "khaje-idp-usbc.dtsi" + +/ { + model = "Qualcomm Technologies, Inc. KHAJE IDP USBC Audio"; + compatible = "qcom,khaje-idp", "qcom,khaje", "qcom,idp"; + qcom,msm-id = <518 0x10000>; + qcom,board-id = <0x1010022 0>; + qcom,pmic-id = <0x2D 0x2E 0x0 0x0>; +}; + diff --git a/qcom/khaje-idp-usbc.dtsi b/qcom/khaje-idp-usbc.dtsi new file mode 100644 index 00000000..2a627c57 --- /dev/null +++ b/qcom/khaje-idp-usbc.dtsi @@ -0,0 +1,6 @@ +&bengal_snd { + qcom,msm-mbhc-usbc-audio-supported = <1>; + qcom,msm-mbhc-hphl-swh = <0>; + qcom,msm-mbhc-gnd-swh = <0>; +}; + diff --git a/qcom/khaje-idp.dts b/qcom/khaje-idp.dts index 01afb970..3787ab3d 100644 --- a/qcom/khaje-idp.dts +++ b/qcom/khaje-idp.dts @@ -7,6 +7,6 @@ / { model = "Qualcomm Technologies, Inc. KHAJE IDP"; compatible = "qcom,khaje-idp", "qcom,khaje", "qcom,idp"; - qcom,board-id = <34 0>; + qcom,board-id = <0x10022 0>; qcom,pmic-id = <0x2D 0x2E 0x0 0x0>; }; diff --git a/qcom/khaje-idp.dtsi b/qcom/khaje-idp.dtsi index d9e4578b..c8774c02 100644 --- a/qcom/khaje-idp.dtsi +++ b/qcom/khaje-idp.dtsi @@ -2,6 +2,7 @@ #include <dt-bindings/iio/qcom,spmi-vadc.h> #include <dt-bindings/input/input.h> #include "bengal-audio-overlay.dtsi" +#include "camera/khaje-camera-sensor-idp.dtsi" #include "bengal-thermal-overlay.dtsi" #include "khaje-sde-display.dtsi" @@ -118,6 +119,50 @@ }; &qupv3_se1_i2c { + awinic@64 { + compatible = "awinic,aw2016_led"; + reg = <0x64>; + + awinic,red { + awinic,name = "red"; + awinic,id = <0>; + awinic,imax = <2>; + awinic,led-current = <3>; + awinic,max-brightness = <255>; + awinic,rise-time-ms = <6>; + awinic,hold-time-ms = <0>; + awinic,fall-time-ms = <6>; + awinic,off-time-ms = <4>; + }; + + awinic,green { + awinic,name = "green"; + awinic,id = <1>; + awinic,imax = <2>; + awinic,led-current = <3>; + awinic,max-brightness = <255>; + awinic,rise-time-ms = <6>; + awinic,hold-time-ms = <0>; + awinic,fall-time-ms = <6>; + awinic,off-time-ms = <4>; + }; + + awinic,blue { + awinic,name = "blue"; + awinic,id = <2>; + awinic,imax = <2>; + awinic,led-current = <3>; + awinic,max-brightness = <255>; + awinic,rise-time-ms = <6>; + awinic,hold-time-ms = <0>; + awinic,fall-time-ms = <6>; + awinic,off-time-ms = <4>; + }; + + }; +}; + +&qupv3_se1_i2c { status = "ok"; #address-cells = <1>; #size-cells = <0>; @@ -245,6 +290,12 @@ qcom,platform-reset-gpio = <&tlmm 82 0>; }; +&dsi_sim_vid { + qcom,panel-supply-entries = <&dsi_panel_pwr_supply_no_labibb>; + qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_dcs"; + qcom,platform-reset-gpio = <&tlmm 82 0>; +}; + &sde_dsi { qcom,dsi-default-panel = <&dsi_td4330_truly_v2_video>; }; diff --git a/qcom/khaje-idps-display-90hz-overlay.dts b/qcom/khaje-idps-display-90hz-overlay.dts index 42c1f31f..02711ed2 100644 --- a/qcom/khaje-idps-display-90hz-overlay.dts +++ b/qcom/khaje-idps-display-90hz-overlay.dts @@ -11,4 +11,5 @@ compatible = "qcom,khaje-idp", "qcom,khaje", "qcom,idp"; qcom,msm-id = <518 0x10000>; qcom,board-id = <0x10122 0>; + qcom,pmic-id = <0x2D 0x2E 0x0 0x0>; }; diff --git a/qcom/khaje-idps-display-90hz.dts b/qcom/khaje-idps-display-90hz.dts index 05ad1c4d..a9fc4d48 100644 --- a/qcom/khaje-idps-display-90hz.dts +++ b/qcom/khaje-idps-display-90hz.dts @@ -9,4 +9,5 @@ model = "Qualcomm Technologies, Inc. KHAJE IDPS + 90Hz"; compatible = "qcom,khaje-idp", "qcom,khaje", "qcom,idp"; qcom,board-id = <0x10122 0>; + qcom,pmic-id = <0x2D 0x2E 0x0 0x0>; }; diff --git a/qcom/khaje-pinctrl.dtsi b/qcom/khaje-pinctrl.dtsi index c1f0f4ba..5c85f5f3 100644 --- a/qcom/khaje-pinctrl.dtsi +++ b/qcom/khaje-pinctrl.dtsi @@ -3,35 +3,6 @@ &tlmm { compatible = "qcom,khaje-pinctrl"; - cam_flash_strobe_active: cam_flash_strobe_active { - /* STROBE */ - mux { - pins = "gpio2"; - function = "gpio"; - }; - - config { - pins = "gpio2"; - bias-disable; /* No PULL */ - drive-strength = <2>; /* 2 MA */ - }; - }; - - cam_flash_strobe_suspend: cam_flash_strobe_suspend { - /* STROBE */ - mux { - pins = "gpio2"; - function = "gpio"; - }; - - config { - pins = "gpio2"; - bias-pull-down; /* PULL DOWN */ - drive-strength = <2>; /* 2 MA */ - output-low; - }; - }; - cam_flash_torch_active: cam_flash_torch_active { /* TORCH */ mux { @@ -61,35 +32,6 @@ }; }; - cam_flash_hwen_active: cam_flash_hwen_active { - /* HWEN */ - mux { - pins = "gpio4"; - function = "gpio"; - }; - - config { - pins = "gpio4"; - bias-disable; /* No PULL */ - drive-strength = <2>; /* 2 MA */ - }; - }; - - cam_flash_hwen_suspend: cam_flash_hwen_suspend { - /* HWEN */ - mux { - pins = "gpio4"; - function = "gpio"; - }; - - config { - pins = "gpio4"; - bias-pull-down; /* PULL DOWN */ - drive-strength = <2>; /* 2 MA */ - output-low; - }; - }; - cam_flash_tx_active: cam_flash_tx_active { /* TX */ mux { @@ -180,4 +122,19 @@ }; }; }; + + pmx_ts_release { + ts_release: ts_release { + mux { + pins = "gpio80", "gpio86"; + function = "gpio"; + }; + + config { + pins = "gpio80", "gpio86"; + drive-strength = <2>; + bias-pull-down; + }; + }; + }; }; diff --git a/qcom/khaje-qrd-hvdcp3p5-overlay.dts b/qcom/khaje-qrd-hvdcp3p5-overlay.dts new file mode 100644 index 00000000..490e7658 --- /dev/null +++ b/qcom/khaje-qrd-hvdcp3p5-overlay.dts @@ -0,0 +1,14 @@ +/dts-v1/; +/plugin/; + +#include <dt-bindings/interrupt-controller/arm-gic.h> +#include "khaje-qrd-hvdcp3p5.dtsi" +#include "khaje-qrd-pm7250b.dtsi" + +/ { + model = "Qualcomm Technologies, Inc. Khaje QRD HVDCP3P5"; + compatible = "qcom,khaje-qrd", "qcom,khaje", "qcom,qrd"; + qcom,msm-id = <518 0x10000>; + qcom,board-id = <0x1010B 0>; + qcom,pmic-id = <0x2D 0x2E 0x0 0x0>; +}; diff --git a/qcom/khaje-qrd-hvdcp3p5.dts b/qcom/khaje-qrd-hvdcp3p5.dts new file mode 100644 index 00000000..c30d71b6 --- /dev/null +++ b/qcom/khaje-qrd-hvdcp3p5.dts @@ -0,0 +1,12 @@ +/dts-v1/; + +#include "khaje.dtsi" +#include "khaje-qrd-hvdcp3p5.dtsi" +#include "khaje-qrd-pm7250b.dtsi" + +/ { + model = "Qualcomm Technologies, Inc. KHAJE QRD HVDCP3P5"; + compatible = "qcom,khaje-qrd", "qcom,khaje", "qcom,qrd"; + qcom,board-id = <0x1010B 0>; + qcom,pmic-id = <0x2D 0x2E 0x0 0x0>; +}; diff --git a/qcom/khaje-qrd-hvdcp3p5.dtsi b/qcom/khaje-qrd-hvdcp3p5.dtsi new file mode 100644 index 00000000..26100b35 --- /dev/null +++ b/qcom/khaje-qrd-hvdcp3p5.dtsi @@ -0,0 +1 @@ +#include "khaje-qrd.dtsi" diff --git a/qcom/khaje-qrd-overlay.dts b/qcom/khaje-qrd-overlay.dts index 4cdbe3dc..7c8960f3 100644 --- a/qcom/khaje-qrd-overlay.dts +++ b/qcom/khaje-qrd-overlay.dts @@ -12,3 +12,7 @@ qcom,board-id = <0x1000B 0>; qcom,pmic-id = <0x2D 0x2E 0x0 0x0>; }; + +&bengal_snd { + qcom,wcd-datalane-mismatch = <1>; +}; diff --git a/qcom/khaje-qrd-pm7250b.dtsi b/qcom/khaje-qrd-pm7250b.dtsi index 6dc1e040..958930aa 100644 --- a/qcom/khaje-qrd-pm7250b.dtsi +++ b/qcom/khaje-qrd-pm7250b.dtsi @@ -1,4 +1,5 @@ #include "khaje-pm7250b.dtsi" +#include "khaje-thermal-pm7250b-overlay.dtsi" &sde_dsi { pinctrl-0 = <&sde_dsi_active &sde_te_active &disp_lcd_bias_en_default>; @@ -13,3 +14,142 @@ qcom,platform-en-gpio = <&pm7250b_gpios 5 0>; qcom,platform-bklight-en-gpio = <&pm7250b_gpios 1 0>; }; + +&soc { + qrd_batterydata: qcom,battery-data { + qcom,batt-id-range-pct = <15>; + #include "qg-batterydata-atl466271_3300mAh.dtsi" + }; +}; + +&tlmm { + smb_int_default: smb_int_default { + mux { + pins = "gpio105"; + function = "gpio"; + }; + + config { + pins = "gpio105"; + bias-pull-up; + input-enable; + }; + }; +}; + +&qupv3_se1_i2c { + status = "ok"; + #include "smb1394.dtsi" +}; + +&smb1394 { + pinctrl-names = "default"; + pinctrl-0 = <&smb_int_default>; + interrupt-parent = <&tlmm>; + interrupt-names = "smb1394"; + interrupts = <105 IRQ_TYPE_LEVEL_LOW>; + status = "ok"; +}; + +&smb1394_div2_cp_primary { + io-channels = <&pm7250b_vadc ADC_AMUX_THM2_PU2>; + qcom,parallel-input-mode = <1>; + qcom,parallel-output-mode = <2>; + status = "ok"; +}; + +&pm7250b_charger { + status = "ok"; + io-channels = <&pm7250b_vadc ADC_USB_IN_V_16>, + <&pm7250b_vadc ADC_USB_IN_I>, + <&pm7250b_vadc ADC_CHG_TEMP>, + <&pm7250b_vadc ADC_DIE_TEMP>, + <&pm7250b_vadc ADC_AMUX_THM3_PU2>, + <&pm7250b_vadc ADC_SBUx>, + <&pm7250b_vadc ADC_VPH_PWR>, + <&pm7250b_vadc ADC_AMUX_THM1_PU2>; + io-channel-names = "usb_in_voltage", + "usb_in_current", + "chg_temp", + "die_temp", + "conn_temp", + "sbux_res", + "vph_voltage", + "skin_temp"; + qcom,battery-data = <&qrd_batterydata>; + qcom,sec-charger-config = <1>; + qcom,auto-recharge-soc = <98>; + qcom,step-charging-enable; + qcom,sw-jeita-enable; + qcom,charger-temp-max = <800>; + qcom,smb-temp-max = <800>; + qcom,suspend-input-on-debug-batt; + qcom,fcc-stepping-enable; + qcom,fcc-step-delay-ms = <100>; + qcom,fcc-step-size-ua = <100000>; + qcom,smb-internal-pull-kohm = <0>; + qcom,en-skin-therm-mitigation; + qcom,thermal-mitigation = <8000000 7500000 7000000 6500000 6000000 5500000 + 5000000 4500000 4000000 3500000 3000000 2500000 2000000 1500000 + 1000000 500000>; +}; + +&pm7250b_qg { + status = "ok"; + io-channels = <&pm7250b_vadc ADC_BAT_THERM_PU2>, + <&pm7250b_vadc ADC_BAT_ID_PU2>; + io-channel-names = "batt-therm", + "batt-id"; + qcom,qg-iterm-ma = <150>; + qcom,hold-soc-while-full; + qcom,linearize-soc; + qcom,cl-feedback-on; + qcom,tcss-enable; + qcom,fvss-enable; + qcom,fvss-vbatt-mv = <3500>; + qcom,bass-enable; + qcom,vbatt-cutoff-mv = <3400>; + qcom,vbatt-low-mv = <3500>; + qcom,vbatt-low-cold-mv = <3800>; + qcom,vbatt-empty-mv = <3200>; + qcom,vbatt-empty-cold-mv = <3100>; + qcom,use-cp-iin-sns; +}; + +&cam_res_mgr_label { + gpios = <&pm7250b_gpios 4 0>; +}; + +&led_flash_rear { + gpios = <&pm7250b_gpios 4 0>; +}; + +&led_flash_rear_aux { + gpios = <&pm7250b_gpios 4 0>; +}; + +&led_flash_rear_aux2 { + gpios = <&pm7250b_gpios 4 0>; +}; + +&pm7250b_charger { + dpdm-supply = <&usb2_phy0>; + + smb5_vbus: qcom,smb5-vbus { + regulator-name = "smb5-vbus"; + }; + + smb5_vconn: qcom,smb5-vconn { + regulator-name = "smb5-vconn"; + }; +}; + +&pm7250b_pdphy { + vdd-pdphy-supply = <&L15A>; + vbus-supply = <&smb5_vbus>; + vconn-supply = <&smb5_vconn>; +}; + +&usb0 { + extcon = <&pm7250b_pdphy>, <&pm7250b_charger>, <&eud>; +}; diff --git a/qcom/khaje-qrd-wcd9368-overlay.dts b/qcom/khaje-qrd-wcd9368-overlay.dts new file mode 100644 index 00000000..7a152d92 --- /dev/null +++ b/qcom/khaje-qrd-wcd9368-overlay.dts @@ -0,0 +1,14 @@ +/dts-v1/; +/plugin/; + +#include <dt-bindings/interrupt-controller/arm-gic.h> +#include "khaje-qrd-wcd9368.dtsi" +#include "khaje-qrd-pm7250b.dtsi" + +/ { + model = "Qualcomm Technologies, Inc. Khaje QRD WCD9368"; + compatible = "qcom,khaje-qrd", "qcom,khaje", "qcom,qrd"; + qcom,msm-id = <518 0x10000>; + qcom,board-id = <0x2010B 0>; + qcom,pmic-id = <0x2D 0x2E 0x0 0x0>; +}; diff --git a/qcom/khaje-qrd-wcd9368.dts b/qcom/khaje-qrd-wcd9368.dts new file mode 100644 index 00000000..9f63d560 --- /dev/null +++ b/qcom/khaje-qrd-wcd9368.dts @@ -0,0 +1,12 @@ +/dts-v1/; + +#include "khaje.dtsi" +#include "khaje-qrd-wcd9368.dtsi" +#include "khaje-qrd-pm7250b.dtsi" + +/ { + model = "Qualcomm Technologies, Inc. KHAJE QRD WCD9368"; + compatible = "qcom,khaje-qrd", "qcom,khaje", "qcom,qrd"; + qcom,board-id = <0x2010B 0>; + qcom,pmic-id = <0x2D 0x2E 0x0 0x0>; +}; diff --git a/qcom/khaje-qrd-wcd9368.dtsi b/qcom/khaje-qrd-wcd9368.dtsi new file mode 100644 index 00000000..ff96a6ad --- /dev/null +++ b/qcom/khaje-qrd-wcd9368.dtsi @@ -0,0 +1 @@ +#include "khaje-qrd-hvdcp3p5.dtsi" diff --git a/qcom/khaje-qrd.dtsi b/qcom/khaje-qrd.dtsi index fd903d6e..4b2a0502 100644 --- a/qcom/khaje-qrd.dtsi +++ b/qcom/khaje-qrd.dtsi @@ -2,14 +2,10 @@ #include <dt-bindings/iio/qcom,spmi-vadc.h> #include <dt-bindings/input/input.h> #include "bengal-thermal-overlay.dtsi" +#include "camera/khaje-camera-sensor-qrd.dtsi" #include "bengal-audio-overlay.dtsi" #include "khaje-sde-display.dtsi" -&qupv3_se1_i2c { - status = "ok"; - #include "smb1355.dtsi" -}; - &pm6125_gpios { key_vol_up { key_vol_up_default: key_vol_up_default { @@ -68,6 +64,50 @@ vdd-supply = <&vdda_usb_ss_dp_core>; }; +&qupv3_se1_i2c { + awinic@64 { + compatible = "awinic,aw2016_led"; + reg = <0x64>; + + awinic,red { + awinic,name = "red"; + awinic,id = <0>; + awinic,imax = <2>; + awinic,led-current = <3>; + awinic,max-brightness = <255>; + awinic,rise-time-ms = <6>; + awinic,hold-time-ms = <0>; + awinic,fall-time-ms = <6>; + awinic,off-time-ms = <4>; + }; + + awinic,green { + awinic,name = "green"; + awinic,id = <1>; + awinic,imax = <2>; + awinic,led-current = <3>; + awinic,max-brightness = <255>; + awinic,rise-time-ms = <6>; + awinic,hold-time-ms = <0>; + awinic,fall-time-ms = <6>; + awinic,off-time-ms = <4>; + }; + + awinic,blue { + awinic,name = "blue"; + awinic,id = <2>; + awinic,imax = <2>; + awinic,led-current = <3>; + awinic,max-brightness = <255>; + awinic,rise-time-ms = <6>; + awinic,hold-time-ms = <0>; + awinic,fall-time-ms = <6>; + awinic,off-time-ms = <4>; + }; + + }; +}; + &bengal_snd { qcom,model = "bengal-qrd-snd-card"; qcom,msm-mi2s-master = <1>, <1>, <1>, <1>; @@ -188,21 +228,6 @@ status = "ok"; }; -&tlmm { - smb_int_default: smb_int_default { - mux { - pins = "gpio105"; - function = "gpio"; - }; - - config { - pins = "gpio105"; - bias-pull-up; - input-enable; - }; - }; -}; - &ufsphy_mem { compatible = "qcom,ufs-phy-qmp-v4"; @@ -257,6 +282,12 @@ qcom,platform-reset-gpio = <&tlmm 82 0>; }; +&dsi_sim_vid { + qcom,panel-supply-entries = <&dsi_panel_pwr_supply_no_labibb>; + qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_dcs"; + qcom,platform-reset-gpio = <&tlmm 82 0>; +}; + &sde_dsi { qcom,dsi-default-panel = <&dsi_td4330_truly_v2_video>; }; diff --git a/qcom/khaje-sde-display.dtsi b/qcom/khaje-sde-display.dtsi index be21f166..69291d75 100644 --- a/qcom/khaje-sde-display.dtsi +++ b/qcom/khaje-sde-display.dtsi @@ -1,6 +1,7 @@ #include "dsi-panel-td4330-truly-v2-singlemipi-fhd-cmd.dtsi" #include "dsi-panel-td4330-truly-v2-singlemipi-fhd-vid.dtsi" #include "dsi-panel-nt36672e-fhd-plus-90hz-video.dtsi" +#include "dsi-panel-sim-video.dtsi" #include <dt-bindings/clock/mdss-7nm-pll-clk.h> &soc { @@ -68,7 +69,17 @@ qcom,mdss-dsi-panel-status-value = <0x1c>; qcom,mdss-dsi-panel-on-check-value = <0x1c>; qcom,mdss-dsi-panel-status-read-length = <1>; - qcom,dsi-select-clocks = "mux_byte_clk0", "mux_pixel_clk0"; + qcom,dsi-supported-dfps-list = <60 55 48>; + qcom,mdss-dsi-pan-enable-dynamic-fps; + qcom,mdss-dsi-pan-fps-update = + "dfps_immediate_porch_mode_vfp"; + qcom,dsi-select-clocks = "mux_byte_clk0", "mux_pixel_clk0", + "src_byte_clk0", "src_pixel_clk0", + "shadow_byte_clk0", "shadow_pixel_clk0"; + qcom,dsi-dyn-clk-enable; + qcom,dsi-dyn-clk-list = + <976190400 988392784 984325320 980257864>; + qcom,dsi-dyn-clk-type = "constant-fps-adjust-vfp"; qcom,mdss-dsi-display-timings { timing@0 { qcom,mdss-dsi-panel-phy-timings = [00 21 08 08 25 22 09 @@ -95,12 +106,18 @@ qcom,mdss-dsi-panel-on-check-value = <0x1c>; qcom,mdss-dsi-panel-status-read-length = <1>; qcom,dsi-select-clocks = "mux_byte_clk0", "mux_pixel_clk0"; + qcom,ulps-enabled; + qcom,dsi-dyn-clk-enable; + qcom,dsi-dyn-clk-list = + <944315056 928576464 932511112 936445760 940380400>; qcom,mdss-dsi-display-timings { timing@0 { qcom,mdss-dsi-panel-phy-timings = [00 23 09 09 26 24 09 09 09 02 04 00 1E 19]; qcom,display-topology = <1 0 1>; qcom,default-topology-index = <0>; + qcom,partial-update-enabled = "single_roi"; + qcom,panel-roi-alignment = <40 40 40 40 40 40>; }; timing@1 { @@ -129,3 +146,15 @@ }; }; }; + +&dsi_sim_vid { + qcom,dsi-select-clocks = "mux_byte_clk0", "mux_pixel_clk0"; + qcom,mdss-dsi-display-timings { + timing@0 { + qcom,mdss-dsi-panel-phy-timings = [01 09 01 01 1B 1B 01 + 01 02 02 04 00 0A 11]; + qcom,display-topology = <1 0 1>; + qcom,default-topology-index = <0>; + }; + }; +}; diff --git a/qcom/khaje-sde-pll.dtsi b/qcom/khaje-sde-pll.dtsi index 8960e67f..5ea95879 100644 --- a/qcom/khaje-sde-pll.dtsi +++ b/qcom/khaje-sde-pll.dtsi @@ -8,7 +8,7 @@ <0x5e94400 0x800>, <0x5f01004 0x8>, <0x5e94200 0x100>; - reg-names = "pll_base", "phy_base ", + reg-names = "pll_base", "phy_base", "gdsc_base", "dynamic_pll_base"; clocks = <&dispcc DISP_CC_MDSS_AHB_CLK>; clock-names = "iface_clk"; diff --git a/qcom/khaje-sde.dtsi b/qcom/khaje-sde.dtsi index 7f0b22eb..20724c41 100644 --- a/qcom/khaje-sde.dtsi +++ b/qcom/khaje-sde.dtsi @@ -37,6 +37,7 @@ #interrupt-cells = <1>; #power-domain-cells = <0>; + #list-cells = <1>; /* hw blocks */ qcom,sde-off = <0x1000>; @@ -256,7 +257,6 @@ }; mdss_rotator: qcom,mdss_rotator { - status = "disabled"; compatible = "qcom,sde_rotator"; reg = <0x5e00000 0xac000>, <0x5eb0000 0x2008>; diff --git a/qcom/khaje-usb.dtsi b/qcom/khaje-usb.dtsi index 0277a730..152729ec 100644 --- a/qcom/khaje-usb.dtsi +++ b/qcom/khaje-usb.dtsi @@ -15,10 +15,12 @@ #size-cells = <1>; ranges; - interrupts-extended = <GIC_SPI 302 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 422 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 254 IRQ_TYPE_LEVEL_HIGH>; - interrupt-names = "pwr_event_irq", "ss_phy_irq", "hs_phy_irq"; + interrupts = <GIC_SPI 302 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 422 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 184 IRQ_TYPE_EDGE_RISING>, + <GIC_SPI 188 IRQ_TYPE_EDGE_RISING>; + interrupt-names = "pwr_event_irq", "ss_phy_irq", + "dp_hs_phy_irq", "dm_hs_phy_irq"; clocks = <&gcc GCC_USB30_PRIM_MASTER_CLK>, <&gcc GCC_SYS_NOC_USB3_PRIM_AXI_CLK>, @@ -136,8 +138,9 @@ vdda33-supply = <&L15A>; qcom,vdd-voltage-level = <0 880000 880000>; - clocks = <&rpmcc CXO_SMD_OTG_CLK>; - clock-names = "ref_clk_src"; + clocks = <&rpmcc CXO_SMD_OTG_CLK>, + <&gcc GCC_AHB2PHY_USB_CLK>; + clock-names = "ref_clk_src", "cfg_ahb_clk"; resets = <&gcc GCC_QUSB2PHY_PRIM_BCR>; reset-names = "phy_reset"; @@ -154,16 +157,19 @@ core-supply = <&L18A>; qcom,vdd-voltage-level = <0 880000 880000>; + qcom,core-voltage-level = <0 1232000 1260000>; clocks = <&gcc GCC_USB3_PRIM_PHY_COM_AUX_CLK>, <&gcc GCC_USB3_PRIM_PHY_PIPE_CLK>, <&gcc GCC_USB3_PRIM_PHY_PIPE_CLK_SRC>, <&usb3_phy_wrapper_gcc_usb30_pipe_clk>, <&rpmcc CXO_SMD_OTG_CLK>, - <&gcc GCC_USB3_PRIM_PHY_COM_AUX_CLK>; + <&gcc GCC_USB3_PRIM_PHY_COM_AUX_CLK>, + <&gcc GCC_AHB2PHY_USB_CLK>; + clock-names = "aux_clk", "pipe_clk", "pipe_clk_mux", "pipe_clk_ext_src", "ref_clk_src", - "com_aux_clk"; + "com_aux_clk","cfg_ahb_clk"; resets = <&gcc GCC_USB3_DP_PHY_PRIM_BCR>, <&gcc GCC_USB3_PHY_PRIM_SP0_BCR>; diff --git a/qcom/khaje.dtsi b/qcom/khaje.dtsi index 92bd25a5..14d5ccff 100644 --- a/qcom/khaje.dtsi +++ b/qcom/khaje.dtsi @@ -21,6 +21,7 @@ model = "Qualcomm Technologies, Inc. Khaje SoC"; compatible = "qcom,khaje"; qcom,msm-id = <518 0x10000>; + interrupt-parent = <&wakegic>; #address-cells = <2>; #size-cells = <2>; @@ -1554,7 +1555,7 @@ <0 0>; qcom,msm-bus,name = "ufshc_mem"; - qcom,msm-bus,num-cases = <12>; + qcom,msm-bus,num-cases = <22>; qcom,msm-bus,num-paths = <2>; qcom,msm-bus,vectors-KBps = /* @@ -1738,6 +1739,13 @@ #freq-domain-cells = <2>; }; + qcom,cpufreq-hw-debug@0f521000 { + compatible = "qcom,cpufreq-hw-debug"; + reg = <0x0f521000 0x800>; + reg-names = "domain-top"; + qcom,freq-hw-domain = <&cpufreq_hw 0>, <&cpufreq_hw 1>; + }; + tcsr_mutex_block: syscon@00340000 { compatible = "syscon"; reg = <0x340000 0x20000>; @@ -2366,33 +2374,25 @@ ddr_bw_opp_table: ddr-bw-opp-table { compatible = "operating-points-v2"; - BW_OPP_ENTRY_DDR( 200, 8, 0xA0); /* 1525 MB/s */ - BW_OPP_ENTRY_DDR( 300, 8, 0xA0); /* 2288 MB/s */ - BW_OPP_ENTRY_DDR( 451, 8, 0xA0); /* 3440 MB/s */ - BW_OPP_ENTRY_DDR( 547, 8, 0xA0); /* 4173 MB/s */ - BW_OPP_ENTRY_DDR( 681, 8, 0xA0); /* 5195 MB/s */ - BW_OPP_ENTRY_DDR( 768, 8, 0xA0); /* 5859 MB/s */ - BW_OPP_ENTRY_DDR( 931, 8, 0x20); /* 7102 MB/s */ + BW_OPP_ENTRY_DDR( 200, 8, 0x80); /* 1525 MB/s */ + BW_OPP_ENTRY_DDR( 547, 8, 0x80); /* 4173 MB/s */ + BW_OPP_ENTRY_DDR( 768, 8, 0x80); /* 5859 MB/s */ BW_OPP_ENTRY_DDR(1017, 8, 0x80); /* 7759 MB/s */ - BW_OPP_ENTRY_DDR(1353, 8, 0x80); /*10322 MB/s */ BW_OPP_ENTRY_DDR(1555, 8, 0x80); /*11863 MB/s */ BW_OPP_ENTRY_DDR(1804, 8, 0x80); /*13763 MB/s */ + BW_OPP_ENTRY_DDR(2092, 8, 0x80); /*15960 MB/s */ }; suspendable_ddr4_bw_opp_table: suspendable-ddr4-bw-opp-table { compatible = "operating-points-v2"; - BW_OPP_ENTRY_DDR( 0, 8, 0xA0); /* 0 MB/s */ - BW_OPP_ENTRY_DDR( 200, 8, 0xA0); /* 1525 MB/s */ - BW_OPP_ENTRY_DDR( 300, 8, 0xA0); /* 2288 MB/s */ - BW_OPP_ENTRY_DDR( 451, 8, 0xA0); /* 3440 MB/s */ - BW_OPP_ENTRY_DDR( 547, 8, 0xA0); /* 4173 MB/s */ - BW_OPP_ENTRY_DDR( 681, 8, 0xA0); /* 5195 MB/s */ - BW_OPP_ENTRY_DDR( 768, 8, 0xA0); /* 5859 MB/s */ - BW_OPP_ENTRY_DDR( 931, 8, 0x20); /* 7102 MB/s */ + BW_OPP_ENTRY_DDR( 0, 8, 0x80); /* 0 MB/s */ + BW_OPP_ENTRY_DDR( 200, 8, 0x80); /* 1525 MB/s */ + BW_OPP_ENTRY_DDR( 547, 8, 0x80); /* 4173 MB/s */ + BW_OPP_ENTRY_DDR( 768, 8, 0x80); /* 5859 MB/s */ BW_OPP_ENTRY_DDR(1017, 8, 0x80); /* 7759 MB/s */ - BW_OPP_ENTRY_DDR(1353, 8, 0x80); /*10322 MB/s */ BW_OPP_ENTRY_DDR(1555, 8, 0x80); /*11863 MB/s */ BW_OPP_ENTRY_DDR(1804, 8, 0x80); /*13763 MB/s */ + BW_OPP_ENTRY_DDR(2092, 8, 0x80); /*15960 MB/s */ }; cpu_cpu_ddr_bw: qcom,cpu-cpu-ddr-bw { @@ -2443,44 +2443,20 @@ qcom,target-dev = <&cpu0_cpu_ddr_lat>; qcom,cachemiss-ev = <0x17>; qcom,stall-cycle-ev = <0xE7>; - ddr3-map { - qcom,ddr-type = <DDR_TYPE_LPDDR3>; - qcom,core-dev-table = - < 864000 MHZ_TO_MBPS(200, 8) >, - < 1305600 MHZ_TO_MBPS(451, 8) >, - < 1804800 MHZ_TO_MBPS(768, 8) >; - }; - - ddr4-map { - qcom,ddr-type = <DDR_TYPE_LPDDR4X>; - qcom,core-dev-table = - < 864000 MHZ_TO_MBPS( 300, 8) >, - < 1305600 MHZ_TO_MBPS( 547, 8) >, - < 1420000 MHZ_TO_MBPS( 768, 8) >, - < 1804800 MHZ_TO_MBPS(1017, 8) >; - }; + qcom,core-dev-table = + < 1190400 MHZ_TO_MBPS( 547, 8) >, + < 1516800 MHZ_TO_MBPS( 768, 8) >, + < 1804800 MHZ_TO_MBPS(1017, 8) >; }; cpu0_computemon: qcom,cpu0-computemon { compatible = "qcom,arm-compute-mon"; qcom,cpulist = <&CPU0 &CPU1 &CPU2 &CPU3>; qcom,target-dev = <&cpu0_cpu_ddr_latfloor>; - ddr3-map { - qcom,ddr-type = <DDR_TYPE_LPDDR3>; - qcom,core-dev-table = - < 614400 MHZ_TO_MBPS( 200, 8) >, - < 1305600 MHZ_TO_MBPS( 451, 8) >, - < 1804800 MHZ_TO_MBPS( 768, 8) >; - }; - - ddr4-map { - qcom,ddr-type = <DDR_TYPE_LPDDR4X>; - qcom,core-dev-table = - < 614400 MHZ_TO_MBPS( 300, 8) >, - < 1017600 MHZ_TO_MBPS( 451, 8) >, - < 1420000 MHZ_TO_MBPS( 547, 8) >, - < 1804800 MHZ_TO_MBPS( 768, 8) >; - }; + qcom,core-dev-table = + < 1190400 MHZ_TO_MBPS( 547, 8) >, + < 1516800 MHZ_TO_MBPS( 768, 8) >, + < 1804800 MHZ_TO_MBPS(1017, 8) >; }; }; @@ -2512,48 +2488,24 @@ qcom,target-dev = <&cpu4_cpu_ddr_lat>; qcom,cachemiss-ev = <0x17>; qcom,stall-cycle-ev = <0x24>; - ddr3-map { - qcom,ddr-type = <DDR_TYPE_LPDDR3>; - qcom,core-dev-table = - < 1056000 MHZ_TO_MBPS(200, 8) >, - < 1401600 MHZ_TO_MBPS(451, 8) >, - < 1804800 MHZ_TO_MBPS(768, 8) >, - < 2016000 MHZ_TO_MBPS(931, 8) >; - }; - - ddr4-map { - qcom,ddr-type = <DDR_TYPE_LPDDR4X>; - qcom,core-dev-table = - < 902400 MHZ_TO_MBPS( 451, 8) >, - < 1401600 MHZ_TO_MBPS(1017, 8) >, - < 1804800 MHZ_TO_MBPS(1555, 8) >, - < 2016000 MHZ_TO_MBPS(1804, 8) >; - }; + qcom,core-dev-table = + < 1056000 MHZ_TO_MBPS( 547, 8) >, + < 1344000 MHZ_TO_MBPS(1017, 8) >, + < 1766400 MHZ_TO_MBPS(1555, 8) >, + < 2208000 MHZ_TO_MBPS(1804, 8) >, + < 2803200 MHZ_TO_MBPS(2092, 8) >; }; cpu4_computemon: qcom,cpu4-computemon { compatible = "qcom,arm-compute-mon"; qcom,cpulist = <&CPU4 &CPU5 &CPU6 &CPU7>; qcom,target-dev = <&cpu4_cpu_ddr_latfloor>; - ddr3-map { - qcom,ddr-type = <DDR_TYPE_LPDDR3>; - qcom,core-dev-table = - < 652800 MHZ_TO_MBPS( 200, 8) >, - < 1056000 MHZ_TO_MBPS( 451, 8) >, - < 1401600 MHZ_TO_MBPS( 547, 8) >, - < 1536000 MHZ_TO_MBPS( 768, 8) >, - < 2016000 MHZ_TO_MBPS( 931, 8) >; - }; - - ddr4-map { - qcom,ddr-type = <DDR_TYPE_LPDDR4X>; - qcom,core-dev-table = - < 902400 MHZ_TO_MBPS( 300, 8) >, - < 1056000 MHZ_TO_MBPS( 547, 8) >, - < 1401680 MHZ_TO_MBPS( 768, 8) >, - < 1804800 MHZ_TO_MBPS(1017, 8) >, - < 2016000 MHZ_TO_MBPS(1804, 8) >; - }; + qcom,core-dev-table = + < 1056000 MHZ_TO_MBPS( 547, 8) >, + < 1344000 MHZ_TO_MBPS( 768, 8) >, + < 1766400 MHZ_TO_MBPS(1017, 8) >, + < 2208000 MHZ_TO_MBPS(1804, 8) >, + < 2803200 MHZ_TO_MBPS(2092, 8) >; }; }; @@ -2673,15 +2625,11 @@ }; tpdm_turing_llm: tpdm@8861000 { - compatible = "arm,primecell"; - arm,primecell-periphid = <0x000bb968>; - reg = <0x8861000 0x1000>; - reg-names = "tpdm-base"; + compatible = "qcom,coresight-dummy"; coresight-name = "coresight-tpdm-turing_llm"; + qcom,dummy-source; - clocks = <&rpmcc RPM_SMD_QDSS_CLK>; - clock-names = "apb_pclk"; port { tpdm_turing_llm_out_funnel_turing: endpoint { remote-endpoint = @@ -2741,21 +2689,21 @@ tpdm_turing_llm: tpdm@8861000 { ports { #address-cells = <1>; #size-cells = <0>; + port@0 { reg = <0>; - funnel_turing_out_tpda5: endpoint { + funnel_turing_out_funnel_qatb: endpoint { remote-endpoint = - <&tpda5_in_funnel_turing>; - source = <&tpdm_turing>; + <&funnel_qatb_in_funnel_turing>; + source = <&turing_etm0>; }; }; port@1 { reg = <1>; - funnel_turing_out_funnel_qatb: endpoint { + funnel_turing_out_tpda5: endpoint { remote-endpoint = - <&funnel_qatb_in_funnel_turing>; - source = <&turing_etm0>; + <&tpda5_in_funnel_turing>; }; }; @@ -3028,13 +2976,8 @@ tpdm_turing_llm: tpdm@8861000 { gpu_opp_table: gpu-opp-table { compatible = "operating-points-v2"; - opp-1115000000 { - opp-hz = /bits/ 64 <1115000000>; - opp-microvolt = <RPMH_REGULATOR_LEVEL_TURBO_L1>; - }; - - opp-1100000000 { - opp-hz = /bits/ 64 <1100000000>; + opp-1114800000 { + opp-hz = /bits/ 64 <1114800000>; opp-microvolt = <RPMH_REGULATOR_LEVEL_TURBO_L1>; }; @@ -3043,16 +2986,6 @@ tpdm_turing_llm: tpdm@8861000 { opp-microvolt = <RPMH_REGULATOR_LEVEL_TURBO>; }; - opp-980000000 { - opp-hz = /bits/ 64 <980000000>; - opp-microvolt = <RPMH_REGULATOR_LEVEL_TURBO>; - }; - - opp-820000000 { - opp-hz = /bits/ 64 <820000000>; - opp-microvolt = <RPMH_REGULATOR_LEVEL_NOM_L1>; - }; - opp-785000000 { opp-hz = /bits/ 64 <785000000>; opp-microvolt = <RPMH_REGULATOR_LEVEL_NOM>; @@ -3108,56 +3041,30 @@ tpdm_turing_llm: tpdm@8861000 { qcom,speed-bin = <0>; - qcom,initial-pwrlevel = <8>; - qcom,ca-target-pwrlevel = <7>; + qcom,initial-pwrlevel = <5>; + qcom,ca-target-pwrlevel = <4>; /* TURBO_L1 */ qcom,gpu-pwrlevel@0 { reg = <0>; - qcom,gpu-freq = <111500000>; + qcom,gpu-freq = <1114800000>; qcom,bus-freq = <7>; qcom,bus-min = <7>; qcom,bus-max = <7>; }; - /* TURBO_L1 */ + /* TURBO */ qcom,gpu-pwrlevel@1 { reg = <1>; - qcom,gpu-freq = <110000000>; - qcom,bus-freq = <7>; - qcom,bus-min = <6>; - qcom,bus-max = <7>; - }; - - /* TURBO */ - qcom,gpu-pwrlevel@2 { - reg = <2>; qcom,gpu-freq = <1025000000>; qcom,bus-freq = <6>; - qcom,bus-min = <6>; - qcom,bus-max = <7>; - }; - /* TURBO */ - qcom,gpu-pwrlevel@3 { - reg = <3>; - qcom,gpu-freq = <980000000>; - qcom,bus-freq = <6>; qcom,bus-min = <5>; - qcom,bus-max = <6>; - }; - - /* NOM_L1 */ - qcom,gpu-pwrlevel@4 { - reg = <4>; - qcom,gpu-freq = <820000000>; - qcom,bus-freq = <5>; - qcom,bus-min = <4>; - qcom,bus-max = <6>; + qcom,bus-max = <7>; }; /* NOM */ - qcom,gpu-pwrlevel@5 { - reg = <5>; + qcom,gpu-pwrlevel@2 { + reg = <2>; qcom,gpu-freq = <785000000>; qcom,bus-freq = <5>; qcom,bus-min = <4>; @@ -3165,8 +3072,8 @@ tpdm_turing_llm: tpdm@8861000 { }; /* SVS_L1 */ - qcom,gpu-pwrlevel@6 { - reg = <6>; + qcom,gpu-pwrlevel@3 { + reg = <3>; qcom,gpu-freq = <600000000>; qcom,bus-freq = <4>; qcom,bus-min = <3>; @@ -3174,8 +3081,8 @@ tpdm_turing_llm: tpdm@8861000 { }; /* SVS */ - qcom,gpu-pwrlevel@7 { - reg = <7>; + qcom,gpu-pwrlevel@4 { + reg = <4>; qcom,gpu-freq = <465000000>; qcom,bus-freq = <3>; qcom,bus-min = <2>; @@ -3183,8 +3090,8 @@ tpdm_turing_llm: tpdm@8861000 { }; /* LOW SVS */ - qcom,gpu-pwrlevel@8 { - reg = <8>; + qcom,gpu-pwrlevel@5 { + reg = <5>; qcom,gpu-freq = <320000000>; qcom,bus-freq = <2>; qcom,bus-min = <1>; @@ -3192,8 +3099,8 @@ tpdm_turing_llm: tpdm@8861000 { }; /* XO */ - qcom,gpu-pwrlevel@9 { - reg = <9>; + qcom,gpu-pwrlevel@6 { + reg = <6>; qcom,gpu-freq = <0>; qcom,bus-freq = <0>; qcom,bus-min = <0>; @@ -3205,17 +3112,17 @@ tpdm_turing_llm: tpdm@8861000 { #address-cells = <1>; #size-cells = <0>; - qcom,speed-bin = <232>; + qcom,speed-bin = <235>; - qcom,initial-pwrlevel = <7>; - qcom,ca-target-pwrlevel = <6>; + qcom,initial-pwrlevel = <5>; + qcom,ca-target-pwrlevel = <4>; /* TURBO_L1 */ qcom,gpu-pwrlevel@0 { reg = <0>; - qcom,gpu-freq = <110000000>; + qcom,gpu-freq = <1114800000>; qcom,bus-freq = <7>; - qcom,bus-min = <6>; + qcom,bus-min = <7>; qcom,bus-max = <7>; }; @@ -3224,31 +3131,13 @@ tpdm_turing_llm: tpdm@8861000 { reg = <1>; qcom,gpu-freq = <1025000000>; qcom,bus-freq = <6>; - qcom,bus-min = <6>; + qcom,bus-min = <5>; qcom,bus-max = <7>; }; - /* TURBO */ + /* NOM */ qcom,gpu-pwrlevel@2 { reg = <2>; - qcom,gpu-freq = <980000000>; - qcom,bus-freq = <6>; - qcom,bus-min = <5>; - qcom,bus-max = <6>; - }; - - /* NOM_L1 */ - qcom,gpu-pwrlevel@3 { - reg = <3>; - qcom,gpu-freq = <820000000>; - qcom,bus-freq = <5>; - qcom,bus-min = <4>; - qcom,bus-max = <6>; - }; - - /* NOM */ - qcom,gpu-pwrlevel@4 { - reg = <4>; qcom,gpu-freq = <785000000>; qcom,bus-freq = <5>; qcom,bus-min = <4>; @@ -3256,8 +3145,8 @@ tpdm_turing_llm: tpdm@8861000 { }; /* SVS_L1 */ - qcom,gpu-pwrlevel@5 { - reg = <5>; + qcom,gpu-pwrlevel@3 { + reg = <3>; qcom,gpu-freq = <600000000>; qcom,bus-freq = <4>; qcom,bus-min = <3>; @@ -3265,8 +3154,8 @@ tpdm_turing_llm: tpdm@8861000 { }; /* SVS */ - qcom,gpu-pwrlevel@6 { - reg = <6>; + qcom,gpu-pwrlevel@4 { + reg = <4>; qcom,gpu-freq = <465000000>; qcom,bus-freq = <3>; qcom,bus-min = <2>; @@ -3274,8 +3163,8 @@ tpdm_turing_llm: tpdm@8861000 { }; /* LOW SVS */ - qcom,gpu-pwrlevel@7 { - reg = <7>; + qcom,gpu-pwrlevel@5 { + reg = <5>; qcom,gpu-freq = <320000000>; qcom,bus-freq = <2>; qcom,bus-min = <1>; @@ -3283,8 +3172,8 @@ tpdm_turing_llm: tpdm@8861000 { }; /* XO */ - qcom,gpu-pwrlevel@8 { - reg = <8>; + qcom,gpu-pwrlevel@6 { + reg = <6>; qcom,gpu-freq = <0>; qcom,bus-freq = <0>; qcom,bus-min = <0>; @@ -3296,32 +3185,23 @@ tpdm_turing_llm: tpdm@8861000 { #address-cells = <1>; #size-cells = <0>; - qcom,speed-bin = <207>; + qcom,speed-bin = <216>; - qcom,initial-pwrlevel = <5>; - qcom,ca-target-pwrlevel = <4>; + qcom,initial-pwrlevel = <4>; + qcom,ca-target-pwrlevel = <3>; /* TURBO */ qcom,gpu-pwrlevel@0 { reg = <0>; - qcom,gpu-freq = <980000000>; + qcom,gpu-freq = <1025000000>; qcom,bus-freq = <6>; qcom,bus-min = <5>; - qcom,bus-max = <6>; + qcom,bus-max = <7>; }; - /* NOM_L1 */ + /* NOM */ qcom,gpu-pwrlevel@1 { reg = <1>; - qcom,gpu-freq = <820000000>; - qcom,bus-freq = <5>; - qcom,bus-min = <4>; - qcom,bus-max = <6>; - }; - - /* NOM */ - qcom,gpu-pwrlevel@2 { - reg = <2>; qcom,gpu-freq = <785000000>; qcom,bus-freq = <5>; qcom,bus-min = <4>; @@ -3329,8 +3209,8 @@ tpdm_turing_llm: tpdm@8861000 { }; /* SVS_L1 */ - qcom,gpu-pwrlevel@3 { - reg = <3>; + qcom,gpu-pwrlevel@2 { + reg = <2>; qcom,gpu-freq = <600000000>; qcom,bus-freq = <4>; qcom,bus-min = <3>; @@ -3338,8 +3218,8 @@ tpdm_turing_llm: tpdm@8861000 { }; /* SVS */ - qcom,gpu-pwrlevel@4 { - reg = <4>; + qcom,gpu-pwrlevel@3 { + reg = <3>; qcom,gpu-freq = <465000000>; qcom,bus-freq = <3>; qcom,bus-min = <2>; @@ -3347,8 +3227,8 @@ tpdm_turing_llm: tpdm@8861000 { }; /* LOW SVS */ - qcom,gpu-pwrlevel@5 { - reg = <5>; + qcom,gpu-pwrlevel@4 { + reg = <4>; qcom,gpu-freq = <320000000>; qcom,bus-freq = <2>; qcom,bus-min = <1>; @@ -3356,8 +3236,8 @@ tpdm_turing_llm: tpdm@8861000 { }; /* XO */ - qcom,gpu-pwrlevel@6 { - reg = <6>; + qcom,gpu-pwrlevel@5 { + reg = <5>; qcom,gpu-freq = <0>; qcom,bus-freq = <0>; qcom,bus-min = <0>; @@ -3395,7 +3275,7 @@ tpdm_turing_llm: tpdm@8861000 { &L2P { regulator-min-microvolt = <950000>; regulator-max-microvolt = <1150000>; - qcom,min-dropout-voltage = <96000>; + qcom,min-dropout-voltage = <88000>; }; &L3P { @@ -3551,7 +3431,7 @@ tpdm_turing_llm: tpdm@8861000 { }; #include "bengal-thermal.dtsi" -#include "camera/bengal-camera.dtsi" +#include "camera/khaje-camera.dtsi" #include "msm-rdbg.dtsi" &cxip_cdev { diff --git a/qcom/kona-arglass-overlay.dts b/qcom/kona-arglass-overlay.dts new file mode 100644 index 00000000..71a42515 --- /dev/null +++ b/qcom/kona-arglass-overlay.dts @@ -0,0 +1,15 @@ +/dts-v1/; +/plugin/; + +#include <dt-bindings/clock/qcom,gcc-kona.h> +#include <dt-bindings/clock/qcom,camcc-kona.h> +#include <dt-bindings/clock/qcom,rpmh.h> +#include <dt-bindings/interrupt-controller/arm-gic.h> + +#include "kona-arglass.dtsi" + +/ { + model = "Qualcomm Technologies, Inc. kona AR Glass"; + compatible = "qcom,kona-mtp", "qcom,kona", "qcom,mtp"; + qcom,board-id = <0x1040008 0>; +}; diff --git a/qcom/kona-arglass.dts b/qcom/kona-arglass.dts new file mode 100644 index 00000000..417f4c9e --- /dev/null +++ b/qcom/kona-arglass.dts @@ -0,0 +1,10 @@ +/dts-v1/; + +#include "kona.dtsi" +#include "kona-arglass.dtsi" + +/ { + model = "Qualcomm Technologies, Inc. kona AR Glass"; + compatible = "qcom,kona-mtp", "qcom,kona", "qcom,mtp"; + qcom,board-id = <0x1040008 0>; +}; diff --git a/qcom/kona-arglass.dtsi b/qcom/kona-arglass.dtsi new file mode 100644 index 00000000..71e14aa6 --- /dev/null +++ b/qcom/kona-arglass.dtsi @@ -0,0 +1,944 @@ +#include <dt-bindings/gpio/gpio.h> +#include "kona-pmic-overlay.dtsi" +#include "kona-sde-display.dtsi" +#include "kona-audio-overlay.dtsi" +#include "kona-thermal-overlay.dtsi" +#include "kona-xr-pinctrl-overlay.dtsi" +#include "camera/kona-camera-sensor-arglass.dtsi" + +&tlmm { + mag_rst_gpio_default: mag_rst_gpio_default { + mux { + pins = "gpio125"; + function = "gpio"; + }; + + config { + pins = "gpio125"; + drive-strength = <8>; + bias-disable = <0>; + output-high; + }; + }; + + mag_rst_gpio_sleep: mag_rst_gpio_sleep { + mux { + pins = "gpio125"; + function = "gpio"; + }; + + config { + pins = "gpio125"; + drive-strength = <8>; + bias-pull-down; + input-enable; + }; + }; + + spkr_1_sd_n { + spkr_1_sd_n_sleep: spkr_1_sd_n_sleep { + mux { + pins = "gpio127"; + function = "gpio"; + }; + + config { + pins = "gpio127"; + drive-strength = <2>; /* 2 mA */ + bias-pull-down; + input-enable; + }; + }; + + spkr_1_sd_n_active: spkr_1_sd_n_active { + mux { + pins = "gpio127"; + function = "gpio"; + }; + + config { + pins = "gpio127"; + drive-strength = <16>; /* 16 mA */ + bias-disable; + output-high; + }; + }; + }; + + spkr_2_sd_n { + spkr_2_sd_n_sleep: spkr_2_sd_n_sleep { + mux { + pins = "gpio129"; + function = "gpio"; + }; + + config { + pins = "gpio129"; + drive-strength = <2>; /* 2 mA */ + bias-pull-down; + input-enable; + }; + }; + + spkr_2_sd_n_active: spkr_2_sd_n_active { + mux { + pins = "gpio129"; + function = "gpio"; + }; + + config { + pins = "gpio129"; + drive-strength = <16>; /* 16 mA */ + bias-disable; + output-high; + }; + }; + }; + + cam_sensor_6dof_vio_active: cam_sensor_6dof_vio_active { + /* VIO LDO */ + mux { + pins = "gpio41"; + function = "gpio"; + }; + + config { + pins = "gpio41"; + bias-disable; /* No PULL */ + drive-strength = <2>; /* 2 MA */ + }; + }; + + cam_sensor_6dof_vio_suspend: cam_sensor_6dof_vio_suspend { + /* VIO LDO */ + mux { + pins = "gpio41"; + function = "gpio"; + }; + + config { + pins = "gpio41"; + bias-pull-down; /* PULL DOWN */ + drive-strength = <2>; /* 2 MA */ + }; + }; +}; + +&vendor { + kona_xrfusion_batterydata: qcom,battery-data { + qcom,batt-id-range-pct = <15>; + #include "fg-gen4-batterydata-goertek-6100mah.dtsi" + }; +}; + +&qupv3_se12_2uart { + status = "okay"; +}; + +&pm8150a_amoled { + status = "disabled"; +}; + +&qupv3_se6_4uart { + status = "ok"; +}; + +&dai_mi2s2 { + status = "disabled"; + qcom,msm-mi2s-tx-lines = <1>; + pinctrl-names = "default", "sleep"; + pinctrl-0 = <&tert_mi2s_sck_active &tert_mi2s_ws_active + &tert_mi2s_sd0_active>; + pinctrl-1 = <&tert_mi2s_sck_sleep &tert_mi2s_ws_sleep + &tert_mi2s_sd0_sleep>; +}; + +&pm8150_l10 { + regulator-max-microvolt = <3304000>; + qcom,init-voltage = <3304000>; +}; + +&qupv3_se1_i2c { + status = "disabled"; + qcom,clk-freq-out = <1000000>; + #address-cells = <1>; + #size-cells = <0>; + xrfancontroller: xrfancontroller@50 { + compatible = "maxim,xrfancontroller"; + reg = <0x50>; + /* Manetometer gpio */ + mag_rst_gpio = <&tlmm 125 0>; + enable-active-high; + pinctrl-names = "default", "sleep"; + pinctrl-0 = <&mag_rst_gpio_default>; + pinctrl-1 = <&mag_rst_gpio_sleep>; + qcom,fan-pwr-en = <&tlmm 38 0x00>; + qcom,fan-pwr-bp = <&tlmm 39 0x00>; + }; +}; + +&qupv3_se13_i2c { + #address-cells = <1>; + #size-cells = <0>; + + status = "disabled"; +}; + +&ufsphy_mem { + compatible = "qcom,ufs-phy-qmp-v4"; + + vdda-phy-supply = <&pm8150_l5>; + vdda-phy-always-on; + vdda-pll-supply = <&pm8150_l9>; + vdda-phy-max-microamp = <89900>; + vdda-pll-max-microamp = <18800>; + + status = "ok"; +}; + +&ufshc_mem { + vdd-hba-supply = <&ufs_phy_gdsc>; + vdd-hba-fixed-regulator; + vcc-supply = <&pm8150_l17>; + vcc-voltage-level = <2504000 2950000>; + vcc-low-voltage-sup; + vccq-supply = <&pm8150_l6>; + vccq2-supply = <&pm8150_s4>; + vcc-max-microamp = <800000>; + vccq-max-microamp = <800000>; + vccq2-max-microamp = <800000>; + + qcom,vddp-ref-clk-supply = <&pm8150_l6>; + qcom,vddp-ref-clk-max-microamp = <100>; + qcom,vccq-parent-supply = <&pm8150a_s8>; + qcom,vccq-parent-max-microamp = <210000>; + + status = "ok"; +}; + +&soc { + qcom,qbt_handler { + status = "disabled"; + }; + + qcom,xr-stdalonevwr-misc { + compatible = "qcom,xr-stdalonevwr-misc"; + /* IMU CLK Enable PM8150 GPIO 3 & MAG_RST_GPIO */ + pinctrl-names = "default", "sleep"; + pinctrl-0 = <&imu_clkin_default &mag_rst_gpio_default>; + pinctrl-1 = <&imu_clkin_sleep &mag_rst_gpio_sleep>; + }; +}; + +&vreg_hap_boost { + status = "ok"; +}; + +&pm8150b_haptics { + qcom,vmax-mv = <1697>; + qcom,play-rate-us = <5882>; + vdd-supply = <&vreg_hap_boost>; + + wf_0 { + /* CLICK */ + qcom,wf-play-rate-us = <5882>; + qcom,wf-vmax-mv = <1697>; + }; + + wf_1 { + /* DOUBLE CLICK */ + qcom,wf-play-rate-us = <5882>; + qcom,wf-vmax-mv = <1697>; + }; + + wf_2 { + /* TICK */ + qcom,wf-play-rate-us = <5882>; + qcom,wf-vmax-mv = <1697>; + }; + + wf_3 { + /* THUD */ + qcom,wf-play-rate-us = <5882>; + qcom,wf-vmax-mv = <1697>; + }; + + wf_4 { + /* POP */ + qcom,wf-play-rate-us = <5882>; + qcom,wf-vmax-mv = <1697>; + }; + + wf_5 { + /* HEAVY CLICK */ + qcom,wf-play-rate-us = <5882>; + qcom,wf-vmax-mv = <1697>; + }; +}; + +&pm8150b_vadc { + #address-cells = <1>; + #size-cells = <0>; + + vph_pwr@83 { + reg = <ADC_VPH_PWR>; + label = "vph_pwr"; + qcom,pre-scaling = <1 3>; + }; + + conn_therm@4f { + reg = <ADC_AMUX_THM3_PU2>; + label = "conn_therm"; + qcom,ratiometric; + qcom,hw-settle-time = <200>; + qcom,pre-scaling = <1 1>; + }; + + chg_sbux@99 { + reg = <ADC_SBUx>; + label = "chg_sbux"; + qcom,pre-scaling = <1 3>; + }; + + mid_chg_div6@1e { + reg = <ADC_MID_CHG_DIV6>; + label = "chg_mid"; + qcom,pre-scaling = <1 6>; + }; + + usb_in_i_uv@7 { + reg = <ADC_USB_IN_I>; + label = "usb_in_i_uv"; + qcom,pre-scaling = <1 1>; + }; + + usb_in_v_div_16@8 { + reg = <ADC_USB_IN_V_16>; + label = "usb_in_v_div_16"; + qcom,pre-scaling = <1 16>; + }; +}; + +&qupv3_se15_i2c { + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + redriver: redriver@1c { + compatible = "onnn,redriver"; + reg = <0x1c>; + extcon = <&pm8150b_pdphy>, <&pm8150b_pdphy>; + eq = /bits/ 8 < + /* Parameters for USB */ + 0x4 0x4 0x4 0x4 + /* Parameters for DP */ + 0x6 0x4 0x4 0x6>; + flat-gain = /bits/ 8 < + /* Parameters for USB */ + 0x3 0x1 0x1 0x3 + /* Parameters for DP */ + 0x2 0x1 0x1 0x2>; + output-comp = /bits/ 8 < + /* Parameters for USB */ + 0x3 0x3 0x3 0x3 + /* Parameters for DP */ + 0x3 0x3 0x3 0x3>; + loss-match = /bits/ 8 < + /* Parameters for USB */ + 0x1 0x3 0x3 0x1 + /* Parameters for DP */ + 0x3 0x3 0x3 0x3>; + }; + + #include "smb1390.dtsi" +}; + +&smb1390 { + pinctrl-names = "default"; + pinctrl-0 = <&smb_stat_default>; + status = "ok"; +}; + +&smb1390_charger { + io-channels = <&pm8150b_vadc ADC_AMUX_THM2>; + io-channel-names = "cp_die_temp"; + qcom,parallel-output-mode = <2>; + status = "ok"; +}; + +&smb1390_slave { + status = "ok"; +}; + +&smb1390_slave_charger { + status = "ok"; +}; + +&pm8150b_charger { + status = "ok"; + qcom,sec-charger-config = <1>; + qcom,auto-recharge-soc = <98>; + io-channels = <&pm8150b_vadc ADC_MID_CHG_DIV6>, + <&pm8150b_vadc ADC_USB_IN_I>, + <&pm8150b_vadc ADC_SBUx>, + <&pm8150b_vadc ADC_VPH_PWR>, + <&pm8150b_vadc ADC_CHG_TEMP>; + io-channel-names = "mid_voltage", + "usb_in_current", + "sbux_res", + "vph_voltage", + "chg_temp"; + qcom,battery-data = <&kona_xrfusion_batterydata>; + qcom,sw-jeita-enable; + qcom,wd-bark-time-secs = <16>; + qcom,suspend-input-on-debug-batt; + qcom,thermal-mitigation = <5325000 4500000 4000000 3500000 3000000 + 2500000 2000000 1500000 1000000 500000>; +}; + +&pm8150b_fg { + status = "ok"; + qcom,battery-data = <&kona_xrfusion_batterydata>; + qcom,hold-soc-while-full; + qcom,linearize-soc; + qcom,five-pin-battery; + qcom,cl-wt-enable; + qcom,soc-scale-mode-en; + /* ESR fast calibration */ + qcom,fg-esr-timer-chg-fast = <0 7>; + qcom,fg-esr-timer-dischg-fast = <0 7>; + qcom,fg-esr-timer-chg-slow = <0 96>; + qcom,fg-esr-timer-dischg-slow = <0 96>; + qcom,fg-esr-cal-soc-thresh = <26 230>; + qcom,fg-esr-cal-temp-thresh = <10 40>; +}; + +&pm8150_vadc { + #address-cells = <1>; + #size-cells = <0>; + + vph_pwr@83 { + reg = <ADC_VPH_PWR>; + label = "vph_pwr"; + qcom,pre-scaling = <1 3>; + }; + + vcoin@85 { + reg = <ADC_VCOIN>; + label = "vcoin"; + qcom,pre-scaling = <1 3>; + }; + + xo_therm@4c { + reg = <ADC_XO_THERM_PU2>; + label = "xo_therm"; + qcom,ratiometric; + qcom,hw-settle-time = <200>; + qcom,pre-scaling = <1 1>; + }; + + skin_therm@4d { + reg = <ADC_AMUX_THM1_PU2>; + label = "skin_therm"; + qcom,ratiometric; + qcom,hw-settle-time = <200>; + qcom,pre-scaling = <1 1>; + }; + + pa_therm1@4e { + reg = <ADC_AMUX_THM2_PU2>; + label = "pa_therm1"; + qcom,ratiometric; + qcom,hw-settle-time = <200>; + qcom,pre-scaling = <1 1>; + }; +}; + +&pm8150l_vadc { + #address-cells = <1>; + #size-cells = <0>; + + vph_pwr@83 { + reg = <ADC_VPH_PWR>; + label = "vph_pwr"; + qcom,pre-scaling = <1 3>; + }; + + camera_flash_therm@4d { + reg = <ADC_AMUX_THM1_PU2>; + label = "camera_flash_therm"; + qcom,ratiometric; + qcom,hw-settle-time = <200>; + qcom,pre-scaling = <1 1>; + }; + + skin_msm_therm@4e { + reg = <ADC_AMUX_THM2_PU2>; + label = "skin_msm_therm"; + qcom,ratiometric; + qcom,hw-settle-time = <200>; + qcom,pre-scaling = <1 1>; + }; + + pa_therm2@4f { + reg = <ADC_AMUX_THM3_PU2>; + label = "pa_therm2"; + qcom,ratiometric; + qcom,hw-settle-time = <200>; + qcom,pre-scaling = <1 1>; + }; +}; + +&pm8150b_adc_tm { + #address-cells = <1>; + #size-cells = <0>; + + io-channels = <&pm8150b_vadc ADC_AMUX_THM3_PU2>; + + conn_therm@4f { + reg = <ADC_AMUX_THM3_PU2>; + qcom,ratiometric; + qcom,hw-settle-time = <200>; + }; +}; + +&pm8150_adc_tm { + #address-cells = <1>; + #size-cells = <0>; + + io-channels = <&pm8150_vadc ADC_XO_THERM_PU2>, + <&pm8150_vadc ADC_AMUX_THM1_PU2>, + <&pm8150_vadc ADC_AMUX_THM2_PU2>; + + xo_therm@4c { + reg = <ADC_XO_THERM_PU2>; + qcom,ratiometric; + qcom,hw-settle-time = <200>; + }; + + skin_therm@4d { + reg = <ADC_AMUX_THM1_PU2>; + qcom,ratiometric; + qcom,hw-settle-time = <200>; + }; + + pa_therm1@4e { + reg = <ADC_AMUX_THM2_PU2>; + qcom,ratiometric; + qcom,hw-settle-time = <200>; + }; +}; + +&pm8150l_adc_tm { + #address-cells = <1>; + #size-cells = <0>; + + camera_flash_therm@4d { + reg = <ADC_AMUX_THM1_PU2>; + qcom,ratiometric; + qcom,hw-settle-time = <200>; + }; + + skin_msm_therm@4e { + reg = <ADC_AMUX_THM2_PU2>; + qcom,ratiometric; + qcom,hw-settle-time = <200>; + }; + + pa_therm2@4f { + reg = <ADC_AMUX_THM3_PU2>; + qcom,ratiometric; + qcom,hw-settle-time = <200>; + }; +}; + +&spmi_debug_bus { + status = "ok"; +}; + +&sde_dsi { + /delete-property/ avdd-supply; + lab-supply = <&lcdb_ldo_vreg>; + ibb-supply = <&lcdb_ncp_vreg>; + qcom,dsi-default-panel = <&dsi_dual_arglass_seeya_video>; +}; + +&display_panel_avdd { + status = "disabled"; +}; + +&pm8150l_lcdb { + status = "ok"; +}; + +&pm8150l_wled { + status = "ok"; +}; + +&dsi_dual_arglass_seeya_video { + qcom,panel-supply-entries = <&dsi_panel_pwr_supply>; + qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_dcs"; + qcom,mdss-dsi-bl-ctrl-dcs-subtype = <0xc2>; + qcom,mdss-dsi-bl-min-level = <1>; + qcom,mdss-dsi-bl-max-level = <1023>; + qcom,mdss-brightness-max-level = <1023>; + qcom,platform-reset-gpio = <&tlmm 75 0>; + qcom,platform-bklight-en-gpio = <&tlmm 46 0>; + qcom,5v-boost-gpio = <&tlmm 61 0>; + /delete-property/ qcom,platform-en-gpio; +}; + +&dsi_sw43404_amoled_cmd { + qcom,panel-supply-entries = <&dsi_panel_pwr_supply>; + qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_dcs"; + qcom,mdss-dsi-bl-min-level = <1>; + qcom,mdss-dsi-bl-max-level = <1023>; + qcom,mdss-brightness-max-level = <255>; + qcom,platform-te-gpio = <&tlmm 66 0>; + qcom,platform-reset-gpio = <&tlmm 75 0>; + qcom,mdss-dsi-panel-test-pin = <&tlmm 46 0>; +}; + +&dsi_sw43404_amoled_video { + qcom,panel-supply-entries = <&dsi_panel_pwr_supply>; + qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_dcs"; + qcom,mdss-dsi-bl-min-level = <1>; + qcom,mdss-dsi-bl-max-level = <1023>; + qcom,mdss-brightness-max-level = <255>; + qcom,platform-reset-gpio = <&tlmm 75 0>; + qcom,mdss-dsi-panel-test-pin = <&tlmm 46 0>; +}; + +&dsi_sw43404_amoled_fhd_plus_cmd { + qcom,panel-supply-entries = <&dsi_panel_pwr_supply>; + qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_dcs"; + qcom,mdss-dsi-bl-min-level = <1>; + qcom,mdss-dsi-bl-max-level = <1023>; + qcom,mdss-brightness-max-level = <255>; + qcom,platform-te-gpio = <&tlmm 66 0>; + qcom,platform-reset-gpio = <&tlmm 75 0>; + qcom,mdss-dsi-panel-test-pin = <&tlmm 46 0>; +}; + +&dsi_sim_cmd { + qcom,panel-supply-entries = <&dsi_panel_pwr_supply>; + qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_dcs"; + qcom,platform-reset-gpio = <&tlmm 75 0>; +}; + +&dsi_sim_vid { + qcom,panel-supply-entries = <&dsi_panel_pwr_supply>; + qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_dcs"; + qcom,platform-reset-gpio = <&tlmm 75 0>; +}; + +&dsi_sim_dsc_375_cmd { + qcom,panel-supply-entries = <&dsi_panel_pwr_supply>; + qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_dcs"; + qcom,platform-reset-gpio = <&tlmm 75 0>; +}; + +&dsi_sim_dsc_10b_cmd { + qcom,panel-supply-entries = <&dsi_panel_pwr_supply>; + qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_dcs"; + qcom,platform-reset-gpio = <&tlmm 75 0>; +}; + +&dsi_dual_sim_cmd { + qcom,panel-supply-entries = <&dsi_panel_pwr_supply>; + qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_dcs"; + qcom,platform-reset-gpio = <&tlmm 75 0>; +}; + +&dsi_dual_sim_vid { + qcom,panel-supply-entries = <&dsi_panel_pwr_supply>; + qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_dcs"; + qcom,platform-reset-gpio = <&tlmm 75 0>; +}; + +&dsi_dual_sim_dsc_375_cmd { + qcom,panel-supply-entries = <&dsi_panel_pwr_supply>; + qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_dcs"; + qcom,platform-reset-gpio = <&tlmm 75 0>; +}; + +&thermal_zones { + conn-therm-usr { + polling-delay-passive = <0>; + polling-delay = <0>; + thermal-governor = "user_space"; + thermal-sensors = <&pm8150b_adc_tm ADC_AMUX_THM3_PU2>; + trips { + active-config0 { + temperature = <125000>; + hysteresis = <1000>; + type = "passive"; + }; + }; + }; + + xo-therm-usr { + polling-delay-passive = <0>; + polling-delay = <0>; + thermal-governor = "user_space"; + thermal-sensors = <&pm8150_adc_tm ADC_XO_THERM_PU2>; + trips { + active-config0 { + temperature = <125000>; + hysteresis = <1000>; + type = "passive"; + }; + }; + }; + + skin-therm-usr { + polling-delay-passive = <0>; + polling-delay = <0>; + thermal-governor = "user_space"; + thermal-sensors = <&pm8150_adc_tm ADC_AMUX_THM1_PU2>; + trips { + active-config0 { + temperature = <125000>; + hysteresis = <1000>; + type = "passive"; + }; + }; + }; + + mmw-pa1-usr { + polling-delay-passive = <0>; + polling-delay = <0>; + thermal-governor = "user_space"; + thermal-sensors = <&pm8150_adc_tm ADC_AMUX_THM2_PU2>; + trips { + active-config0 { + temperature = <125000>; + hysteresis = <1000>; + type = "passive"; + }; + }; + }; + + camera-therm-usr { + polling-delay-passive = <0>; + polling-delay = <0>; + thermal-governor = "user_space"; + thermal-sensors = <&pm8150l_adc_tm ADC_AMUX_THM1_PU2>; + trips { + active-config0 { + temperature = <125000>; + hysteresis = <1000>; + type = "passive"; + }; + }; + }; + + skin-msm-therm-usr { + polling-delay-passive = <0>; + polling-delay = <0>; + thermal-governor = "user_space"; + thermal-sensors = <&pm8150l_adc_tm ADC_AMUX_THM2_PU2>; + trips { + active-config0 { + temperature = <125000>; + hysteresis = <1000>; + type = "passive"; + }; + }; + }; + + mmw-pa2-usr { + polling-delay-passive = <0>; + polling-delay = <0>; + thermal-governor = "user_space"; + thermal-sensors = <&pm8150l_adc_tm ADC_AMUX_THM3_PU2>; + trips { + active-config0 { + temperature = <125000>; + hysteresis = <1000>; + type = "passive"; + }; + }; + }; +}; + +&sdhc_2 { + vdd-supply = <&pm8150a_l9>; + qcom,vdd-voltage-level = <2950000 2960000>; + qcom,vdd-current-level = <200 800000>; + + vdd-io-supply = <&pm8150a_l6>; + qcom,vdd-io-voltage-level = <1808000 2960000>; + qcom,vdd-io-current-level = <200 22000>; + + pinctrl-names = "active", "sleep"; + pinctrl-0 = <&sdc2_clk_on &sdc2_cmd_on &sdc2_data_on &storage_cd>; + pinctrl-1 = <&sdc2_clk_off &sdc2_cmd_off &sdc2_data_off &storage_cd>; + + cd-gpios = <&tlmm 77 GPIO_ACTIVE_HIGH>; /* Morpheus has to be HIGH */ + + status = "disabled"; +}; + +&vendor { + bluetooth: bt_qca6390 { + compatible = "qca,qca6390"; + pinctrl-names = "default"; + pinctrl-0 = <&bt_en_sleep>; + qca,bt-reset-gpio = <&tlmm 21 0>; /* BT_EN */ + qca,bt-sw-ctrl-gpio = <&tlmm 124 0>; /* SW_CTRL */ + qca,bt-vdd-aon-supply = <&pm8150_s6>; + qca,bt-vdd-dig-supply = <&pm8150_s6>; + qca,bt-vdd-rfa1-supply = <&pm8150_s5>; + qca,bt-vdd-rfa2-supply = <&pm8150a_s8>; + qca,bt-vdd-asd-supply = <&pm8150_l16>; + + qca,bt-vdd-aon-voltage-level = <950000 950000>; + qca,bt-vdd-dig-voltage-level = <950000 952000>; + qca,bt-vdd-rfa1-voltage-level = <1900000 1900000>; + qca,bt-vdd-rfa2-voltage-level = <1350000 1350000>; + qca,bt-vdd-asd-voltage-level = <3024000 3304000>; + + qca,bt-vdd-asd-current-level = <10000>; + }; +}; + +&usb0 { + dwc3@a600000 { + maximum-speed = "super-speed-plus"; + }; +}; + +&usb1 { + qcom,default-mode-none; +}; + +&wil6210 { + status = "disabled"; +}; + +&usb2_phy0 { + qcom,param-override-seq = + <0xc7 0x6c + 0x0f 0x70 + 0x03 0x74>; +}; + +&mdss_mdp { + qcom,sde-mixer-display-pref = "primary", "primary", "primary", + "primary", "none", "none"; +}; + +&kona_snd { + qcom,model = "kona-arglass-snd-card"; + qcom,mi2s-audio-intf = <0>; + qcom,audio-routing = + "TX DMIC0", "Digital Mic0", + "TX DMIC1", "Digital Mic1", + "TX DMIC2", "Digital Mic2", + "TX DMIC3", "Digital Mic3", + "TX DMIC4", "Digital Mic4", + "IN1_HPHL", "HPHL_OUT", + "IN2_HPHR", "HPHR_OUT", + "IN3_AUX", "AUX_OUT", + "TX SWR_ADC0", "ADC1_OUTPUT", + "TX SWR_ADC1", "ADC2_OUTPUT", + "TX SWR_ADC2", "ADC3_OUTPUT", + "TX SWR_ADC3", "ADC4_OUTPUT", + "TX SWR_DMIC0", "DMIC1_OUTPUT", + "TX SWR_DMIC1", "DMIC2_OUTPUT", + "TX SWR_DMIC2", "DMIC3_OUTPUT", + "TX SWR_DMIC3", "DMIC4_OUTPUT", + "TX SWR_DMIC4", "DMIC5_OUTPUT", + "TX SWR_DMIC5", "DMIC6_OUTPUT", + "TX SWR_DMIC6", "DMIC7_OUTPUT", + "TX SWR_DMIC7", "DMIC8_OUTPUT", + "WSA SRC0_INP", "SRC0", + "WSA_TX DEC0_INP", "TX DEC0 MUX", + "WSA_TX DEC1_INP", "TX DEC1 MUX", + "RX_TX DEC0_INP", "TX DEC0 MUX", + "RX_TX DEC1_INP", "TX DEC1 MUX", + "RX_TX DEC2_INP", "TX DEC2 MUX", + "RX_TX DEC3_INP", "TX DEC3 MUX", + "SpkrRight IN", "WSA_SPK2 OUT", + "VA_AIF1 CAP", "VA_SWR_CLK", + "VA_AIF2 CAP", "VA_SWR_CLK", + "VA_AIF3 CAP", "VA_SWR_CLK", + "VA DMIC0", "Digital Mic0", + "VA DMIC1", "Digital Mic1", + "VA DMIC2", "Digital Mic2", + "VA DMIC3", "Digital Mic3", + "VA DMIC4", "Digital Mic4", + "VA SWR_ADC1", "VA_SWR_CLK", + "VA SWR_MIC0", "VA_SWR_CLK", + "VA SWR_MIC1", "VA_SWR_CLK", + "VA SWR_MIC2", "VA_SWR_CLK", + "VA SWR_MIC3", "VA_SWR_CLK", + "VA SWR_MIC4", "VA_SWR_CLK", + "VA SWR_MIC5", "VA_SWR_CLK", + "VA SWR_MIC6", "VA_SWR_CLK", + "VA SWR_MIC7", "VA_SWR_CLK", + "VA SWR_MIC0", "DMIC1_OUTPUT", + "VA SWR_MIC1", "DMIC2_OUTPUT", + "VA SWR_MIC2", "DMIC3_OUTPUT", + "VA SWR_MIC3", "DMIC4_OUTPUT", + "VA SWR_MIC4", "DMIC5_OUTPUT", + "VA SWR_MIC5", "DMIC6_OUTPUT", + "VA SWR_MIC6", "DMIC7_OUTPUT", + "VA SWR_MIC7", "DMIC8_OUTPUT", + "VA SWR_ADC1", "ADC2_OUTPUT"; + qcom,msm-mbhc-hphl-swh = <0>; + qcom,msm-mbhc-gnd-swh = <0>; + qcom,cdc-dmic01-gpios = <&cdc_dmic01_gpios>; + qcom,cdc-dmic23-gpios = <&cdc_dmic23_gpios>; + qcom,cdc-dmic45-gpios = <&cdc_dmic45_gpios>; + asoc-codec = <&stub_codec>, <&bolero>, <&ext_disp_audio_codec>; + asoc-codec-names = "msm-stub-codec.1", "bolero_codec", + "msm-ext-disp-audio-codec-rx"; + qcom,wsa-max-devs = <2>; + qcom,wsa-devs = <&wsa881x_0211>, <&wsa881x_0212>, + <&wsa881x_0213>, <&wsa881x_0214>; + qcom,wsa-aux-dev-prefix = "SpkrLeft", "SpkrRight", + "SpkrLeft", "SpkrRight"; + qcom,codec-max-aux-devs = <0>; + /delete-property/ qcom,codec-aux-devs; + qcom,msm_audio_ssr_devs = <&audio_apr>, <&q6core>, <&lpi_tlmm>, + <&bolero>; +}; + +&wcd938x_tx_slave { + status = "disabled"; +}; + +&wcd938x_rx_slave { + status = "disabled"; +}; + +&wcd938x_codec { + status = "disabled"; +}; + +&pm8150a_l4 { + qcom,init-voltage = <2800000>; +}; + +&pm8150a_l3 { + qcom,init-voltage = <1200000>; +}; + +&pm8150a_l9 { + qcom,init-voltage = <2800000>; +}; + +&sde_dp { + status="disabled"; +}; + +&mdss_mdp { + connectors = <&sde_wb &sde_dsi &sde_dsi1 &sde_rscc>; +}; + +&wlan { + vdd-wlan-dig-supply = <&pm8150_s6>; + qcom,vdd-wlan-dig-config = <950000 950000 0 0 1>; + qcom,cmd_db_name = "smpa6"; +}; diff --git a/qcom/kona-mtp.dtsi b/qcom/kona-mtp.dtsi index ec769b0c..6c64598e 100644 --- a/qcom/kona-mtp.dtsi +++ b/qcom/kona-mtp.dtsi @@ -333,14 +333,6 @@ qcom,pre-scaling = <1 3>; }; - xo_therm@4c { - reg = <ADC_XO_THERM_PU2>; - label = "xo_therm"; - qcom,ratiometric; - qcom,hw-settle-time = <200>; - qcom,pre-scaling = <1 1>; - }; - skin_therm@4d { reg = <ADC_AMUX_THM1_PU2>; label = "skin_therm"; @@ -410,16 +402,9 @@ #address-cells = <1>; #size-cells = <0>; - io-channels = <&pm8150_vadc ADC_XO_THERM_PU2>, - <&pm8150_vadc ADC_AMUX_THM1_PU2>, + io-channels = <&pm8150_vadc ADC_AMUX_THM1_PU2>, <&pm8150_vadc ADC_AMUX_THM2_PU2>; - xo_therm@4c { - reg = <ADC_XO_THERM_PU2>; - qcom,ratiometric; - qcom,hw-settle-time = <200>; - }; - skin_therm@4d { reg = <ADC_AMUX_THM1_PU2>; qcom,ratiometric; @@ -565,21 +550,6 @@ }; }; - xo-therm-usr { - polling-delay-passive = <0>; - polling-delay = <0>; - thermal-governor = "user_space"; - thermal-sensors = <&pm8150_adc_tm ADC_XO_THERM_PU2>; - wake-capable-sensor; - trips { - active-config0 { - temperature = <125000>; - hysteresis = <1000>; - type = "passive"; - }; - }; - }; - skin-therm-usr { polling-delay-passive = <0>; polling-delay = <0>; diff --git a/qcom/kona-sde-display.dtsi b/qcom/kona-sde-display.dtsi index 89ce8c87..f77a9d13 100644 --- a/qcom/kona-sde-display.dtsi +++ b/qcom/kona-sde-display.dtsi @@ -22,6 +22,7 @@ #include "dsi-panel-sim-sec-hd-cmd.dtsi" #include "dsi-panel-xrsmrtvwr-jdi-dual-video.dtsi" #include "dsi-panel-r66451-dsc-fhd-plus-144hz-cmd.dtsi" +#include "dsi-panel-arglass-seeya-dual-1080p-video.dtsi" #include <dt-bindings/clock/mdss-7nm-pll-clk.h> &tlmm { @@ -308,6 +309,25 @@ }; }; +&dsi_dual_arglass_seeya_video { + qcom,mdss-dsi-min-refresh-rate = <60>; + qcom,mdss-dsi-max-refresh-rate = <60>; + qcom,mdss-dsi-panel-status-command = [06 01 00 01 00 00 01 0a]; + qcom,mdss-dsi-panel-status-command-state = "dsi_hs_mode"; + qcom,mdss-dsi-panel-status-value = <0x9c>; + qcom,mdss-dsi-panel-on-check-value = <0x9c>; + qcom,mdss-dsi-panel-status-read-length = <1>; + qcom,dsi-select-clocks = "mux_byte_clk0", "mux_pixel_clk0"; + qcom,mdss-dsi-display-timings { + timing@0 { + qcom,mdss-dsi-panel-phy-timings = [00 11 04 04 12 1E + 04 04 04 03 02 04 0F 09]; + qcom,display-topology = <2 0 2>; + qcom,default-topology-index = <0>; + }; + }; +}; + &dsi_dual_xrsmrtvwr_jdi_video { qcom,mdss-dsi-min-refresh-rate = <53>; qcom,mdss-dsi-max-refresh-rate = <80>; diff --git a/qcom/kona-sde.dtsi b/qcom/kona-sde.dtsi index 5bbfbf2b..7f876044 100644 --- a/qcom/kona-sde.dtsi +++ b/qcom/kona-sde.dtsi @@ -96,6 +96,7 @@ qcom,sde-dsc-off = <0x81000 0x81400 0x81800 0x81c00>; qcom,sde-dsc-size = <0x140>; qcom,sde-dsc-pair-mask = <2 1 4 3>; + qcom,sde-dsc-linewidth = <2048>; qcom,sde-dither-off = <0x30e0 0x30e0 0x30e0 0x30e0 0x30e0 0x30e0>; @@ -404,8 +405,6 @@ qcom,widebus-enable; qcom,dsc-feature-enable; qcom,fec-feature-enable; - qcom,max-dp-dsc-blks = <2>; - qcom,max-dp-dsc-input-width-pixs = <2048>; qcom,ctrl-supply-entries { #address-cells = <1>; diff --git a/qcom/kona-v2-arglass.dts b/qcom/kona-v2-arglass.dts new file mode 100644 index 00000000..8d4b0f07 --- /dev/null +++ b/qcom/kona-v2-arglass.dts @@ -0,0 +1,10 @@ +/dts-v1/; + +#include "kona-v2.dtsi" +#include "kona-arglass.dtsi" + +/ { + model = "Qualcomm Technologies, Inc. kona AR Glass"; + compatible = "qcom,kona-mtp", "qcom,kona", "qcom,mtp"; + qcom,board-id = <0x1040008 0>; +}; diff --git a/qcom/kona-v2.1-arglass.dts b/qcom/kona-v2.1-arglass.dts new file mode 100644 index 00000000..3ae49243 --- /dev/null +++ b/qcom/kona-v2.1-arglass.dts @@ -0,0 +1,10 @@ +/dts-v1/; + +#include "kona-v2.1.dtsi" +#include "kona-arglass.dtsi" + +/ { + model = "Qualcomm Technologies, Inc. kona v2.1 AR Glass"; + compatible = "qcom,kona-mtp", "qcom,kona", "qcom,mtp"; + qcom,board-id = <0x1040008 0>; +}; diff --git a/qcom/msm-arm-smmu-lagoon.dtsi b/qcom/msm-arm-smmu-lagoon.dtsi index 6d7eabcc..be474f75 100644 --- a/qcom/msm-arm-smmu-lagoon.dtsi +++ b/qcom/msm-arm-smmu-lagoon.dtsi @@ -7,6 +7,7 @@ reg = <0x3d40000 0x10000>; #iommu-cells = <1>; qcom,use-3-lvl-tables; + qcom,no-dynamic-asid; #global-interrupts = <2>; qcom,regulator-names = "vdd"; vdd-supply = <&gpu_cx_gdsc>; diff --git a/qcom/msm-audio-lpass.dtsi b/qcom/msm-audio-lpass.dtsi index 360e984a..a9496d85 100644 --- a/qcom/msm-audio-lpass.dtsi +++ b/qcom/msm-audio-lpass.dtsi @@ -253,6 +253,71 @@ qcom,msm-dai-q6 { compatible = "qcom,msm-dai-q6"; + sb_0_rx: qcom,msm-dai-q6-sb-0-rx { + compatible = "qcom,msm-dai-q6-dev"; + qcom,msm-dai-q6-dev-id = <16384>; + }; + + sb_0_tx: qcom,msm-dai-q6-sb-0-tx { + compatible = "qcom,msm-dai-q6-dev"; + qcom,msm-dai-q6-dev-id = <16385>; + }; + + sb_1_rx: qcom,msm-dai-q6-sb-1-rx { + compatible = "qcom,msm-dai-q6-dev"; + qcom,msm-dai-q6-dev-id = <16386>; + }; + + sb_1_tx: qcom,msm-dai-q6-sb-1-tx { + compatible = "qcom,msm-dai-q6-dev"; + qcom,msm-dai-q6-dev-id = <16387>; + }; + + sb_2_rx: qcom,msm-dai-q6-sb-2-rx { + compatible = "qcom,msm-dai-q6-dev"; + qcom,msm-dai-q6-dev-id = <16388>; + }; + + sb_2_tx: qcom,msm-dai-q6-sb-2-tx { + compatible = "qcom,msm-dai-q6-dev"; + qcom,msm-dai-q6-dev-id = <16389>; + }; + + sb_3_rx: qcom,msm-dai-q6-sb-3-rx { + compatible = "qcom,msm-dai-q6-dev"; + qcom,msm-dai-q6-dev-id = <16390>; + }; + + sb_3_tx: qcom,msm-dai-q6-sb-3-tx { + compatible = "qcom,msm-dai-q6-dev"; + qcom,msm-dai-q6-dev-id = <16391>; + }; + + sb_4_rx: qcom,msm-dai-q6-sb-4-rx { + compatible = "qcom,msm-dai-q6-dev"; + qcom,msm-dai-q6-dev-id = <16392>; + }; + + sb_4_tx: qcom,msm-dai-q6-sb-4-tx { + compatible = "qcom,msm-dai-q6-dev"; + qcom,msm-dai-q6-dev-id = <16393>; + }; + + sb_5_tx: qcom,msm-dai-q6-sb-5-tx { + compatible = "qcom,msm-dai-q6-dev"; + qcom,msm-dai-q6-dev-id = <16395>; + }; + + sb_5_rx: qcom,msm-dai-q6-sb-5-rx { + compatible = "qcom,msm-dai-q6-dev"; + qcom,msm-dai-q6-dev-id = <16394>; + }; + + sb_6_rx: qcom,msm-dai-q6-sb-6-rx { + compatible = "qcom,msm-dai-q6-dev"; + qcom,msm-dai-q6-dev-id = <16396>; + }; + sb_7_rx: qcom,msm-dai-q6-sb-7-rx { compatible = "qcom,msm-dai-q6-dev"; qcom,msm-dai-q6-dev-id = <16398>; @@ -265,6 +330,11 @@ qcom,msm-dai-q6-slim-dev-id = <0>; }; + sb_8_rx: qcom,msm-dai-q6-sb-8-rx { + compatible = "qcom,msm-dai-q6-dev"; + qcom,msm-dai-q6-dev-id = <16400>; + }; + sb_8_tx: qcom,msm-dai-q6-sb-8-tx { compatible = "qcom,msm-dai-q6-dev"; qcom,msm-dai-q6-dev-id = <16401>; diff --git a/qcom/msm8917-pm.dtsi b/qcom/msm8917-pm.dtsi index b9288ff7..30978710 100644 --- a/qcom/msm8917-pm.dtsi +++ b/qcom/msm8917-pm.dtsi @@ -33,7 +33,7 @@ reg = <0>; label = "perf-l2-wfi"; qcom,psci-mode = <1>; - qcom,entry-latency-us = <38>; /* TBD */ + qcom,entry-latency-us = <125>; qcom,exit-latency-us = <180>; qcom,min-residency-us = <305>; }; @@ -42,9 +42,9 @@ reg = <1>; label = "perf-l2-gdhs"; qcom,psci-mode = <4>; - qcom,entry-latency-us = <800>; /* TBD */ + qcom,entry-latency-us = <240>; qcom,exit-latency-us = <280>; - qcom,min-residency-us = <520>; + qcom,min-residency-us = <806>; qcom,min-child-idx = <1>; qcom,reset-level = <LPM_RESET_LVL_GDHS>; }; @@ -53,9 +53,9 @@ reg = <2>; label = "perf-l2-retention"; qcom,psci-mode = <2>; - qcom,entry-latency-us = <640>; /* TBD */ + qcom,entry-latency-us = <700>; qcom,exit-latency-us = <650>; - qcom,min-residency-us = <1350>; + qcom,min-residency-us = <1972>; qcom,min-child-idx = <1>; qcom,reset-level = <LPM_RESET_LVL_RET>; }; @@ -64,9 +64,9 @@ reg = <3>; label = "perf-l2-pc"; qcom,psci-mode = <5>; - qcom,entry-latency-us = <800>; /* TBD */ + qcom,entry-latency-us = <800>; qcom,exit-latency-us = <11200>; - qcom,min-residency-us = <1700>; + qcom,min-residency-us = <6501>; qcom,min-child-idx = <1>; qcom,is-reset; qcom,notify-rpm; @@ -84,7 +84,7 @@ reg = <0>; label = "wfi"; qcom,psci-cpu-mode = <1>; - qcom,entry-latency-us = <49>; /* TBD */ + qcom,entry-latency-us = <13>; qcom,exit-latency-us = <12>; qcom,min-residency-us = <25>; }; @@ -93,9 +93,9 @@ reg = <1>; label = "pc"; qcom,psci-cpu-mode = <3>; - qcom,entry-latency-us = <290>; /* TBD */ + qcom,entry-latency-us = <125>; qcom,exit-latency-us = <180>; - qcom,min-residency-us = <305>; + qcom,min-residency-us = <595>; qcom,use-broadcast-timer; qcom,is-reset; qcom,reset-level = <LPM_RESET_LVL_PC>; diff --git a/qcom/msm8917.dtsi b/qcom/msm8917.dtsi index 8628a7b3..037033b8 100644 --- a/qcom/msm8917.dtsi +++ b/qcom/msm8917.dtsi @@ -573,7 +573,7 @@ }; debugcc: qcom,cc-debug { - compatible = "qcom,msm8917-debugcc"; + compatible = "qcom,qm215-debugcc"; reg = <0x1874000 0x4>, <0xb01101c 0x8>; reg-names = "cc_base", "meas"; @@ -597,9 +597,10 @@ compatible = "qcom,cpu-clock-qm215"; reg = <0xb011050 0x8>, <0xb016000 0x34>, - <0x00a412c 0x8>; + <0x00a412c 0x8>, + <0xb011200 0x100>; reg-names = "apcs-c1-rcg-base", - "apcs_pll", "efuse"; + "apcs_pll1", "efuse", "spm_c1_base"; cpu-vdd-supply = <&apc_vreg_corner>; vdd_dig_ao-supply = <&pm8916_s1_level_ao>; vdd_hf_pll-supply = <&pm8916_l7_ao>; diff --git a/qcom/msm8937-audio.dtsi b/qcom/msm8937-audio.dtsi index 8dd711d0..fbf539af 100644 --- a/qcom/msm8937-audio.dtsi +++ b/qcom/msm8937-audio.dtsi @@ -257,23 +257,16 @@ asoc-cpu = <&dai_pri_auxpcm>, <&dai_mi2s2>, <&dai_mi2s3>, <&dai_mi2s5>, - /* TBD - * <&sb_0_rx>, <&sb_0_tx>, <&sb_1_rx>, <&sb_1_tx>, - * <&sb_2_rx>, <&sb_2_tx>, <&sb_3_rx>, <&sb_3_tx>, - * <&sb_4_rx>, <&sb_4_tx>, <&sb_5_tx>, - */ + <&sb_0_rx>, <&sb_0_tx>, <&sb_1_rx>, <&sb_1_tx>, + <&sb_2_rx>, <&sb_2_tx>, <&sb_3_rx>, <&sb_3_tx>, + <&sb_4_rx>, <&sb_4_tx>, <&sb_5_tx>, <&afe_pcm_rx>, <&afe_pcm_tx>, <&afe_proxy_rx>, <&afe_proxy_tx>, <&incall_record_rx>, <&incall_record_tx>, <&incall_music_rx>, <&incall_music_2_rx>, - /* TBD - * <&sb_5_rx>, <&bt_sco_rx>, <&bt_sco_tx>, - */ - <&int_fm_rx>, <&int_fm_tx>; - /* TBD - * , <&sb_6_rx>, - * <&proxy_rx>, <&proxy_tx>; - */ + <&sb_5_rx>, <&bt_sco_rx>, <&bt_sco_tx>, + <&int_fm_rx>, <&int_fm_tx>, <&sb_6_rx>, + <&proxy_rx>, <&proxy_tx>; asoc-cpu-names = "msm-dai-q6-auxpcm.1", "msm-dai-q6-mi2s.2", "msm-dai-q6-mi2s.3", @@ -289,10 +282,8 @@ "msm-dai-q6-dev.32773", "msm-dai-q6-dev.32770", "msm-dai-q6-dev.16394", "msm-dai-q6-dev.12288", "msm-dai-q6-dev.12289", "msm-dai-q6-dev.12292", - "msm-dai-q6-dev.12293", "msm-dai-q6-dev.16396"; - /* TBD - * "msm-dai-q6-dev.8194", "msm-dai-q6-dev.8195"; - */ + "msm-dai-q6-dev.12293", "msm-dai-q6-dev.16396", + "msm-dai-q6-dev.8194", "msm-dai-q6-dev.8195"; asoc-codec = <&stub_codec>, <&hdmi_dba>; asoc-codec-names = "msm-stub-codec.1", "msm-hdmi-dba-codec-rx"; @@ -322,6 +313,8 @@ clock_audio: audio_ext_clk { status = "disabled"; compatible = "qcom,audio-ref-clk"; + qcom,use-pinctrl = <1>; + qcom,codec-ext-clk-src = <14>; clock-names = "osr_clk"; qcom,node_has_rpm_clock; #clock-cells = <1>; @@ -364,10 +357,8 @@ qcom,wcd-rst-gpio-node = <&wcd_rst_gpio>; clock-names = "wcd_clk", "wcd_native_clk"; - /* TODO - * clocks = < &clock_audio clk_audio_pmi_clk>, - * <&clock_audio clk_audio_ap_clk2>; - */ + clocks = < &clock_audio 0>, + <&clock_audio_native 0>; qcom,cdc-static-supplies = "cdc-vdd-buck", diff --git a/qcom/msm8937-interposer-sdm429.dtsi b/qcom/msm8937-interposer-sdm429.dtsi index 0b4f974c..c05f0135 100644 --- a/qcom/msm8937-interposer-sdm429.dtsi +++ b/qcom/msm8937-interposer-sdm429.dtsi @@ -1,7 +1,7 @@ #include "msm8937-interposer-sdm439.dtsi" #include "sdm429-cpu.dtsi" -&clock_cpu { +&apsscc { qcom,cpu-isolation { /delete-node/ cpu4-isolate; /delete-node/ cpu5-isolate; diff --git a/qcom/msm8937-interposer-sdm439.dtsi b/qcom/msm8937-interposer-sdm439.dtsi index 543e3632..4c9e5127 100644 --- a/qcom/msm8937-interposer-sdm439.dtsi +++ b/qcom/msm8937-interposer-sdm439.dtsi @@ -159,9 +159,9 @@ qcom,cpr-enable; }; - qcom,cpu-clock-8939@b111050 { + qcom,clock-cpu@b111050 { vdd-c0-supply = <&apc_vreg_corner>; - vdd-c1-supply = <&apc_vreg_corner>; + cpu-vdd-supply = <&apc_vreg_corner>; vdd-cci-supply = <&apc_vreg_corner>; }; }; diff --git a/qcom/msm8937-pm.dtsi b/qcom/msm8937-pm.dtsi index 69fe3b9d..0f2d91ff 100644 --- a/qcom/msm8937-pm.dtsi +++ b/qcom/msm8937-pm.dtsi @@ -37,8 +37,7 @@ reg = <0>; label = "system-active"; qcom,psci-mode = <0>; - /* TBD */ - qcom,entry-latency-us = <640>; + qcom,entry-latency-us = <565>; qcom,exit-latency-us = <415>; qcom,min-residency-us = <980>; }; @@ -47,10 +46,9 @@ reg = <1>; label = "system-wfi"; qcom,psci-mode = <1>; - /* TBD */ - qcom,entry-latency-us = <38>; + qcom,entry-latency-us = <575>; qcom,exit-latency-us = <475>; - qcom,min-residency-us = <1050>; + qcom,min-residency-us = <3288>; qcom,min-child-idx = <1>; }; @@ -58,10 +56,9 @@ reg = <2>; label = "system-ret"; qcom,psci-mode = <2>; - /* TBD */ - qcom,entry-latency-us = <640>; + qcom,entry-latency-us = <350>; qcom,exit-latency-us = <900>; - qcom,min-residency-us = <1250>; + qcom,min-residency-us = <6272>; qcom,min-child-idx = <1>; qcom,reset-level = <LPM_RESET_LVL_RET>; }; @@ -70,10 +67,9 @@ reg = <3>; label = "system-pc"; qcom,psci-mode = <3>; - /* TBD */ - qcom,entry-latency-us = <800>; + qcom,entry-latency-us = <644>; qcom,exit-latency-us = <10782>; - qcom,min-residency-us = <1426>; + qcom,min-residency-us = <7500>; qcom,min-child-idx = <2>; qcom,notify-rpm; qcom,is-reset; @@ -92,8 +88,7 @@ reg = <0>; label = "perf-l2-wfi"; qcom,psci-mode = <1>; - /* TBD */ - qcom,entry-latency-us = <38>; + qcom,entry-latency-us = <116>; qcom,exit-latency-us = <210>; qcom,min-residency-us = <326>; }; @@ -102,10 +97,9 @@ reg = <1>; label = "perf-l2-gdhs"; qcom,psci-mode = <4>; - /* TBD */ - qcom,entry-latency-us = <640>; + qcom,entry-latency-us = <360>; qcom,exit-latency-us = <267>; - qcom,min-residency-us = <627>; + qcom,min-residency-us = <967>; qcom,min-child-idx = <1>; qcom,reset-level = <LPM_RESET_LVL_GDHS>; }; @@ -114,10 +108,9 @@ reg = <2>; label = "perf-l2-pc"; qcom,psci-mode = <5>; - /* TBD */ - qcom,entry-latency-us = <800>; + qcom,entry-latency-us = <574>; qcom,exit-latency-us = <305>; - qcom,min-residency-us = <879>; + qcom,min-residency-us = <3118>; qcom,min-child-idx = <1>; qcom,is-reset; qcom,reset-level = <LPM_RESET_LVL_PC>; @@ -134,8 +127,7 @@ reg = <0>; qcom,psci-cpu-mode = <0>; label = "wfi"; - /* TBD */ - qcom,entry-latency-us = <49>; + qcom,entry-latency-us = <66>; qcom,exit-latency-us = <1>; qcom,min-residency-us = <67>; }; @@ -144,10 +136,9 @@ reg = <1>; qcom,psci-cpu-mode = <3>; label = "pc"; - /* TBD */ - qcom,entry-latency-us = <290>; + qcom,entry-latency-us = <136>; qcom,exit-latency-us = <190>; - qcom,min-residency-us = <326>; + qcom,min-residency-us = <901>; qcom,use-broadcast-timer; qcom,is-reset; qcom,reset-level = @@ -168,8 +159,7 @@ reg = <0>; label = "pwr-l2-wfi"; qcom,psci-mode = <1>; - /* TBD */ - qcom,entry-latency-us = <38>; + qcom,entry-latency-us = <179>; qcom,exit-latency-us = <221>; qcom,min-residency-us = <400>; }; @@ -178,10 +168,9 @@ reg = <1>; label = "pwr-l2-gdhs"; qcom,psci-mode = <4>; - /* TBD */ - qcom,entry-latency-us = <640>; + qcom,entry-latency-us = <380>; qcom,exit-latency-us = <337>; - qcom,min-residency-us = <717>; + qcom,min-residency-us = <981>; qcom,min-child-idx = <1>; qcom,reset-level = <LPM_RESET_LVL_GDHS>; @@ -191,10 +180,9 @@ reg = <2>; label = "pwr-l2-pc"; qcom,psci-mode = <5>; - /* TBD */ - qcom,entry-latency-us = <800>; + qcom,entry-latency-us = <565>; qcom,exit-latency-us = <415>; - qcom,min-residency-us = <980>; + qcom,min-residency-us = <3561>; qcom,min-child-idx = <1>; qcom,is-reset; qcom,reset-level = @@ -212,8 +200,7 @@ reg = <0>; qcom,psci-cpu-mode = <0>; label = "wfi"; - /* TBD */ - qcom,entry-latency-us = <49>; + qcom,entry-latency-us = <56>; qcom,exit-latency-us = <1>; qcom,min-residency-us = <57>; }; @@ -222,10 +209,9 @@ reg = <1>; qcom,psci-cpu-mode = <3>; label = "pc"; - /* TBD */ - qcom,entry-latency-us = <290>; + qcom,entry-latency-us = <179>; qcom,exit-latency-us = <221>; - qcom,min-residency-us = <400>; + qcom,min-residency-us = <401>; qcom,use-broadcast-timer; qcom,is-reset; qcom,reset-level = diff --git a/qcom/msm8937-thermal.dtsi b/qcom/msm8937-thermal.dtsi index 28788978..d7a05a55 100644 --- a/qcom/msm8937-thermal.dtsi +++ b/qcom/msm8937-thermal.dtsi @@ -1,6 +1,6 @@ #include <dt-bindings/thermal/thermal.h> -&clock_cpu { +&apsscc { qcom,cpu-isolation { compatible = "qcom,cpu-isolate"; cpu0_isolate: cpu0-isolate { diff --git a/qcom/msm8937.dtsi b/qcom/msm8937.dtsi index 22e73057..dfacaa50 100644 --- a/qcom/msm8937.dtsi +++ b/qcom/msm8937.dtsi @@ -3,6 +3,7 @@ #include <dt-bindings/spmi/spmi.h> #include <dt-bindings/interrupt-controller/arm-gic.h> #include <dt-bindings/clock/qcom,gcc-sdm429w.h> +#include <dt-bindings/clock/qcom,cpu-sdm.h> #include <dt-bindings/clock/qcom,rpmcc.h> #include <dt-bindings/clock/mdss-28nm-pll-clk-legacy.h> @@ -584,12 +585,15 @@ #reset-cells = <1>; }; + cpu_debug: syscon@0b11101c { + compatible = "syscon"; + reg = <0xb11101c 0x4>; + }; + debugcc: qcom,cc-debug { - compatible = "qcom,msm8937-debugcc"; - reg = <0x1874000 0x4>, - <0xb11101c 0x8>; - reg-names = "cc_base", "meas"; + compatible = "qcom,sdm439-debugcc"; qcom,gcc = <&gcc>; + qcom,cpu = <&cpu_debug>; clocks = <&rpmcc RPM_SMD_XO_CLK_SRC>; clock-names = "xo_clk_src"; #clock-cells = <1>; @@ -607,17 +611,19 @@ #clock-cells = <1>; }; - clock_cpu: qcom,cpu-clock-8939@b111050 { - compatible = "qcom,cpu-clock-8939"; + apsscc: qcom,clock-cpu@b111050 { + compatible = "qcom,cpu-clock-sdm439"; reg = <0xb011050 0x8>, - <0xb111050 0x8>, + <0xb016000 0x34>, + <0xb011200 0x100>, <0xb1d1050 0x8>, + <0xb111050 0x8>, + <0xb116000 0x34>, + <0xb111200 0x100>, <0x00a412c 0x8>; - reg-names = "apcs-c1-rcg-base", "apcs-c0-rcg-base", - "apcs-cci-rcg-base", "efuse"; - vdd-c0-supply = <&apc_vreg_corner>; - vdd-c1-supply = <&apc_vreg_corner>; - vdd-cci-supply = <&apc_vreg_corner>; + reg-names = "apcs-c1-rcg-base", "apcs_pll1", "spm_c1_base", + "apcs-cci-rcg-base", "apcs-c0-rcg-base", + "apcs_pll0", "spm_c0_base", "efuse"; clocks = <&rpmcc RPM_SMD_XO_A_CLK_SRC>, <&gcc GPLL0_AO_OUT_MAIN>; clock-names = "xo_ao", "gpll0_ao" ; @@ -878,20 +884,10 @@ msm_cpufreq: qcom,msm-cpufreq { compatible = "qcom,msm-cpufreq"; - clock-names = "l2_clk", "cpu0_clk", "cpu1_clk", "cpu2_clk", - "cpu3_clk", "cpu4_clk", "cpu5_clk", - "cpu6_clk", "cpu7_clk"; - /* TODO - *clocks = <&clock_cpu clk_cci_clk>, - * <&clock_cpu clk_a53_bc_clk>, - * <&clock_cpu clk_a53_bc_clk>, - * <&clock_cpu clk_a53_bc_clk>, - * <&clock_cpu clk_a53_bc_clk>, - * <&clock_cpu clk_a53_lc_clk>, - * <&clock_cpu clk_a53_lc_clk>, - * <&clock_cpu clk_a53_lc_clk>, - * <&clock_cpu clk_a53_lc_clki>; - */ + clocks = <&apsscc APCS_MUX_CCI_CLK>, + <&apsscc APCS_MUX_C1_CLK>, + <&apsscc APCS_MUX_C0_CLK>; + clock-names = "l2_clk", "cpu0_clk", "cpu4_clk"; qcom,governor-per-policy; @@ -915,9 +911,7 @@ cci_cache: qcom,cci { compatible = "devfreq-simple-dev"; clock-names = "devfreq_clk"; - /* TODO - * clocks = <&clock_cpu clk_cci_clk/>; - */ + clocks = <&apsscc APCS_MUX_CCI_CLK>; governor = "performance"; freq-tbl-khz = < 400000 >, diff --git a/qcom/qm215.dtsi b/qcom/qm215.dtsi index baddee56..3efe1657 100644 --- a/qcom/qm215.dtsi +++ b/qcom/qm215.dtsi @@ -27,10 +27,6 @@ compatible = "qcom,gcc-qm215", "syscon"; }; -&debugcc { - compatible = "qcom,qm215-debugcc"; -}; - &msm_cpufreq { /delete-property/qcom,cpufreq-table; qcom,cpufreq-table = diff --git a/qcom/sdm429.dtsi b/qcom/sdm429.dtsi index a2279fa9..bbe4452a 100644 --- a/qcom/sdm429.dtsi +++ b/qcom/sdm429.dtsi @@ -31,16 +31,18 @@ }; }; + /delete-node/ syscon@0b11101c; + cpu_debug: syscon@0b01101c { + compatible = "syscon"; + reg = <0x0b01101c 0x4>; + }; + /delete-node/ qcom,msm-cpufreq; msm_cpufreq: qcom,msm-cpufreq { compatible = "qcom,msm-cpufreq"; - clock-names = - "l2_clk", - "cpu0_clk"; - /* TODO - * clocks = <&clock_cpu clk_cci_clk>, - * <&clock_cpu clk_a53_bc_clk>; - */ + clocks = <&apsscc APCS_MUX_CCI_CLK>, + <&apsscc APCS_MUX_C1_CLK>; + clock-names = "l2_clk", "cpu0_clk"; qcom,governor-per-policy; @@ -67,7 +69,7 @@ qcom,target-dev = <&cpu0_cpu_ddr_latfloor>; qcom,core-dev-table = < 1305600 MHZ_TO_MBPS(384, 8) >, - < 1804800 MHZ_TO_MBPS(557, 8) >; + < 1804800 MHZ_TO_MBPS(749, 8) >; }; }; @@ -111,36 +113,28 @@ }; &debugcc { - compatible = "qcom,msm8937-debugcc"; - reg = <0x1874000 0x4>, - <0xb01101c 0x8>; - reg-names = "cc_base", "meas"; - #clock-cells = <1>; + compatible = "qcom,sdm429-debugcc"; + qcom,cpu = <&cpu_debug>; }; &soc { - /delete-node/ qcom,cpu-clock-8939@b111050; - clock_cpu: qcom,cpu-clock-8939@b111050 { + /delete-node/ qcom,clock-cpu@b111050; + apsscc: qcom,clock-cpu@b111050 { compatible = "qcom,cpu-clock-sdm429"; - reg = <0xb011050 0x8>, <0xb1d1050 0x8>, - <0x00a412c 0x8>; + <0xb016000 0x34>, + <0x00a412c 0x8>, + <0xb011200 0x100>; reg-names = "apcs-c1-rcg-base", - "apcs-cci-rcg-base", "efuse"; - - qcom,num-cluster; - vdd-c1-supply = <&apc_vreg_corner>; - vdd-cci-supply = <&apc_vreg_corner>; - - clocks = <&gcc GPLL0_AO_CLK_SRC>, - /* TODO - * <&gcc A53SS_C1_PLL TODO>, - */ - <&gcc GPLL0_AO_CLK_SRC>, - <&gcc GPLL0_AO_CLK_SRC>; - clock-names = "clk-c1-4", "clk-c1-5", - "clk-cci-4", "clk-cci-2"; + "apcs-cci-rcg-base", "apcs_pll1", "efuse", + "spm_c1_base"; + clocks = <&rpmcc RPM_SMD_XO_A_CLK_SRC>, + <&gcc GPLL0_AO_OUT_MAIN>; + clock-names = "xo_ao", "gpll0_ao" ; + cpu-vdd-supply = <&apc_vreg_corner>; + vdd_dig_ao-supply = <&pm8953_s2_level_ao>; + vdd_hf_pll-supply = <&pm8953_l7_ao>; qcom,speed0-bin-v0-c1 = < 0 0>, diff --git a/qcom/sdm439-audio.dtsi b/qcom/sdm439-audio.dtsi index 45af372f..3c4bc7ec 100644 --- a/qcom/sdm439-audio.dtsi +++ b/qcom/sdm439-audio.dtsi @@ -16,6 +16,8 @@ clock_audio_native: audio_ext_clk_native { status = "disabled"; compatible = "qcom,audio-ref-clk"; + qcom,use-pinctrl = <1>; + qcom,codec-ext-clk-src = <2>; #clock-cells = <1>; qcom,codec-mclk-clk-freq = <11289600>; qcom,audio-ref-clk-gpio = <&tlmm 66 0>; diff --git a/qcom/sdm439-ext-audio-mtp.dtsi b/qcom/sdm439-ext-audio-mtp.dtsi index 2d53e873..ff2dc250 100644 --- a/qcom/sdm439-ext-audio-mtp.dtsi +++ b/qcom/sdm439-ext-audio-mtp.dtsi @@ -2,6 +2,10 @@ status = "disabled"; }; +&pmic_analog_codec { + status = "disabled"; +}; + &wsa881x_i2c_f { status = "disabled"; }; @@ -10,6 +14,10 @@ status = "disabled"; }; +&wsa881x_analog_clk { + status = "disabled"; +}; + &cdc_pri_mi2s_gpios { status = "disabled"; }; @@ -42,6 +50,10 @@ status = "okay"; }; +&clock_audio_native { + status = "okay"; +}; + &wcd9335 { status = "okay"; }; diff --git a/qcom/sdm439-pm8953.dtsi b/qcom/sdm439-pm8953.dtsi index 7dad3778..c3b2649e 100644 --- a/qcom/sdm439-pm8953.dtsi +++ b/qcom/sdm439-pm8953.dtsi @@ -76,9 +76,9 @@ vdd_hf_pll-supply = <&pm8953_l7_ao>; }; - qcom,cpu-clock-8939@b111050 { + qcom,clock-cpu@b111050 { /delete-property/ vdd-c0-supply; - /delete-property/ vdd-c1-supply; + /delete-property/ cpu-vdd-supply; /delete-property/ vdd-cci-supply; }; diff --git a/qcom/sdm439.dtsi b/qcom/sdm439.dtsi index 311fab9e..e0006c1f 100644 --- a/qcom/sdm439.dtsi +++ b/qcom/sdm439.dtsi @@ -36,15 +36,11 @@ /delete-node/ qcom,msm-cpufreq; msm_cpufreq: qcom,msm-cpufreq { compatible = "qcom,msm-cpufreq"; - clock-names = - "l2_clk", - "cpu0_clk", - "cpu4_clk"; - /* TODO - * clocks = <&clock_cpu clk_cci_clk>, - * <&clock_cpu clk_a53_bc_clk>, - * <&clock_cpu clk_a53_lc_clk>; - */ + + clocks = <&apsscc APCS_MUX_CCI_CLK>, + <&apsscc APCS_MUX_C1_CLK>, + <&apsscc APCS_MUX_C0_CLK>; + clock-names = "l2_clk", "cpu0_clk", "cpu4_clk"; qcom,governor-per-policy; @@ -115,9 +111,7 @@ cci_cache: qcom,cci { compatible = "devfreq-simple-dev"; clock-names = "devfreq_clk"; - /* TODO - * clocks = <&clock_cpu clk_cci_clk>; - */ + clocks = <&apsscc APCS_MUX_CCI_CLK>; governor = "performance"; freq-tbl-khz = < 400000 >, @@ -243,11 +237,12 @@ }; }; -&clock_cpu { - compatible = "qcom,cpu-clock-sdm439"; - vdd-c0-supply = <&apc_vreg_corner>; - vdd-c1-supply = <&apc_vreg_corner>; - vdd-cci-supply = <&apc_vreg_corner>; +&apsscc { + cpu-vdd-supply = <&apc_vreg_corner>; + vdd_hf_pll-supply = <&pm8953_l7_ao>; + vdd_dig_ao-supply = <&pm8953_s2_level_ao>; + vdd_sr2_pll-supply = <&pm8953_l7_ao>; + vdd_sr2_dig_ao-supply = <&pm8953_s2_level_ao>; qcom,speed0-bin-v0-c0 = < 0 0>, < 768000000 1>, diff --git a/qcom/sdm660-coresight.dtsi b/qcom/sdm660-coresight.dtsi index 041e8a4d..0758d73a 100644 --- a/qcom/sdm660-coresight.dtsi +++ b/qcom/sdm660-coresight.dtsi @@ -17,14 +17,14 @@ tmc_etr: tmc@6048000 { compatible = "arm,primecell"; - arm,primecell-periphid = <0x0003b961>; + arm,primecell-periphid = <0x000bb961>; reg = <0x6048000 0x1000>, <0x6064000 0x15000>; reg-names = "tmc-base", "bam-base"; arm,buffer-size = <0x400000>; - arm,sg-enable; + arm,scatter-gather; arm,default-sink; coresight-csr = <&csr>; @@ -46,7 +46,7 @@ replicator_qdss: replicator@6046000 { compatible = "arm,primecell"; - arm,primecell-periphid = <0x0003b909>; + arm,primecell-periphid = <0x000bb909>; reg = <0x6046000 0x1000>; reg-names = "replicator-base"; @@ -81,7 +81,7 @@ tmc_etf: tmc@6047000 { compatible = "arm,primecell"; - arm,primecell-periphid = <0x0003b961>; + arm,primecell-periphid = <0x000bb961>; reg = <0x6047000 0x1000>; reg-names = "tmc-base"; @@ -120,7 +120,7 @@ funnel_merg: funnel@6045000 { compatible = "arm,primecell"; - arm,primecell-periphid = <0x0003b908>; + arm,primecell-periphid = <0x000bb908>; reg = <0x6045000 0x1000>; reg-names = "funnel-base"; @@ -163,7 +163,7 @@ funnel_in0: funnel@6041000 { compatible = "arm,primecell"; - arm,primecell-periphid = <0x0003b908>; + arm,primecell-periphid = <0x000bb908>; reg = <0x6041000 0x1000>; reg-names = "funnel-base"; @@ -213,7 +213,7 @@ funnel_in1: funnel@6042000 { compatible = "arm,primecell"; - arm,primecell-periphid = <0x0003b908>; + arm,primecell-periphid = <0x000bb908>; reg = <0x6042000 0x1000>; reg-names = "funnel-base"; @@ -272,7 +272,7 @@ funnel_apss_merg: funnel@7b70000 { compatible = "arm,primecell"; - arm,primecell-periphid = <0x0003b908>; + arm,primecell-periphid = <0x000bb908>; reg = <0x7b70000 0x1000>; reg-names = "funnel-base"; @@ -323,7 +323,7 @@ funnel_apss: funnel@7b60000 { compatible = "arm,primecell"; - arm,primecell-periphid = <0x0003b908>; + arm,primecell-periphid = <0x000bb908>; reg = <0x7b60000 0x1000>; reg-names = "funnel-base"; @@ -414,7 +414,7 @@ stm: stm@6002000 { compatible = "arm,primecell"; - arm,primecell-periphid = <0x0003b962>; + arm,primecell-periphid = <0x000bb962>; reg = <0x6002000 0x1000>, <0x16280000 0x180000>; @@ -596,7 +596,7 @@ cti0: cti@6010000 { compatible = "arm,primecell"; reg = <0x6010000 0x1000>; - arm,primecell-periphid = <0x0003b966>; + arm,primecell-periphid = <0x000bb966>; reg-names = "cti-base"; coresight-name = "coresight-cti0"; @@ -608,7 +608,7 @@ cti1: cti@6011000 { compatible = "arm,primecell"; - arm,primecell-periphid = <0x0003b966>; + arm,primecell-periphid = <0x000bb966>; reg = <0x6011000 0x1000>; reg-names = "cti-base"; @@ -621,7 +621,7 @@ cti2: cti@6012000 { compatible = "arm,primecell"; - arm,primecell-periphid = <0x0003b966>; + arm,primecell-periphid = <0x000bb966>; reg = <0x6012000 0x1000>; reg-names = "cti-base"; @@ -638,7 +638,7 @@ cti3: cti@6013000 { compatible = "arm,primecell"; - arm,primecell-periphid = <0x0003b966>; + arm,primecell-periphid = <0x000bb966>; reg = <0x6013000 0x1000>; reg-names = "cti-base"; @@ -651,7 +651,7 @@ cti4: cti@6014000 { compatible = "arm,primecell"; - arm,primecell-periphid = <0x0003b966>; + arm,primecell-periphid = <0x000bb966>; reg = <0x6014000 0x1000>; reg-names = "cti-base"; @@ -664,7 +664,7 @@ cti5: cti@6015000 { compatible = "arm,primecell"; - arm,primecell-periphid = <0x0003b966>; + arm,primecell-periphid = <0x000bb966>; reg = <0x6015000 0x1000>; reg-names = "cti-base"; @@ -677,7 +677,7 @@ cti6: cti@6016000 { compatible = "arm,primecell"; - arm,primecell-periphid = <0x0003b966>; + arm,primecell-periphid = <0x000bb966>; reg = <0x6016000 0x1000>; reg-names = "cti-base"; @@ -690,7 +690,7 @@ cti7: cti@6017000 { compatible = "arm,primecell"; - arm,primecell-periphid = <0x0003b966>; + arm,primecell-periphid = <0x000bb966>; reg = <0x6017000 0x1000>; reg-names = "cti-base"; @@ -703,7 +703,7 @@ cti8: cti@6018000 { compatible = "arm,primecell"; - arm,primecell-periphid = <0x0003b966>; + arm,primecell-periphid = <0x000bb966>; reg = <0x6018000 0x1000>; reg-names = "cti-base"; @@ -716,7 +716,7 @@ cti9: cti@6019000 { compatible = "arm,primecell"; - arm,primecell-periphid = <0x0003b966>; + arm,primecell-periphid = <0x000bb966>; reg = <0x6019000 0x1000>; reg-names = "cti-base"; @@ -729,7 +729,7 @@ cti10: cti@601a000 { compatible = "arm,primecell"; - arm,primecell-periphid = <0x0003b966>; + arm,primecell-periphid = <0x000bb966>; reg = <0x601a000 0x1000>; reg-names = "cti-base"; @@ -742,7 +742,7 @@ cti11: cti@601b000 { compatible = "arm,primecell"; - arm,primecell-periphid = <0x0003b966>; + arm,primecell-periphid = <0x000bb966>; reg = <0x601b000 0x1000>; reg-names = "cti-base"; @@ -755,7 +755,7 @@ cti12: cti@601c000 { compatible = "arm,primecell"; - arm,primecell-periphid = <0x0003b966>; + arm,primecell-periphid = <0x000bb966>; reg = <0x601c000 0x1000>; reg-names = "cti-base"; @@ -768,7 +768,7 @@ cti13: cti@601d000 { compatible = "arm,primecell"; - arm,primecell-periphid = <0x0003b966>; + arm,primecell-periphid = <0x000bb966>; reg = <0x601d000 0x1000>; reg-names = "cti-base"; @@ -781,7 +781,7 @@ cti14: cti@601e000 { compatible = "arm,primecell"; - arm,primecell-periphid = <0x0003b966>; + arm,primecell-periphid = <0x000bb966>; reg = <0x601e000 0x1000>; reg-names = "cti-base"; @@ -794,7 +794,7 @@ cti15: cti@601f000 { compatible = "arm,primecell"; - arm,primecell-periphid = <0x0003b966>; + arm,primecell-periphid = <0x000bb966>; reg = <0x601f000 0x1000>; reg-names = "cti-base"; @@ -807,7 +807,7 @@ cti_cpu0: cti@7820000 { compatible = "arm,primecell"; - arm,primecell-periphid = <0x0003b966>; + arm,primecell-periphid = <0x000bb966>; reg = <0x7820000 0x1000>; reg-names = "cti-base"; @@ -822,7 +822,7 @@ cti_cpu1: cti@7920000 { compatible = "arm,primecell"; - arm,primecell-periphid = <0x0003b966>; + arm,primecell-periphid = <0x000bb966>; reg = <0x7920000 0x1000>; reg-names = "cti-base"; @@ -836,7 +836,7 @@ cti_cpu2: cti@7a20000 { compatible = "arm,primecell"; - arm,primecell-periphid = <0x0003b966>; + arm,primecell-periphid = <0x000bb966>; reg = <0x7a20000 0x1000>; reg-names = "cti-base"; @@ -850,7 +850,7 @@ cti_cpu3: cti@7b20000 { compatible = "arm,primecell"; - arm,primecell-periphid = <0x0003b966>; + arm,primecell-periphid = <0x000bb966>; reg = <0x7b20000 0x1000>; reg-names = "cti-base"; @@ -864,7 +864,7 @@ cti_cpu4: cti@7c20000 { compatible = "arm,primecell"; - arm,primecell-periphid = <0x0003b966>; + arm,primecell-periphid = <0x000bb966>; reg = <0x7c20000 0x1000>; reg-names = "cti-base"; @@ -878,7 +878,7 @@ cti_cpu5: cti@7d20000 { compatible = "arm,primecell"; - arm,primecell-periphid = <0x0003b966>; + arm,primecell-periphid = <0x000bb966>; reg = <0x7d20000 0x1000>; reg-names = "cti-base"; @@ -892,7 +892,7 @@ cti_cpu6: cti@7e20000 { compatible = "arm,primecell"; - arm,primecell-periphid = <0x0003b966>; + arm,primecell-periphid = <0x000bb966>; reg = <0x7e20000 0x1000>; reg-names = "cti-base"; @@ -906,7 +906,7 @@ cti_cpu7: cti@7f20000 { compatible = "arm,primecell"; - arm,primecell-periphid = <0x0003b966>; + arm,primecell-periphid = <0x000bb966>; reg = <0x7f20000 0x1000>; reg-names = "cti-base"; @@ -920,7 +920,7 @@ cti_apss: cti@7b80000 { compatible = "arm,primecell"; - arm,primecell-periphid = <0x0003b966>; + arm,primecell-periphid = <0x000bb966>; reg = <0x7b80000 0x1000>; reg-names = "cti-base"; @@ -933,7 +933,7 @@ cti_apss_dl: cti@7bc1000 { compatible = "arm,primecell"; - arm,primecell-periphid = <0x0003b966>; + arm,primecell-periphid = <0x000bb966>; reg = <0x7bc1000 0x1000>; reg-names = "cti-base"; @@ -946,7 +946,7 @@ cti_olc: cti@7b91000 { compatible = "arm,primecell"; - arm,primecell-periphid = <0x0003b966>; + arm,primecell-periphid = <0x000bb966>; reg = <0x7b91000 0x1000>; reg-names = "cti-base"; @@ -959,7 +959,7 @@ cti_turing: cti@7068000 { compatible = "arm,primecell"; - arm,primecell-periphid = <0x0003b966>; + arm,primecell-periphid = <0x000bb966>; reg = <0x7068000 0x1000>; reg-names = "cti-base"; @@ -972,7 +972,7 @@ cti_wcss0: cti@71a4000 { compatible = "arm,primecell"; - arm,primecell-periphid = <0x0003b966>; + arm,primecell-periphid = <0x000bb966>; reg = <0x71a4000 0x1000>; reg-names = "cti-base"; @@ -986,7 +986,7 @@ cti_wcss1: cti@71a5000 { compatible = "arm,primecell"; - arm,primecell-periphid = <0x0003b966>; + arm,primecell-periphid = <0x000bb966>; reg = <0x71a5000 0x1000>; reg-names = "cti-base"; @@ -1000,7 +1000,7 @@ cti_wcss2: cti@71a6000 { compatible = "arm,primecell"; - arm,primecell-periphid = <0x0003b966>; + arm,primecell-periphid = <0x000bb966>; reg = <0x71a6000 0x1000>; reg-names = "cti-base"; @@ -1014,7 +1014,7 @@ cti_mmss: cti@7188000 { compatible = "arm,primecell"; - arm,primecell-periphid = <0x0003b966>; + arm,primecell-periphid = <0x000bb966>; reg = <0x7188000 0x1000>; reg-names = "cti-base"; @@ -1027,7 +1027,7 @@ cti_isdb: cti@7121000 { compatible = "arm,primecell"; - arm,primecell-periphid = <0x0003b966>; + arm,primecell-periphid = <0x000bb966>; reg = <0x7121000 0x1000>; reg-names = "cti-base"; @@ -1041,7 +1041,7 @@ cti_rpm: cti@7048000 { compatible = "arm,primecell"; - arm,primecell-periphid = <0x0003b966>; + arm,primecell-periphid = <0x000bb966>; reg = <0x7048000 0x1000>; reg-names = "cti-base"; @@ -1054,7 +1054,7 @@ cti_mss: cti@7041000 { compatible = "arm,primecell"; - arm,primecell-periphid = <0x0003b966>; + arm,primecell-periphid = <0x000bb966>; reg = <0x7041000 0x1000>; reg-names = "cti-base"; @@ -1067,7 +1067,7 @@ funnel_qatb: funnel@6005000 { compatible = "arm,primecell"; - arm,primecell-periphid = <0x0003b908>; + arm,primecell-periphid = <0x000bb908>; reg = <0x6005000 0x1000>; reg-names = "funnel-base"; @@ -1525,7 +1525,7 @@ funnel_dlct: funnel@71c3000 { compatible = "arm,primecell"; - arm,primecell-periphid = <0x0003b908>; + arm,primecell-periphid = <0x000bb908>; reg = <0x71c3000 0x1000>; reg-names = "funnel-base"; diff --git a/qcom/sdm660.dtsi b/qcom/sdm660.dtsi index ba1e2bde..7bfc1f8e 100644 --- a/qcom/sdm660.dtsi +++ b/qcom/sdm660.dtsi @@ -387,7 +387,7 @@ alloc-ranges = <0x0 0x00000000 0x0 0xffffffff>; reusable; alignment = <0x0 0x400000>; - size = <0x0 0x140000>; + size = <0x0 0x1a0000>; }; venus_fw_mem: venus_fw_region { @@ -543,6 +543,101 @@ compatible = "qcom,mem-dump"; memory-region = <&dump_mem>; + rpm_sw_dump { + qcom,dump-size = <0x28000>; + qcom,dump-id = <0xea>; + }; + + pmic_dump { + qcom,dump-size = <0x10000>; + qcom,dump-id = <0xe4>; + }; + + vsense_dump { + qcom,dump-size = <0x1000>; + qcom,dump-id = <0xe9>; + }; + + tmc_etf_dump { + qcom,dump-size = <0x10000>; + qcom,dump-id = <0xf0>; + }; + + tmc_etr_reg_dump { + qcom,dump-size = <0x1000>; + qcom,dump-id = <0x100>; + }; + + tmc_etf_reg_dump { + qcom,dump-size = <0x1000>; + qcom,dump-id = <0x101>; + }; + + misc_data_dump { + qcom,dump-size = <0x1000>; + qcom,dump-id = <0xe8>; + }; + + dcc_reg_dump { + qcom,dump-size = <0x1000>; + qcom,dump-id = <0xe6>; + }; + + dcc_sram_dump { + qcom,dump-size = <0x2000>; + qcom,dump-id = <0xe7>; + }; + + log_buf_dump { + qcom,dump-size = <0x10000>; + qcom,dump-id = <0x110>; + }; + + log_buf_first_idx_dump { + qcom,dump-size = <0x0>; + qcom,dump-id = <0x111>; + }; + + etm_reg0_dump { + qcom,dump-size = <0x1000>; + qcom,dump-id = <0xa0>; + }; + + etm_reg1_dump { + qcom,dump-size = <0x1000>; + qcom,dump-id = <0xa1>; + }; + + etm_reg2_dump { + qcom,dump-size = <0x1000>; + qcom,dump-id = <0xa2>; + }; + + etm_reg3_dump { + qcom,dump-size = <0x1000>; + qcom,dump-id = <0xa3>; + }; + + etm_reg4_dump { + qcom,dump-size = <0x1000>; + qcom,dump-id = <0xa4>; + }; + + etm_reg5_dump { + qcom,dump-size = <0x1000>; + qcom,dump-id = <0xa5>; + }; + + etm_reg6_dump { + qcom,dump-size = <0x1000>; + qcom,dump-id = <0xa6>; + }; + + etm_reg7_dump { + qcom,dump-size = <0x1000>; + qcom,dump-id = <0xa7>; + }; + c_scandump { qcom,dump-size = <0x40000>; qcom,dump-id = <0xeb>; |