diff options
-rw-r--r-- | bindings/iio/proximity/inv_ch101.txt | 29 | ||||
-rw-r--r-- | bindings/iio/temperature/tdktherm.txt | 21 | ||||
-rw-r--r-- | qcom/kona-pinctrl.dtsi | 52 | ||||
-rw-r--r-- | qcom/kona-v2.1-iot-rb5.dtsi | 70 |
4 files changed, 171 insertions, 1 deletions
diff --git a/bindings/iio/proximity/inv_ch101.txt b/bindings/iio/proximity/inv_ch101.txt new file mode 100644 index 00000000..0bf18ada --- /dev/null +++ b/bindings/iio/proximity/inv_ch101.txt @@ -0,0 +1,29 @@ +TDK/InvenSense CH101 UltraSonic device + +https://invensense.tdk.com/products/ch101/ + +Required properties: + - compatible : should be one of + "invensense,ch101" + "invensense,ch201" + - reg : the I2C address of the sensor + - rst-gpios: reset pin + - rtc_rst-gpios: rtc reset + - prg-gpios: program pin. + - interrupts: interrupt mapping for IRQ. It should be configured with flags + IRQ_TYPE_EDGE_RISING, or IRQ_TYPE_EDGE_FALLING. + + Refer to interrupt-controller/interrupts.txt for generic interrupt client node + bindings. + +Example: + + ch101_0: ch101_1@45 { + compatible = "invensense,ch101"; + reg = <0x45>; + rst-gpios = <&tlmm 140 GPIO_ACTIVE_HIGH>; + rtc_rst-gpios = <&tlmm 0 GPIO_ACTIVE_HIGH>; + prg-gpios = <0 1 2>; + int-gpios = <&tlmm 122 GPIO_ACTIVE_HIGH>, + <&tlmm 123 GPIO_ACTIVE_HIGH>, + } diff --git a/bindings/iio/temperature/tdktherm.txt b/bindings/iio/temperature/tdktherm.txt new file mode 100644 index 00000000..57a671a1 --- /dev/null +++ b/bindings/iio/temperature/tdktherm.txt @@ -0,0 +1,21 @@ +TDK/InvenSense temperature sensor + + +Required properties: + - compatible : "tdktherm" + - reg : chip select ID + - spi-max-frequency: support up to 24Mhz. + - rtc_rst-gpios: rtc reset + - spi-cpol: SPI mode + - spi-cpha: SPI mode + + +Example: + temp_sensor@0 { + compatible = "tdktherm"; + reg = <0>; // Chip select ID + spi-max-frequency = <10000000>; // Can support up to 24 MHz + spi-cpol; + spi-cpha; + status = "okay"; + }; diff --git a/qcom/kona-pinctrl.dtsi b/qcom/kona-pinctrl.dtsi index d2d94def..f1a7ade3 100644 --- a/qcom/kona-pinctrl.dtsi +++ b/qcom/kona-pinctrl.dtsi @@ -3178,6 +3178,58 @@ }; }; + ch101_rst: ch101_rst { + mux { + pins = "gpio140"; + function = "gpio"; + }; + + config { + pins = "gpio140"; + output-high; + drive-strength = <2>; + }; + }; + + ch101_tmr_rst: ch101_tmr_rst { + mux { + pins = "gpio0"; + function = "gpio"; + }; + + config { + pins = "gpio0"; + bias-pull-up; + drive-strength = <2>; + }; + }; + + ch101_0_irq: ch101_0_irq { + mux { + pins = "gpio129", "gpio141", "gpio113"; + function = "gpio"; + }; + + config { + pins = "gpio129", "gpio141", "gpio113"; + bias-no-pull; + drive-strength = <2>; + }; + }; + + ch101_1_irq: ch101_1_irq { + mux { + pins = "gpio122", "gpio123", "gpio66"; + function = "gpio"; + }; + + config { + pins = "gpio122", "gpio123", "gpio66"; + bias-no-pull; + drive-strength = <2>; + }; + }; + /* QUPv3_0 North SE0 mappings */ qupv3_se0_i3c_pins: qupv3_se0_i3c_pins { qupv3_se0_i3c_active: qupv3_se0_i3c_active { diff --git a/qcom/kona-v2.1-iot-rb5.dtsi b/qcom/kona-v2.1-iot-rb5.dtsi index c874c10c..c34d57b2 100644 --- a/qcom/kona-v2.1-iot-rb5.dtsi +++ b/qcom/kona-v2.1-iot-rb5.dtsi @@ -7,7 +7,7 @@ }; &qupv3_se1_i2c { - status = "disabled"; + status = "okay"; }; &qupv3_se6_4uart { @@ -337,3 +337,71 @@ }; }; }; + +&qupv3_se1_i2c { + status = "ok"; + qcom,clk-freq-out = <400000>; + #address-cells = <1>; + #size-cells = <0>; + + /* TDK Chirp IO Expander */ + ch_io_expander@22 { + #gpio-cells = <2>; + #interrupt-cells = <2>; + compatible = "semtech,sx1508q"; + reg = <0x22>; + gpio-controller; + }; +}; + +&qupv3_se15_i2c { + #address-cells = <1>; + #size-cells = <0>; + status = "ok"; + qcom,clk-freq-out = <400000>; + + /* TDK Chirp 3, 4, and 5 are connected to QUP15 */ + ch101_1: ch101_1@45 { + compatible = "invensense,ch101"; + reg = <0x45>; + rst-gpios = <&tlmm 140 GPIO_ACTIVE_HIGH>; + rtc_rst-gpios = <&tlmm 0 GPIO_ACTIVE_HIGH>; + prg-gpios = <3 4 5>; + int-gpios = <&tlmm 122 GPIO_ACTIVE_HIGH>, + <&tlmm 123 GPIO_ACTIVE_HIGH>, + <&tlmm 66 GPIO_ACTIVE_HIGH>; + }; + + #include "smb1390.dtsi" +}; + +&qupv3_se4_i2c { + #address-cells = <1>; + #size-cells = <0>; + status = "ok"; + qcom,clk-freq-out = <400000>; + + /* TDK Chirp 0, 1, and 2 are connected to QUP4 */ + ch101_0: ch101_0@45 { + compatible = "invensense,ch101"; + reg = <0x45>; + rst-gpios = <&tlmm 140 GPIO_ACTIVE_HIGH>; + rtc_rst-gpios = <&tlmm 0 GPIO_ACTIVE_HIGH>; + prg-gpios = <0 1 2>; + int-gpios = <&tlmm 129 GPIO_ACTIVE_HIGH>, + <&tlmm 141 GPIO_ACTIVE_HIGH>, + <&tlmm 113 GPIO_ACTIVE_HIGH>; + }; +}; + +&qupv3_se17_spi { + status = "okay"; + temp_sensor@0 { + compatible = "tdktherm"; + reg = <0>; // Chip select ID + spi-max-frequency = <10000000>; // Can support up to 24 MHz + spi-cpol; + spi-cpha; + status = "okay"; + }; +}; |