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-rw-r--r--qcom/khaje-sde-display.dtsi19
1 files changed, 19 insertions, 0 deletions
diff --git a/qcom/khaje-sde-display.dtsi b/qcom/khaje-sde-display.dtsi
index 6f229d6a..d31b659b 100644
--- a/qcom/khaje-sde-display.dtsi
+++ b/qcom/khaje-sde-display.dtsi
@@ -1,6 +1,7 @@
#include "dsi-panel-td4330-truly-v2-singlemipi-fhd-cmd.dtsi"
#include "dsi-panel-td4330-truly-v2-singlemipi-fhd-vid.dtsi"
#include "dsi-panel-nt36672e-fhd-plus-90hz-video.dtsi"
+#include "dsi-panel-nt36672e-fhd-plus-120hz-video.dtsi"
#include "dsi-panel-sim-video.dtsi"
#include <dt-bindings/clock/mdss-7nm-pll-clk.h>
@@ -152,6 +153,24 @@
};
};
+&dsi_nt36672e_fhd_plus_120hz_video {
+ qcom,esd-check-enabled;
+ qcom,mdss-dsi-panel-status-check-mode = "reg_read";
+ qcom,mdss-dsi-panel-status-command = [06 01 00 01 00 00 01 0a];
+ qcom,mdss-dsi-panel-status-command-state = "dsi_lp_mode";
+ qcom,mdss-dsi-panel-status-value = <0x9c>;
+ qcom,mdss-dsi-panel-status-read-length = <1>;
+ qcom,dsi-select-clocks = "mux_byte_clk0", "mux_pixel_clk0";
+ qcom,mdss-dsi-display-timings {
+ timing@0 {
+ qcom,mdss-dsi-panel-phy-timings = [00 1e 08 08 24 22 08
+ 08 08 02 04 00 1b 18];
+ qcom,display-topology = <1 1 1>;
+ qcom,default-topology-index = <0>;
+ };
+ };
+};
+
&dsi_sim_vid {
qcom,dsi-select-clocks = "mux_byte_clk0", "mux_pixel_clk0";
qcom,mdss-dsi-display-timings {