1 files changed, 62 insertions, 0 deletions
diff --git a/qcom/monaco-pinctrl.dtsi b/qcom/monaco-pinctrl.dtsi
index f37e63f6..5709e882 100755
--- a/qcom/monaco-pinctrl.dtsi
+++ b/qcom/monaco-pinctrl.dtsi
@@ -65,6 +65,68 @@
 			};
 		};
 
+		nfc {
+			nfc_int_active: nfc_int_active {
+				/* active state */
+				mux {
+					/* NFC Read Interrupt */
+					pins = "gpio7";
+					function = "gpio";
+				};
+
+				config {
+					pins = "gpio7";
+					drive-strength = <2>; /* 2 MA */
+					bias-pull-up;
+				};
+			};
+
+			nfc_int_suspend: nfc_int_suspend {
+				/* sleep state */
+				mux {
+					/* NFC Read Interrupt */
+					pins = "gpio7";
+					function = "gpio";
+				};
+
+				config {
+					pins = "gpio7";
+					drive-strength = <2>; /* 2 MA */
+					bias-pull-up;
+				};
+			};
+
+			nfc_enable_active: nfc_enable_active {
+				/* active state */
+				mux {
+					/* Enable, Firmware gpios */
+					pins = "gpio6", "gpio8";
+					function = "gpio";
+				};
+
+				config {
+					pins = "gpio6", "gpio8";
+					drive-strength = <2>; /* 2 MA */
+					bias-pull-up;
+				};
+			};
+
+			nfc_enable_suspend: nfc_enable_suspend {
+				/* sleep state */
+				mux {
+					/* Enable, Firmware gpios */
+					pins = "gpio6", "gpio8";
+					function = "gpio";
+				};
+
+				config {
+					pins = "gpio6", "gpio8";
+					drive-strength = <2>; /* 2 MA */
+					bias-disable;
+				};
+			};
+		};
+
 		qupv3_se0_spi_pins: qupv3_se0_spi_pins {
 			qupv3_se0_spi_active: qupv3_se0_spi_active {
 				mux {