summaryrefslogtreecommitdiff
path: root/qcom/qrb4210-rb2.dtsi
diff options
context:
space:
mode:
Diffstat (limited to 'qcom/qrb4210-rb2.dtsi')
-rwxr-xr-xqcom/qrb4210-rb2.dtsi158
1 files changed, 107 insertions, 51 deletions
diff --git a/qcom/qrb4210-rb2.dtsi b/qcom/qrb4210-rb2.dtsi
index f4ad8858..87390ad6 100755
--- a/qcom/qrb4210-rb2.dtsi
+++ b/qcom/qrb4210-rb2.dtsi
@@ -271,25 +271,25 @@
};
&firmware {
- android {
- compatible = "android,firmware";
- vbmeta {
- compatible="android,vbmeta";
- parts = "vbmeta,boot,system,vendor,dtbo,recovery";
- };
-
- fstab {
- compatible = "android,fstab";
- vendor {
- compatible = "android,vendor";
- dev = "/dev/block/platform/soc/4744000.sdhci/by-name/vendor";
- type = "ext4";
- mnt_flags = "ro,barrier=1,discard";
- fsmgr_flags = "wait,slotselect,avb";
- status = "ok";
- };
+ android {
+ compatible = "android,firmware";
+ vbmeta {
+ compatible="android,vbmeta";
+ parts = "vbmeta,boot,system,vendor,dtbo,recovery";
+ };
+
+ fstab {
+ compatible = "android,fstab";
+ vendor {
+ compatible = "android,vendor";
+ dev = "/dev/block/platform/soc/4744000.sdhci/by-name/vendor";
+ type = "ext4";
+ mnt_flags = "ro,barrier=1,discard";
+ fsmgr_flags = "wait,slotselect,avb";
+ status = "ok";
};
};
+ };
};
&reserved_memory {
@@ -462,7 +462,7 @@
redistributor-stride = <0x0 0x20000>;
reg = <0xf200000 0x10000>, /* GICD */
<0xf300000 0x100000>; /* GICR * 8 */
- interrupts = <1 9 4>;
+ interrupts = <GIC_PPI 9 IRQ_TYPE_LEVEL_HIGH>;
#gpio-cells = <0>;
};
@@ -772,14 +772,10 @@
interrupt-names = "hc_irq", "pwr_irq";
qcom,bus-width = <4>;
- qcom,large-address-bus;
- qcom,clk-rates = <400000 20000000 25000000
- 50000000 100000000 202000000>;
- qcom,bus-speed-mode = "SDR12", "SDR25", "SDR50", "DDR50",
- "SDR104";
-
- qcom,devfreq,freq-table = <50000000 202000000>;
+ interconnects = <&system_noc MASTER_SDCC_2 &bimc SLAVE_EBI_CH0>,
+ <&bimc MASTER_AMPSS_M0 &config_noc SLAVE_SDCC_2>;
+ interconnect-names = "sdhc-ddr","cpu-sdhc";
qcom,msm-bus,name = "sdhc2";
qcom,msm-bus,num-cases = <8>;
@@ -811,21 +807,27 @@
qcom,bus-bw-vectors-bps = <0 400000 20000000 25000000 50000000
100750000 200000000 4294967295>;
- /* PM QoS */
- qcom,pm-qos-irq-type = "affine_irq";
- qcom,pm-qos-irq-latency = <26 26>;
- qcom,pm-qos-cpu-groups = <0x0f 0xf0>;
- qcom,pm-qos-legacy-latency-us = <26 26>, <26 26>;
+ qcom,devfreq,freq-table = <50000000 202000000>;
+ no-mmc;
+ no-sdio;
+ max-frequency = <202000000>;
+ iommus = <&apps_smmu 0xA0 0x0>;
+ qcom,iommu-dma = "bypass";
clocks = <&gcc GCC_SDCC2_AHB_CLK>,
<&gcc GCC_SDCC2_APPS_CLK>;
- clock-names = "iface_clk", "core_clk";
+ clock-names = "iface", "core";
/* DLL HSR settings. Refer go/hsr - <Target> DLL settings */
qcom,dll-hsr-list = <0x0007642c 0x0 0x0 0x00010800 0x80040868>;
-
status = "disabled";
+
+ qos0 {
+ mask = <0x0f>;
+ vote = <43>;
+ };
+
};
bluetooth: bt_wcn3990 {
@@ -844,10 +846,10 @@
timer {
compatible = "arm,armv8-timer";
- interrupts = <1 1 0xf08>,
- <1 2 0xf08>,
- <1 3 0xf08>,
- <1 0 0xf08>;
+ interrupts = <GIC_PPI 1 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>,
+ <GIC_PPI 2 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>,
+ <GIC_PPI 3 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>,
+ <GIC_PPI 0 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>;
clock-frequency = <19200000>;
};
@@ -869,50 +871,50 @@
frame@f121000 {
frame-number = <0>;
- interrupts = <0 8 0x4>,
- <0 7 0x4>;
+ interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
reg = <0xf121000 0x1000>,
<0xf122000 0x1000>;
};
frame@f123000 {
frame-number = <1>;
- interrupts = <0 9 0x4>;
+ interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>;
reg = <0xf123000 0x1000>;
status = "disabled";
};
frame@f124000 {
frame-number = <2>;
- interrupts = <0 10 0x4>;
+ interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
reg = <0xf124000 0x1000>;
status = "disabled";
};
frame@f125000 {
frame-number = <3>;
- interrupts = <0 11 0x4>;
+ interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>;
reg = <0xf125000 0x1000>;
status = "disabled";
};
frame@f126000 {
frame-number = <4>;
- interrupts = <0 12 0x4>;
+ interrupts = <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>;
reg = <0xf126000 0x1000>;
status = "disabled";
};
frame@f127000 {
frame-number = <5>;
- interrupts = <0 13 0x4>;
+ interrupts = <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>;
reg = <0xf127000 0x1000>;
status = "disabled";
};
frame@f128000 {
frame-number = <6>;
- interrupts = <0 14 0x4>;
+ interrupts = <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>;
reg = <0xf128000 0x1000>;
status = "disabled";
};
@@ -966,6 +968,10 @@
};
};
+ dload_mode {
+ compatible = "qcom,dload-mode";
+ };
+
restart@440b000 {
compatible = "qcom,pshold";
reg = <0x440b000 0x4>,
@@ -1116,7 +1122,7 @@
cpu_pmu: cpu-pmu {
compatible = "arm,armv8-pmuv3";
qcom,irq-is-percpu;
- interrupts = <1 6 4>;
+ interrupts = <GIC_PPI 6 IRQ_TYPE_LEVEL_HIGH>;
};
eud: qcom,msm-eud@1610000 {
@@ -2247,12 +2253,9 @@
qcom,ahb-freq = <240000000>;
qcom,pas-id = <9>;
- qcom,msm-bus,name = "pil-venus";
- qcom,msm-bus,num-cases = <2>;
- qcom,msm-bus,num-paths = <1>;
- qcom,msm-bus,vectors-KBps =
- <63 512 0 0>,
- <63 512 0 304000>;
+ interconnect-names = "pil-venus";
+ interconnects = <&mmnrt_virt MASTER_VIDEO_P0
+ &bimc SLAVE_EBI_CH0>;
qcom,proxy-timeout-ms = <100>;
qcom,firmware-name = "venus";
memory-region = <&pil_video_mem>;
@@ -2598,6 +2601,7 @@
#include "qrb4210-rb2-gdsc.dtsi"
#include "qrb4210-rb2-usb.dtsi"
#include "qrb4210-rb2-ion.dtsi"
+#include "qrb4210-rb2-vidc.dtsi"
#include "qrb4210-rb2-gpu.dtsi"
#include "qrb4210-rb2-coresight.dtsi"
#include "pmi632.dtsi"
@@ -2809,6 +2813,58 @@
};
};
+&pmi632_vadc {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&conn_therm_default &skin_therm_default>;
+
+ conn_therm {
+ reg = <ADC5_GPIO1_100K_PU>;
+ label = "conn_therm";
+ qcom,ratiometric;
+ qcom,hw-settle-time = <200>;
+ qcom,pre-scaling = <1 1>;
+ };
+
+ skin_therm {
+ reg = <ADC5_GPIO3_100K_PU>;
+ label = "skin_therm";
+ qcom,ratiometric;
+ qcom,hw-settle-time = <200>;
+ qcom,pre-scaling = <1 1>;
+ };
+};
+
+&pmi632_gpios {
+ conn_therm {
+ conn_therm_default: conn_therm_default {
+ pins = "gpio1";
+ bias-high-impedance;
+ };
+ };
+
+ skin_therm {
+ skin_therm_default: skin_therm_default {
+ pins = "gpio3";
+ bias-high-impedance;
+ };
+ };
+};
+
+&pmi632_adc_tm {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ io-channels = <&pmi632_vadc ADC5_GPIO3_100K_PU>;
+
+ /* Channel nodes */
+ skin_therm {
+ reg = <ADC5_GPIO3_100K_PU>;
+ qcom,ratiometric;
+ qcom,hw-settle-time = <200>;
+ };
+};
+
&pm6125_adc_tm {
#address-cells = <1>;
#size-cells = <0>;
generated by cgit v1.2.3 (git 2.25.1) at 2024-07-07 22:08:51 +0000