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-rwxr-xr-xqcom/sa8155-v2.dtsi146
1 files changed, 77 insertions, 69 deletions
diff --git a/qcom/sa8155-v2.dtsi b/qcom/sa8155-v2.dtsi
index 76d5a1b6..811ff357 100755
--- a/qcom/sa8155-v2.dtsi
+++ b/qcom/sa8155-v2.dtsi
@@ -257,88 +257,96 @@
/* GPU power level overrides */
&msm_gpu {
+
+ /* Feature Id to get the SKU */
+ qcom,feature-id = <0x4130 20 0xff>;
+
/delete-property/qcom,initial-pwrlevel;
- qcom,initial-pwrlevel = <4>;
/delete-node/qcom,gpu-pwrlevels;
/delete-node/qcom,gpu-pwrlevel-bins;
- qcom,gpu-pwrlevels {
- compatible = "qcom,gpu-pwrlevels";
- #address-cells = <1>;
- #size-cells = <0>;
+ qcom,gpu-pwrlevel-bins {
+ #address-cells = <1>;
+ #size-cells = <0>;
- qcom,gpu-pwrlevel@0 {
- reg = <0>;
- qcom,gpu-freq = <700000000>;
- qcom,level = <RPMH_REGULATOR_LEVEL_TURBO>;
- qcom,bus-freq = <10>;
- qcom,bus-min = <8>;
- qcom,bus-max = <11>;
- };
+ compatible="qcom,gpu-pwrlevel-bins";
+ qcom,gpu-pwrlevels-0 {
+ #address-cells = <1>;
+ #size-cells = <0>;
- qcom,gpu-pwrlevel@1 {
- reg = <1>;
- qcom,gpu-freq = <675000000>;
- qcom,level = <RPMH_REGULATOR_LEVEL_NOM_L1>;
- qcom,bus-freq = <8>;
- qcom,bus-min = <7>;
- qcom,bus-max = <9>;
- };
+ qcom,speed-bin = <0>;
+ qcom,initial-pwrlevel = <4>;
- qcom,gpu-pwrlevel@2 {
- reg = <2>;
- qcom,gpu-freq = <585000000>;
- qcom,level = <RPMH_REGULATOR_LEVEL_NOM>;
- qcom,bus-freq = <7>;
- qcom,bus-min = <6>;
- qcom,bus-max = <11>;
- };
+ qcom,gpu-pwrlevel@0 {
+ reg = <0>;
+ qcom,gpu-freq = <700000000>;
+ qcom,level = <RPMH_REGULATOR_LEVEL_TURBO>;
+ qcom,bus-freq = <10>;
+ qcom,bus-min = <8>;
+ qcom,bus-max = <11>;
+ };
- qcom,gpu-pwrlevel@3 {
- reg = <3>;
- qcom,gpu-freq = <500000000>;
- qcom,level = <RPMH_REGULATOR_LEVEL_NOM>;
- qcom,bus-freq = <7>;
- qcom,bus-min = <6>;
- qcom,bus-max = <11>;
- };
+ qcom,gpu-pwrlevel@1 {
+ reg = <1>;
+ qcom,gpu-freq = <675000000>;
+ qcom,level = <RPMH_REGULATOR_LEVEL_NOM_L1>;
+ qcom,bus-freq = <8>;
+ qcom,bus-min = <7>;
+ qcom,bus-max = <9>;
+ };
- qcom,gpu-pwrlevel@4 {
- reg = <4>;
- qcom,gpu-freq = <427000000>;
- qcom,level = <RPMH_REGULATOR_LEVEL_SVS_L1>;
- qcom,bus-freq = <6>;
- qcom,bus-min = <5>;
- qcom,bus-max = <9>;
- };
+ qcom,gpu-pwrlevel@2 {
+ reg = <2>;
+ qcom,gpu-freq = <585000000>;
+ qcom,level = <RPMH_REGULATOR_LEVEL_NOM>;
+ qcom,bus-freq = <7>;
+ qcom,bus-min = <6>;
+ qcom,bus-max = <11>;
+ };
- /* Vote for SVS_L1 voltage for 345MHz instead of SVS */
- qcom,gpu-pwrlevel@5 {
- reg = <5>;
- qcom,gpu-freq = <345000000>;
- qcom,level = <RPMH_REGULATOR_LEVEL_SVS_L1>;
- qcom,bus-freq = <3>;
- qcom,bus-min = <3>;
- qcom,bus-max = <8>;
- };
+ qcom,gpu-pwrlevel@3 {
+ reg = <3>;
+ qcom,gpu-freq = <500000000>;
+ qcom,level = <RPMH_REGULATOR_LEVEL_NOM>;
+ qcom,bus-freq = <7>;
+ qcom,bus-min = <6>;
+ qcom,bus-max = <11>;
+ };
- /* Vote for SVS_L1 voltage for 257MHz instead of LOW_SVS */
- qcom,gpu-pwrlevel@6 {
- reg = <6>;
- qcom,gpu-freq = <257000000>;
- qcom,level = <RPMH_REGULATOR_LEVEL_SVS_L1>;
- qcom,bus-freq = <2>;
- qcom,bus-min = <1>;
- qcom,bus-max = <8>;
+ qcom,gpu-pwrlevel@4 {
+ reg = <4>;
+ qcom,gpu-freq = <427000000>;
+ qcom,level = <RPMH_REGULATOR_LEVEL_SVS_L1>;
+ qcom,bus-freq = <6>;
+ qcom,bus-min = <5>;
+ qcom,bus-max = <9>;
+ };
};
- qcom,gpu-pwrlevel@7 {
- reg = <7>;
- qcom,gpu-freq = <0>;
- qcom,level = <RPMH_REGULATOR_LEVEL_RETENTION>;
- qcom,bus-freq = <0>;
- qcom,bus-min = <0>;
- qcom,bus-max = <0>;
+ qcom,gpu-pwrlevels-1 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ qcom,speed-bin = <1>;
+ qcom,initial-pwrlevel = <1>;
+
+ qcom,gpu-pwrlevel@0 {
+ reg = <0>;
+ qcom,gpu-freq = <500000000>;
+ qcom,level = <RPMH_REGULATOR_LEVEL_NOM>;
+ qcom,bus-freq = <7>;
+ qcom,bus-min = <6>;
+ qcom,bus-max = <11>;
+ };
+
+ qcom,gpu-pwrlevel@1 {
+ reg = <1>;
+ qcom,gpu-freq = <427000000>;
+ qcom,level = <RPMH_REGULATOR_LEVEL_SVS_L1>;
+ qcom,bus-freq = <6>;
+ qcom,bus-min = <5>;
+ qcom,bus-max = <9>;
+ };
};
};
};