diff options
Diffstat (limited to 'qcom/sa8155-vm.dtsi')
| -rwxr-xr-x | qcom/sa8155-vm.dtsi | 96 |
1 files changed, 92 insertions, 4 deletions
diff --git a/qcom/sa8155-vm.dtsi b/qcom/sa8155-vm.dtsi index da1a0546..60318490 100755 --- a/qcom/sa8155-vm.dtsi +++ b/qcom/sa8155-vm.dtsi @@ -8,17 +8,41 @@ aliases { hsuart0 = &qupv3_se17_4uart; serial0 = &qupv3_se12_2uart; + i2c2 = &qupv3_se2_i2c; + mmc1 = &sdhc_2; /* SDC2 SD card slot */ }; cpus { #address-cells = <2>; #size-cells = <0>; + cluster_0_opp_table: opp-table0 { + compatible = "operating-points-v2"; + opp-shared; + + opp-2131200000 { + opp-hz = /bits/ 64 <2131200000>; + opp-microvolt = <948000>; + }; + }; + + cluster_1_opp_table: opp-table1 { + compatible = "operating-points-v2"; + opp-shared; + + opp-1785600000 { + opp-hz = /bits/ 64 <1785600000>; + opp-microvolt = <892000>; + }; + }; + CPU0: cpu@0 { device_type = "cpu"; compatible = "arm,armv8"; reg = <0x0 0x0>; capacity-dmips-mhz = <1024>; + dynamic-power-coefficient = <374>; + operating-points-v2 = <&cluster_0_opp_table>; }; CPU1: cpu@1 { @@ -26,6 +50,8 @@ compatible = "arm,armv8"; reg = <0x0 0x1>; capacity-dmips-mhz = <1024>; + dynamic-power-coefficient = <374>; + operating-points-v2 = <&cluster_0_opp_table>; }; CPU2: cpu@2 { @@ -33,6 +59,8 @@ compatible = "arm,armv8"; reg = <0x0 0x2>; capacity-dmips-mhz = <1024>; + dynamic-power-coefficient = <374>; + operating-points-v2 = <&cluster_0_opp_table>; }; CPU3: cpu@3 { @@ -40,34 +68,44 @@ compatible = "arm,armv8"; reg = <0x0 0x3>; capacity-dmips-mhz = <1024>; + dynamic-power-coefficient = <374>; + operating-points-v2 = <&cluster_0_opp_table>; }; CPU4: cpu@4 { device_type = "cpu"; compatible = "arm,armv8"; reg = <0x0 0x4>; - capacity-dmips-mhz = <414>; + capacity-dmips-mhz = <419>; + dynamic-power-coefficient = <100>; + operating-points-v2 = <&cluster_1_opp_table>; }; CPU5: cpu@5 { device_type = "cpu"; compatible = "arm,armv8"; reg = <0x0 0x5>; - capacity-dmips-mhz = <414>; + capacity-dmips-mhz = <419>; + dynamic-power-coefficient = <100>; + operating-points-v2 = <&cluster_1_opp_table>; }; CPU6: cpu@6 { device_type = "cpu"; compatible = "arm,armv8"; reg = <0x0 0x6>; - capacity-dmips-mhz = <414>; + capacity-dmips-mhz = <419>; + dynamic-power-coefficient = <100>; + operating-points-v2 = <&cluster_1_opp_table>; }; CPU7: cpu@7 { device_type = "cpu"; compatible = "arm,armv8"; reg = <0x0 0x7>; - capacity-dmips-mhz = <414>; + capacity-dmips-mhz = <419>; + dynamic-power-coefficient = <100>; + operating-points-v2 = <&cluster_1_opp_table>; }; cpu-map { @@ -293,6 +331,44 @@ interrupt-parent = <&intc>; interrupt-controller; }; + + sdhc_2: sdhci@8804000 { + compatible = "qcom,sdhci-msm-v5"; + reg = <0x8804000 0x1000>; + reg-names = "hc"; + + interrupts = <GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 222 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "hc_irq", "pwr_irq"; + + clocks = <&gcc GCC_SDCC2_AHB_CLK>, + <&gcc GCC_SDCC2_APPS_CLK>; + clock-names = "iface", "core"; + + bus-width = <4>; + no-sdio; + no-mmc; + qcom,restore-after-cx-collapse; + + /* DLL HSR settings. Refer go/hsr - <Target> DLL settings */ + qcom,dll-hsr-list = <0x0007642c 0x0 0x10 0x2C010800 0x80040868>; + + vdd-supply = <&L17A>; + qcom,vdd-voltage-level = <2950000 2960000>; + qcom,vdd-current-level = <200 800000>; + + vdd-io-supply = <&L13C>; + qcom,vdd-io-voltage-level = <1808000 2960000>; + qcom,vdd-io-current-level = <200 22000>; + + pinctrl-names = "default", "sleep"; + pinctrl-0 = <&sdc2_on>; + pinctrl-1 = <&sdc2_off>; + + cd-gpios = <&pm8150_gpios 4 GPIO_ACTIVE_LOW>; + + status = "disabled"; + }; }; #include "sm8150-pinctrl.dtsi" @@ -395,6 +471,18 @@ /delete-node/ mmidgrp1500; }; +&qupv3_0 { + qcom,iommu-dma = "bypass"; +}; + +&qupv3_1 { + qcom,iommu-dma = "bypass"; +}; + +&qupv3_2 { + qcom,iommu-dma = "bypass"; +}; + &pcie0_msi { status = "ok"; }; |