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-rw-r--r--qcom/sdm439.dtsi25
1 files changed, 18 insertions, 7 deletions
diff --git a/qcom/sdm439.dtsi b/qcom/sdm439.dtsi
index da27c317..51e8e699 100644
--- a/qcom/sdm439.dtsi
+++ b/qcom/sdm439.dtsi
@@ -2,7 +2,7 @@
#include "sdm439-pm8953.dtsi"
#include "sdm439-pmi632.dtsi"
#include "sdm439-audio.dtsi"
-
+#include <dt-bindings/clock/mdss-12nm-pll-clk.h>
/ {
model = "Qualcomm Technologies, Inc. SDM439";
compatible = "qcom,sdm439";
@@ -340,12 +340,10 @@
&gcc_mdss {
compatible = "qcom,gcc-mdss-sdm439";
- /* TODO
- * clocks = <&mdss_dsi0_pll PCLK_SRC_MUX_0_CLK>,
- * <&mdss_dsi0_pll BYTE_CLK_SRC_0_CLK>,
- * <&mdss_dsi1_pll PCLK_SRC_MUX_1_CLK>,
- * <&mdss_dsi1_pll BYTE_CLK_SRC_1_CLK>;
- */
+ clocks = <&mdss_dsi0_pll PCLK_SRC_MUX_0_CLK>,
+ <&mdss_dsi0_pll BYTE_CLK_SRC_0_CLK>,
+ <&mdss_dsi1_pll PCLK_SRC_MUX_1_CLK>,
+ <&mdss_dsi1_pll BYTE_CLK_SRC_1_CLK>;
clock-names = "pclk0_src", "byte0_src", "pclk1_src",
"byte1_src";
#clock-cells = <1>;
@@ -380,6 +378,19 @@
0x1a96000 0x1a96000 0x300
0x1a96400 0x1a96400 0x400
0x193e000 0x193e000 0x30>;
+
+ clocks = <&gcc_mdss MDSS_MDP_VOTE_CLK>,
+ <&gcc GCC_MDSS_AHB_CLK>,
+ <&gcc GCC_MDSS_AXI_CLK>,
+ <&mdss_dsi0_pll BYTE_CLK_SRC_0_CLK>,
+ <&mdss_dsi1_pll BYTE_CLK_SRC_1_CLK>,
+ <&mdss_dsi0_pll PCLK_SRC_MUX_0_CLK>,
+ <&mdss_dsi1_pll PCLK_SRC_MUX_1_CLK>;
+
+ clock-names = "mdp_core_clk", "iface_clk", "bus_clk",
+ "ext_byte0_clk", "ext_byte1_clk", "ext_pixel0_clk",
+ "ext_pixel1_clk";
+
};
&mdss_dsi0 {