Age | Commit message (Collapse) | Author |
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add qcom,ignore-wakeup-src-in-hostmode property.
Change-Id: Idfc7d44ddbc884b52ca13b59c6ab863b37b7ff9f
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Irq type mentioned in dwc3-msm at usb_irq_info for dp_hs_phy_irq and
dm_hs_phy_irq is trigger rising but irq type for the same in kona dtsi is
edge both because of which mismatch is seen when mapping dp_hs_phy_irq
and dm_hs_phy_irq. This mismatch results in failure to register interrupts
with PDC controller.
To fix the type mismatch issue change the trigger type of dp_hs_phy_irq and
dm_hs_phy_irq to EDGE RISING.
Change-Id: Ia7bd47cdc853ac9c89f346c85b96640d1fd64098
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Update the QMP PHY init Sequence as per the HPG Rev1.03
settings.
Change-Id: I5eab834a66a9074d20ddc7cd69c4b9d83a01f5e9
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The register address range for Kona is not covering all the
controller registers. Tuning the Tx deemph registers for dwc3
gen2 protocol test is not possible with the current range.
Modify the reg property to cover the entire range as defined
in the data book to fix this issue.
Change-Id: I34b605f920af7cae8b2efd69a54f96e8cde5c001
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This SoC does not require the U3-U0 transition workaround. Remove
the property that enables the quirk.
Change-Id: I3d2c2e6ee2bbd7b41a7d6499ce8c1c66b2bf826e
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usb1 work in host mode only.
Change-Id: I4a5ffe092678e6c333e1e96d41245e0426dfa55c
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Update the QMP PHY init Sequence as per the HPG September
update for Combo PHY and Uni PHY.
Change-Id: I2ee5bd0e3c5743bad654e737a6eeff7826ac5418
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The pre-emphasis value for Kona is set to 2 by default.
HPG recommends a value of 1 to avoid overshooting. Add
the parameter override property to set this value to 1.
Change-Id: I45f38565696d617a2714d61cca244b46de50fcd8
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This property is used to specify the need for performing an
additional reset after link training, however the kona target
does not require it. Remove the property and associated register
offsets.
Change-Id: Ic9c18438037a6ea50be81b34361502474732f68b
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Phy driver needs to read this register to decide if phy needs to be
reset or not.
Change-Id: I437e016b5c20f4da02195ffe5d11256e58fd8f86
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USB SS phy driver needs to toggle between bi_tcxo
and phy pipe clock as part of its CX collapse sequence,
add pipe_clk_src which would be set to parent as
ref_clk_src or pipe_clk.
Change-Id: I78624b559df51063761773606e6e636a65e740e4
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Update Superspeed PHY init sequence for DP and UNI phy according
to the Hardware Programming recommendation.
Change-Id: Ib4bc8f67d21b3d8f06ac87e527dd12849e815bd2
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Add kona and lito device tree files and other related device tree
files included in them. This snapshot is taken as of
'commit f3dd4aaeb34438c877ccd42f5a48ccd554dd765a
("Merge "platform: qpnp-revid: Add REVID support for PM7250B")' of
the kernel project.
Change-Id: I51206d16131c8c14bc9589e1770209580e8305eb
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