From bd1296a84ab81778d25b08b03fc4aab4608c5378 Mon Sep 17 00:00:00 2001 From: Chetan C R Date: Wed, 17 Mar 2021 12:49:10 +0530 Subject: ARM: dts: msm: Add rpmcc and gcc clock nodes for SDM439 Add rpmcc, gcc clock controller support for SDM429 and SDM439 targets. Change-Id: I50a1312fbbce8952715c0cb9d9df35fdcada04a3 --- qcom/msm8917.dtsi | 2 +- qcom/msm8937.dtsi | 7 +++---- qcom/qm215.dtsi | 4 ---- qcom/sdm429.dtsi | 8 +------- qcom/sdm439.dtsi | 11 ----------- 5 files changed, 5 insertions(+), 27 deletions(-) (limited to 'qcom') diff --git a/qcom/msm8917.dtsi b/qcom/msm8917.dtsi index 14218273..8628a7b3 100644 --- a/qcom/msm8917.dtsi +++ b/qcom/msm8917.dtsi @@ -550,7 +550,7 @@ }; rpmcc: qcom,rpmcc { - compatible = "qcom,rpmcc-msm8917"; + compatible = "qcom,rpmcc-qm215"; #clock-cells = <1>; }; diff --git a/qcom/msm8937.dtsi b/qcom/msm8937.dtsi index e9c4a74c..8e26d756 100644 --- a/qcom/msm8937.dtsi +++ b/qcom/msm8937.dtsi @@ -568,15 +568,14 @@ }; rpmcc: qcom,rpmcc { - compatible = "qcom,rpmcc-msm8937"; + compatible = "qcom,rpmcc-sdm439"; #clock-cells = <1>; }; gcc: qcom,gcc@1800000 { - compatible = "qcom,gcc-msm8937", "syscon"; + compatible = "qcom,gcc-sdm439", "syscon"; reg = <0x1800000 0x80000>; - <0x00a6018 0x00004>; - reg-names = "cc_base", "gpu-bin"; + reg-names = "cc_base"; qcom,gcc_oxili_gfx3d_clk-opp-handle = <&msm_gpu>; vdd_cx-supply = <&pm8937_s2_level>; clocks = <&rpmcc RPM_SMD_XO_CLK_SRC>; diff --git a/qcom/qm215.dtsi b/qcom/qm215.dtsi index 91b9135c..baddee56 100644 --- a/qcom/qm215.dtsi +++ b/qcom/qm215.dtsi @@ -23,10 +23,6 @@ }; }; -&rpmcc { - compatible = "qcom,rpmcc-qm215"; -}; - &gcc { compatible = "qcom,gcc-qm215", "syscon"; }; diff --git a/qcom/sdm429.dtsi b/qcom/sdm429.dtsi index 506cd0d1..a7b859f6 100644 --- a/qcom/sdm429.dtsi +++ b/qcom/sdm429.dtsi @@ -105,13 +105,7 @@ }; &gcc { - compatible = "qcom,gcc-sdm429"; - reg = <0x1800000 0x80000>, - <0xb016000 0x00040>; - reg-names = "cc_base", "apcs_c1_base"; vdd_cx-supply = <&pm8953_s2_level>; - vdd_hf_dig-supply = <&pm8953_s2_level_ao>; - vdd_hf_pll-supply = <&pm8953_l7_ao>; }; &debugcc { @@ -218,7 +212,7 @@ }; &gcc_mdss { - compatible = "qcom,gcc-mdss-sdm429"; + compatible = "qcom,gcc-mdss-sdm439"; clocks = <&mdss_dsi0_pll PCLK_SRC_MUX_0_CLK>, <&mdss_dsi0_pll BYTE_CLK_SRC_0_CLK>, <&mdss_dsi1_pll PCLK_SRC_MUX_1_CLK>, diff --git a/qcom/sdm439.dtsi b/qcom/sdm439.dtsi index 51e8e699..6957b5f0 100644 --- a/qcom/sdm439.dtsi +++ b/qcom/sdm439.dtsi @@ -324,18 +324,7 @@ }; &gcc { - compatible = "qcom,gcc-sdm439"; - reg = <0x1800000 0x80000>, - <0xb016000 0x00040>, - <0xb116000 0x00040>, - <0x00a6018 0x00004>; - reg-names = "cc_base", "apcs_c1_base", - "apcs_c0_base", "efuse"; vdd_cx-supply = <&pm8953_s2_level>; - vdd_sr2_dig-supply = <&pm8953_s2_level_ao>; - vdd_sr2_pll-supply = <&pm8953_l7_ao>; - vdd_hf_dig-supply = <&pm8953_s2_level_ao>; - vdd_hf_pll-supply = <&pm8953_l7_ao>; }; &gcc_mdss { -- cgit v1.2.3