&soc { timer { clock-frequency = <500000>; }; timer@17c20000 { clock-frequency = <500000>; }; usb_emu_phy: usb_emu_phy@a720000 { compatible = "qcom,usb-emu-phy"; reg = <0x0a720000 0x9500>, <0x0a6f8800 0x100>; reg-names = "base", "qscratch_base"; qcom,emu-init-seq = <0xfff0 0x4 0xfff3 0x4 0x40 0x4 0xfff3 0x4 0xfff0 0x4 0x100000 0x20 0x0 0x20 0x1a0 0x20 0x100000 0x3c 0x0 0x3c 0x10060 0x3c 0x0 0x4>; }; bi_tcxo: bi_tcxo { compatible = "fixed-factor-clock"; clock-mult = <1>; clock-div = <4>; clocks = <&xo_board>; #clock-cells = <0>; }; bi_tcxo_ao: bi_tcxo_ao { compatible = "fixed-factor-clock"; clock-mult = <1>; clock-div = <4>; clocks = <&xo_board>; #clock-cells = <0>; }; }; &ufsphy_mem { compatible = "qcom,ufs-phy-qrbtc-sdm845"; vdda-phy-supply = <&L18A>; vdda-pll-supply = <&L22A>; vdda-phy-max-microamp = <62900>; vdda-pll-max-microamp = <18300>; status = "ok"; }; &ufshc_mem { limit-tx-hs-gear = <1>; limit-rx-hs-gear = <1>; scsi-cmd-timeout = <300000>; vdd-hba-supply = <&gcc_ufs_phy_gdsc>; vdd-hba-fixed-regulator; vcc-supply = <&L7E>; vccq2-supply = <&L12A>; vcc-max-microamp = <800000>; vccq2-max-microamp = <800000>; qcom,vddp-ref-clk-supply = <&L22A>; qcom,vddp-ref-clk-max-microamp = <100>; qcom,disable-lpm; status = "ok"; }; &wdog { status = "disabled"; }; &usb0 { /delete-property/ extcon; dwc3@a600000 { usb-phy = <&usb_emu_phy>, <&usb_nop_phy>; maximum-speed = "high-speed"; }; }; &rpmhcc { compatible = "qcom,dummycc"; clock-output-names = "rpmh_clocks"; }; &aopcc { compatible = "qcom,dummycc"; clock-output-names = "qdss_clocks"; }; &sdhc_1 { vdd-supply = <&L7E>; qcom,vdd-voltage-level = <2960000 2960000>; qcom,vdd-current-level = <0 570000>; vdd-io-supply = <&L12A>; qcom,vdd-io-always-on; qcom,vdd-io-lpm-sup; qcom,vdd-io-voltage-level = <1800000 1800000>; qcom,vdd-io-current-level = <0 325000>; pinctrl-names = "active", "sleep"; pinctrl-0 = <&sdc1_clk_on &sdc1_cmd_on &sdc1_data_on &sdc1_rclk_on>; pinctrl-1 = <&sdc1_clk_off &sdc1_cmd_off &sdc1_data_off &sdc1_rclk_off>; qcom,clk-rates = <400000 25000000 50000000>; qcom,bus-speed-mode = "DDR_1p8v"; /delete-property/qcom,devfreq,freq-table; status = "ok"; }; &sdhc_2 { vdd-supply = <&L9E>; qcom,vdd-voltage-level = <2960000 2960000>; qcom,vdd-current-level = <0 800000>; vdd-io-supply = <&L6E>; qcom,vdd-io-voltage-level = <1800000 2950000>; qcom,vdd-io-current-level = <0 22000>; pinctrl-names = "active", "sleep"; pinctrl-0 = <&sdc2_clk_on &sdc2_cmd_on &sdc2_data_on>; pinctrl-1 = <&sdc2_clk_off &sdc2_cmd_off &sdc2_data_off>; qcom,clk-rates = <400000 25000000 50000000>; qcom,bus-speed-mode = "SDR12", "SDR25", "SDR50"; /delete-property/qcom,devfreq,freq-table; status = "ok"; }; &qupv3_se10_i2c { status = "disabled"; }; /* Debug UART Console */ &qupv3_se9_2uart { qcom,rumi_platform; };