#include #include #include #include &spmi_bus { qcom,pms405@0 { compatible ="qcom,spmi-pmic"; reg = <0 SPMI_USID>; #address-cells = <1>; #size-cells = <0>; pms405_vadc: vadc@3100 { compatible = "qcom,spmi-adc-rev2"; reg = <0x3100>; #address-cells = <1>; #size-cells = <0>; interrupts = <0x0 0x31 0x0 IRQ_TYPE_EDGE_RISING>; #io-channel-cells = <1>; io-channel-ranges; ref_gnd { label = "ref_gnd"; reg = ; qcom,pre-scaling = <1 1>; }; vref_1p25 { label = "vref_1p25"; reg = ; qcom,pre-scaling = <1 1>; }; die_temp { label = "die_temp"; reg = ; qcom,pre-scaling = <1 1>; }; vph_pwr { label = "vph_pwr"; reg = ; qcom,pre-scaling = <1 3>; }; xo_therm { label = "xo_therm"; reg = ; qcom,ratiometric; qcom,hw-settle-time = <200>; qcom,pre-scaling = <1 1>; }; pa_therm1 { label = "pa_therm1"; reg = ; qcom,ratiometric; qcom,hw-settle-time = <200>; qcom,pre-scaling = <1 1>; }; pa_therm3 { label = "pa_therm3"; reg = ; qcom,ratiometric; qcom,hw-settle-time = <200>; qcom,pre-scaling = <1 1>; }; }; pms405_adc_tm_iio: adc_tm@3500 { compatible = "qcom,spmi-adc-tm5-iio"; reg = <0x3500>; #thermal-sensor-cells = <1>; #address-cells = <1>; #size-cells = <0>; io-channels = <&pms405_vadc ADC5_XO_THERM_100K_PU>, <&pms405_vadc ADC5_AMUX_THM1_100K_PU>, <&pms405_vadc ADC5_AMUX_THM3_100K_PU>; xo_therm { reg = ; qcom,ratiometric; qcom,hw-settle-time = <200>; }; pa_therm1 { reg = ; qcom,ratiometric; qcom,hw-settle-time = <200>; }; pa_therm3 { reg = ; qcom,ratiometric; qcom,hw-settle-time = <200>; }; }; pms405_pon: qcom,power-on@800 { compatible = "qcom,qpnp-power-on"; reg = <0x800>; interrupts = <0x0 0x8 0x0 IRQ_TYPE_NONE>; interrupt-names = "kpdpwr"; qcom,pon-dbc-delay = <15625>; qcom,system-reset; qcom,store-hard-reset-reason; qcom,pon_1 { qcom,pon-type = ; qcom,pull-up; linux,code = ; }; }; /* QCS405 + PMS405 GPIO configuration */ pms405_gpios: pinctrl@c000 { compatible = "qcom,pms405-gpio"; reg = <0xc000>; gpio-controller; #gpio-cells = <2>; interrupt-controller; #interrupt-cells = <2>; }; qcom,pms405_rtc { compatible = "qcom,pm8941-rtc"; reg = <0x6000>, <0x6100>; reg-names = "rtc", "alarm"; interrupts = <0x0 0x61 0x1 IRQ_TYPE_NONE>; }; }; qcom,pms405@1 { compatible = "qcom,spmi-pmic"; reg = <1 SPMI_USID>; #address-cells = <1>; #size-cells = <0>; pms405_pwm: qcom,pwms@bc00 { compatible = "qcom,pwm-lpg"; reg = <0xbc00>; reg-names = "lpg-base"; qcom,num-lpg-channels = <2>; #pwm-cells = <2>; }; }; };