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&soc {
tlmm: pinctrl@f000000 {
compatible = "qcom,crow-pinctrl";
reg = <0x0F000000 0x1000000>;
interrupts = <GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH>;
gpio-controller;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <2>;
qcom,gpios-reserved = <32 33 34 35>;
wakeup-parent = <&pdc>;
};
};
&tlmm {
qupv3_se5_2uart_pins: qupv3_se5_2uart_pins {
qupv3_se5_2uart_tx_active: qupv3_se5_2uart_tx_active {
mux {
pins = "gpio22";
function = "qup0_se5_l2";
};
config {
pins = "gpio22";
drive-strength = <2>;
bias-disable;
};
};
qupv3_se5_2uart_rx_active: qupv3_se5_2uart_rx_active {
mux {
pins = "gpio23";
function = "qup0_se5_l3";
};
config {
pins = "gpio23";
drive-strength = <2>;
bias-disable;
};
};
qupv3_se5_2uart_sleep: qupv3_se5_2uart_sleep {
mux {
pins = "gpio22", "gpio23";
function = "gpio";
};
config {
pins = "gpio22", "gpio23";
drive-strength = <2>;
bias-pull-down;
};
};
};
};
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