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| author | qctecmdr <qctecmdr@localhost> | 2020-11-05 06:56:47 -0800 |
|---|---|---|
| committer | Gerrit - the friendly Code Review server <code-review@localhost> | 2020-11-05 06:56:47 -0800 |
| commit | 213d04499e661bed3b36a5294271706088a4964f (patch) | |
| tree | 21e92963516d9879e9a88546392b7f7963d9bb0b | |
| parent | d387649f2588743b27b81a44c4487ac0667211ac (diff) | |
| parent | d9bc37f1eb9d09991ee2215f8db1e977e9a37fa1 (diff) | |
| download | display-drivers-213d04499e661bed3b36a5294271706088a4964f.tar.gz | |
Merge "disp: msm: sde: fix ich reset override logic"
| -rw-r--r-- | msm/sde/sde_encoder.c | 13 |
1 files changed, 9 insertions, 4 deletions
diff --git a/msm/sde/sde_encoder.c b/msm/sde/sde_encoder.c index 01caa291..32c983ba 100644 --- a/msm/sde/sde_encoder.c +++ b/msm/sde/sde_encoder.c @@ -1358,6 +1358,7 @@ static int _sde_encoder_dsc_n_lm_1_enc_1_intf(struct sde_encoder_virt *sde_enc) struct msm_display_dsc_info *dsc = NULL; struct sde_hw_ctl *hw_ctl; struct sde_ctl_dsc_cfg cfg; + bool half_panel_partial_update; if (hw_dsc == NULL || hw_pp == NULL || !enc_master) { SDE_ERROR_ENC(sde_enc, "invalid params for DSC\n"); @@ -1376,15 +1377,19 @@ static int _sde_encoder_dsc_n_lm_1_enc_1_intf(struct sde_encoder_virt *sde_enc) enc_ip_w = intf_ip_w; _sde_encoder_dsc_initial_line_calc(dsc, enc_ip_w); + half_panel_partial_update = (sde_enc->cur_conn_roi.w <= + sde_enc->cur_master->cached_mode.hdisplay / 2); - ich_res = _sde_encoder_dsc_ich_reset_override_needed(false, dsc); + ich_res = _sde_encoder_dsc_ich_reset_override_needed( + half_panel_partial_update, dsc); if (enc_master->intf_mode == INTF_MODE_VIDEO) dsc_common_mode = DSC_MODE_VIDEO; - SDE_DEBUG_ENC(sde_enc, "pic_w: %d pic_h: %d mode:%d\n", - roi->w, roi->h, dsc_common_mode); - SDE_EVT32(DRMID(&sde_enc->base), roi->w, roi->h, dsc_common_mode); + SDE_DEBUG_ENC(sde_enc, "pic_w: %d pic_h: %d mode:%d ich_res:%d\n", + roi->w, roi->h, dsc_common_mode, ich_res); + SDE_EVT32(DRMID(&sde_enc->base), roi->w, roi->h, + dsc_common_mode, ich_res, half_panel_partial_update); _sde_encoder_dsc_pipe_cfg(hw_dsc, hw_pp, dsc, dsc_common_mode, ich_res, true, hw_dsc_pp, false); |