diff options
author | Andrei Ciubotariu <aciubotariu@google.com> | 2022-12-18 01:40:39 +0000 |
---|---|---|
committer | Andrei Ciubotariu <aciubotariu@google.com> | 2022-12-18 01:40:39 +0000 |
commit | c39597305ea53a093e702f7c609c638fccfc9c51 (patch) | |
tree | ca7668671b36f0da22ba11d1ff9cb7700f7c6102 | |
parent | f94914c1490fb2de4c9f803fc48164002b85f1f2 (diff) | |
parent | eaf4c84f8afa74cf5b023ff31988d3bf78e855fe (diff) | |
download | graphics-devicetree-c39597305ea53a093e702f7c609c638fccfc9c51.tar.gz |
sw5100: Integrate LW 2.0 r00019.1
Bug: 262997652
Change-Id: I04641c87c9808e1d3743ab3cf0d33f94f7dc270e
Signed-off-by: Andrei Ciubotariu <aciubotariu@google.com>
-rwxr-xr-x | Kbuild | 4 | ||||
-rwxr-xr-x | gpu/bengal-gpu.dtsi | 24 | ||||
-rwxr-xr-x | gpu/kalama-gpu.dtsi | 4 | ||||
-rwxr-xr-x | gpu/kalama-v2-gpu.dtsi | 4 | ||||
-rwxr-xr-x | gpu/khaje-gpu.dtsi | 16 | ||||
-rwxr-xr-x | gpu/pineapple-gpu.dts | 21 | ||||
-rwxr-xr-x | gpu/pineapple-gpu.dtsi | 241 |
7 files changed, 286 insertions, 28 deletions
@@ -9,6 +9,10 @@ dtbo-y += gpu/kalama-gpu.dtbo \ gpu/kalamap-hhg-gpu.dtbo endif +ifeq ($(CONFIG_ARCH_PINEAPPLE), y) +dtbo-y += gpu/pineapple-gpu.dtbo +endif + ifeq ($(CONFIG_ARCH_SA8155), y) dtbo-y += gpu/sa8155-v2-gpu.dtbo endif diff --git a/gpu/bengal-gpu.dtsi b/gpu/bengal-gpu.dtsi index 23aa769..74f9c83 100755 --- a/gpu/bengal-gpu.dtsi +++ b/gpu/bengal-gpu.dtsi @@ -45,18 +45,18 @@ <100>; /* On */ qcom,bus-table-ddr = - <MHZ_TO_KBPS(0, 4)>, /* index=0 */ - <MHZ_TO_KBPS(100, 4)>, /* index=1 */ - <MHZ_TO_KBPS(200, 4)>, /* index=2 */ - <MHZ_TO_KBPS(300, 4)>, /* index=3 */ - <MHZ_TO_KBPS(451, 4)>, /* index=4 */ - <MHZ_TO_KBPS(547, 4)>, /* index=5 */ - <MHZ_TO_KBPS(681, 4)>, /* index=6 */ - <MHZ_TO_KBPS(768, 4)>, /* index=7 */ - <MHZ_TO_KBPS(1017, 4)>, /* index=8 */ - <MHZ_TO_KBPS(1353, 4)>, /* index=9 */ - <MHZ_TO_KBPS(1555, 4)>, /* index=10 */ - <MHZ_TO_KBPS(1804, 4)>; /* index=11 */ + <MHZ_TO_KBPS(0, 8)>, /* index=0 */ + <MHZ_TO_KBPS(100, 8)>, /* index=1 */ + <MHZ_TO_KBPS(200, 8)>, /* index=2 */ + <MHZ_TO_KBPS(300, 8)>, /* index=3 */ + <MHZ_TO_KBPS(451, 8)>, /* index=4 */ + <MHZ_TO_KBPS(547, 8)>, /* index=5 */ + <MHZ_TO_KBPS(681, 8)>, /* index=6 */ + <MHZ_TO_KBPS(768, 8)>, /* index=7 */ + <MHZ_TO_KBPS(1017, 8)>, /* index=8 */ + <MHZ_TO_KBPS(1353, 8)>, /* index=9 */ + <MHZ_TO_KBPS(1555, 8)>, /* index=10 */ + <MHZ_TO_KBPS(1804, 8)>; /* index=11 */ /* GDSC regulator names */ diff --git a/gpu/kalama-gpu.dtsi b/gpu/kalama-gpu.dtsi index fe5eb08..696d180 100755 --- a/gpu/kalama-gpu.dtsi +++ b/gpu/kalama-gpu.dtsi @@ -65,10 +65,6 @@ "gcc_gpu_snoc_dvm_gfx", "gpu_cc_ahb", "apb_pclk"; - qcom,gpu-model = "Adreno740"; - - qcom,chipid = <0x43050a00>; - qcom,no-nap; qcom,min-access-length = <32>; diff --git a/gpu/kalama-v2-gpu.dtsi b/gpu/kalama-v2-gpu.dtsi index 2357e47..ad97a22 100755 --- a/gpu/kalama-v2-gpu.dtsi +++ b/gpu/kalama-v2-gpu.dtsi @@ -2,8 +2,4 @@ &msm_gpu { compatible = "qcom,adreno-gpu-gen7-2-1", "qcom,kgsl-3d0"; - - qcom,gpu-model = "Adreno740v2"; - - qcom,chipid = <0x43050a01>; }; diff --git a/gpu/khaje-gpu.dtsi b/gpu/khaje-gpu.dtsi index a9892e4..7424e12 100755 --- a/gpu/khaje-gpu.dtsi +++ b/gpu/khaje-gpu.dtsi @@ -4,14 +4,14 @@ qcom,chipid = <0x06010001>; qcom,bus-table-ddr = - <MHZ_TO_KBPS(0, 4)>, /* index=0 */ - <MHZ_TO_KBPS(200, 4)>, /* index=1 */ - <MHZ_TO_KBPS(547, 4)>, /* index=2 */ - <MHZ_TO_KBPS(768, 4)>, /* index=3 */ - <MHZ_TO_KBPS(1017, 4)>, /* index=4 */ - <MHZ_TO_KBPS(1555, 4)>, /* index=5 */ - <MHZ_TO_KBPS(1804, 4)>, /* index=6 */ - <MHZ_TO_KBPS(2092, 4)>; /* index=7 */ + <MHZ_TO_KBPS(0, 8)>, /* index=0 */ + <MHZ_TO_KBPS(200, 8)>, /* index=1 */ + <MHZ_TO_KBPS(547, 8)>, /* index=2 */ + <MHZ_TO_KBPS(768, 8)>, /* index=3 */ + <MHZ_TO_KBPS(1017, 8)>, /* index=4 */ + <MHZ_TO_KBPS(1555, 8)>, /* index=5 */ + <MHZ_TO_KBPS(1804, 8)>, /* index=6 */ + <MHZ_TO_KBPS(2092, 8)>; /* index=7 */ /delete-node/ qcom,gpu-pwrlevel-bins; /* diff --git a/gpu/pineapple-gpu.dts b/gpu/pineapple-gpu.dts new file mode 100755 index 0000000..c8e560d --- /dev/null +++ b/gpu/pineapple-gpu.dts @@ -0,0 +1,21 @@ +/dts-v1/; +/plugin/; + +#include <dt-bindings/clock/qcom,aop-qmp.h> +#include <dt-bindings/clock/qcom,gcc-pineapple.h> +#include <dt-bindings/clock/qcom,gpucc-pineapple.h> +#include <dt-bindings/clock/qcom,rpmh.h> +#include <dt-bindings/interconnect/qcom,pineapple.h> +#include <dt-bindings/interrupt-controller/arm-gic.h> +#include <dt-bindings/regulator/qcom,rpmh-regulator-levels.h> +#include <dt-bindings/interrupt-controller/arm-gic.h> + +#include "pineapple-gpu.dtsi" + +/ { + model = "Qualcomm Technologies, Inc. Pineapple"; + compatible = "qcom,pineapple"; + qcom,msm-id = <557 0x10000>, <577 0x10000>; + qcom,board-id = <0 0>; +}; + diff --git a/gpu/pineapple-gpu.dtsi b/gpu/pineapple-gpu.dtsi new file mode 100755 index 0000000..8cd6dbf --- /dev/null +++ b/gpu/pineapple-gpu.dtsi @@ -0,0 +1,241 @@ + +#define MHZ_TO_KBPS(mhz, w) ((mhz * 1000000 * w) / (1024)) + +&msm_gpu { + compatible = "qcom,adreno-gpu-gen7-9-0", "qcom,kgsl-3d0"; + status = "ok"; + reg = <0x3d00000 0x40000>, <0x3d61000 0x3000>, + <0x03d50000 0x10000>, <0x03d9e000 0x2000>, + <0x10900000 0x80000>; + reg-names = "kgsl_3d0_reg_memory", "cx_dbgc", "rscc", "cx_misc", + "qdss_gfx"; + interrupts = <0 300 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "kgsl_3d0_irq"; + + clocks = <&gcc GCC_GPU_MEMNOC_GFX_CLK>, + <&gcc GCC_GPU_SNOC_DVM_GFX_CLK>, + <&gpucc GPU_CC_AHB_CLK>; + clock-names = "gcc_gpu_memnoc_gfx", + "gcc_gpu_snoc_dvm_gfx", + "gpu_cc_ahb"; + + qcom,gpu-model = "Adreno750"; + + qcom,chipid = <0x43051400>; + + qcom,initial-pwrlevel = <5>; + + qcom,no-nap; + + qcom,min-access-length = <32>; + + qcom,ubwc-mode = <4>; + + qcom,gpu-qdss-stm = <0x161c0000 0x40000>; /* base addr, size */ + + qcom,tzone-names = "gpuss-0", "gpuss-1", "gpuss-2", "gpuss-3", + "gpuss-4", "gpuss-5", "gpuss-6", "gpuss-7"; + + interconnects = <&gem_noc MASTER_GFX3D &mc_virt SLAVE_EBI1>; + interconnect-names = "gpu_icc_path"; + + qcom,bus-table-cnoc = + <0>, /* Off */ + <100>; /* On */ + + qcom,bus-table-ddr = + <MHZ_TO_KBPS(0, 4)>, /* index=0 */ + <MHZ_TO_KBPS(547, 4) >, /* index=1 */ + <MHZ_TO_KBPS(768, 4) >, /* index=2 */ + <MHZ_TO_KBPS(1555, 4)>, /* index=3 */ + <MHZ_TO_KBPS(1708, 4)>, /* index=4 */ + <MHZ_TO_KBPS(2092, 4)>, /* index=5 */ + <MHZ_TO_KBPS(2736, 4)>, /* index=6 */ + <MHZ_TO_KBPS(3187, 4)>, /* index=7 */ + <MHZ_TO_KBPS(3686, 4)>, /* index=8 */ + <MHZ_TO_KBPS(4224, 4)>; /* index=9 */ + + zap-shader { + memory-region = <&gpu_micro_code_mem>; + }; + + /* Power levels */ + qcom,gpu-pwrlevels { + #address-cells = <1>; + #size-cells = <0>; + + compatible = "qcom,gpu-pwrlevels"; + + /* Nom */ + qcom,gpu-pwrlevel@0 { + reg = <0>; + qcom,gpu-freq = <770000000>; + qcom,level = <RPMH_REGULATOR_LEVEL_NOM>; + + qcom,bus-freq = <9>; + qcom,bus-min = <6>; + qcom,bus-max = <9>; + }; + /* SVS_L2 */ + qcom,gpu-pwrlevel@1 { + reg = <1>; + qcom,gpu-freq = <720000000>; + qcom,level = <RPMH_REGULATOR_LEVEL_SVS_L2>; + + qcom,bus-freq = <7>; + qcom,bus-min = <6>; + qcom,bus-max = <9>; + + }; + /* SVS_L1 */ + qcom,gpu-pwrlevel@2 { + reg = <2>; + qcom,gpu-freq = <680000000>; + qcom,level = <RPMH_REGULATOR_LEVEL_SVS_L1>; + + qcom,bus-freq = <6>; + qcom,bus-min = <5>; + qcom,bus-max = <9>; + + }; + /* SVS */ + qcom,gpu-pwrlevel@3 { + reg = <3>; + qcom,gpu-freq = <578000000>; + qcom,level = <RPMH_REGULATOR_LEVEL_SVS>; + + qcom,bus-freq = <3>; + qcom,bus-min = <2>; + qcom,bus-max = <7>; + + }; + /* Low_SVS */ + qcom,gpu-pwrlevel@4 { + reg = <4>; + qcom,gpu-freq = <422000000>; + qcom,level = <RPMH_REGULATOR_LEVEL_LOW_SVS>; + + qcom,bus-freq = <3>; + qcom,bus-min = <1>; + qcom,bus-max = <4>; + + }; + /* Low_SVS_D1 */ + qcom,gpu-pwrlevel@5 { + reg = <5>; + qcom,gpu-freq = <310000000>; + qcom,level = <RPMH_REGULATOR_LEVEL_LOW_SVS_D1>; + + qcom,bus-freq = <1>; + qcom,bus-min = <1>; + qcom,bus-max = <3>; + }; + }; + + qcom,gpu-mempools { + #address-cells = <1>; + #size-cells = <0>; + compatible = "qcom,gpu-mempools"; + + /* 4K Page Pool configuration */ + qcom,gpu-mempool@0 { + reg = <0>; + qcom,mempool-page-size = <4096>; + qcom,mempool-reserved = <2048>; + }; + /* 8K Page Pool configuration */ + qcom,gpu-mempool@1 { + reg = <1>; + qcom,mempool-page-size = <8192>; + qcom,mempool-reserved = <1024>; + }; + /* 64K Page Pool configuration */ + qcom,gpu-mempool@2 { + reg = <2>; + qcom,mempool-page-size = <65536>; + qcom,mempool-reserved = <256>; + }; + /* 128K Page Pool configuration */ + qcom,gpu-mempool@3 { + reg = <3>; + qcom,mempool-page-size = <131072>; + qcom,mempool-reserved = <128>; + }; + /* 256K Page Pool configuration */ + qcom,gpu-mempool@4 { + reg = <4>; + qcom,mempool-page-size = <262144>; + qcom,mempool-reserved = <80>; + }; + /* 1M Page Pool configuration */ + qcom,gpu-mempool@5 { + reg = <5>; + qcom,mempool-page-size = <1048576>; + qcom,mempool-reserved = <32>; + }; + }; +}; + +&soc { + kgsl_msm_iommu: qcom,kgsl-iommu@3da0000 { + compatible = "qcom,kgsl-smmu-v2"; + reg = <0x03da0000 0x40000>; + + vddcx-supply = <&gpu_cc_cx_gdsc>; + + gfx3d_user: gfx3d_user { + compatible = "qcom,smmu-kgsl-cb"; + iommus = <&kgsl_smmu 0x0 0x000>; + qcom,iommu-dma = "disabled"; + }; + + gfx3d_lpac: gfx3d_lpac { + compatible = "qcom,smmu-kgsl-cb"; + iommus = <&kgsl_smmu 0x1 0x000>; + qcom,iommu-dma = "disabled"; + }; + + gfx3d_secure: gfx3d_secure { + compatible = "qcom,smmu-kgsl-cb"; + iommus = <&kgsl_smmu 0x2 0x000>; + qcom,iommu-dma = "disabled"; + }; + }; + + gmu: qcom,gmu@3d69000 { + compatible = "qcom,gen7-gmu"; + + reg = <0x3d68000 0x37000>, + <0xb280000 0x10000>, + <0x03D40000 0x10000>; + + reg-names = "gmu", "gmu_pdc", "gmu_ao_blk_dec0"; + + interrupts = <0 304 IRQ_TYPE_LEVEL_HIGH>, + <0 305 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "hfi", "gmu"; + + regulator-names = "vddcx", "vdd"; + + vddcx-supply = <&gpu_cc_cx_gdsc>; + vdd-supply = <&gpu_cc_gx_gdsc>; + + clocks = <&gpucc GPU_CC_CX_GMU_CLK>, + <&gpucc GPU_CC_CXO_CLK>, + <&gcc GCC_DDRSS_GPU_AXI_CLK>, + <&gcc GCC_GPU_MEMNOC_GFX_CLK>, + <&gpucc GPU_CC_AHB_CLK>, + <&gpucc GPU_CC_HUB_CX_INT_CLK>; + + clock-names = "gmu_clk", "cxo_clk", "axi_clk", + "memnoc_clk", "ahb_clk", "hub_clk"; + + qcom,gmu-freq-table = <260000000 RPMH_REGULATOR_LEVEL_LOW_SVS>, + <625000000 RPMH_REGULATOR_LEVEL_SVS>; + + iommus = <&kgsl_smmu 0x5 0x000>; + qcom,iommu-dma = "disabled"; + + qcom,ipc-core = <0x00400000 0x100000>; + }; +}; |