diff options
| author | Sunil Paidimarri <hisunil@codeaurora.org> | 2019-03-21 18:01:34 -0700 |
|---|---|---|
| committer | Suraj Jaiswal <jsuraj@codeaurora.org> | 2019-10-25 15:00:05 +0530 |
| commit | e3cf542a4e0dd791d3e56d3325a9f9493d11f1c4 (patch) | |
| tree | c38c7fdbec8c2e97a6980bf53adcc4500bcd0941 /drivers/emac-dwc-eqos | |
| parent | bd481c874268930832bfad2f20f5664ac04ef3c6 (diff) | |
| download | data-kernel-e3cf542a4e0dd791d3e56d3325a9f9493d11f1c4.tar.gz | |
data-kernel: EMAC: Enable PPS-LPASS connectivity
Add new flag to the enable PPS-LPASS connectivity
initialziation. Fix the ptp clock frequency
initiazation too the.
Change-Id: I8296306e9223a846a7c57d94231d05488121bcf4
CRs-Fixed: 2374673
Signed-off-by: Sunil Paidimarri <hisunil@codeaurora.org>
Diffstat (limited to 'drivers/emac-dwc-eqos')
| -rw-r--r-- | drivers/emac-dwc-eqos/DWC_ETH_QOS_drv.c | 8 | ||||
| -rw-r--r-- | drivers/emac-dwc-eqos/DWC_ETH_QOS_platform.c | 5 | ||||
| -rw-r--r-- | drivers/emac-dwc-eqos/DWC_ETH_QOS_ptp.c | 6 | ||||
| -rw-r--r-- | drivers/emac-dwc-eqos/DWC_ETH_QOS_yheader.h | 2 |
4 files changed, 14 insertions, 7 deletions
diff --git a/drivers/emac-dwc-eqos/DWC_ETH_QOS_drv.c b/drivers/emac-dwc-eqos/DWC_ETH_QOS_drv.c index 738f2e9..b69ce6d 100644 --- a/drivers/emac-dwc-eqos/DWC_ETH_QOS_drv.c +++ b/drivers/emac-dwc-eqos/DWC_ETH_QOS_drv.c @@ -5281,10 +5281,10 @@ int ETH_PPSOUT_Config(struct DWC_ETH_QOS_prv_data *pdata, struct ifr_data_struct int interval, width; int interval_ns; /*interval in nano seconds*/ - if (pdata->emac_hw_version_type == EMAC_HW_v2_3_1 && + if (pdata->res_data->pps_lpass_conn_en && eth_pps_cfg->ptpclk_freq <= 0) { /* Set PTP clock to default 250 */ - eth_pps_cfg->ptpclk_freq = DWC_ETH_QOS_DEFAULT_PTP_CLOCK; + eth_pps_cfg->ptpclk_freq = DWC_ETH_QOS_DEFAULT_LPASS_CLOCK; } if ((eth_pps_cfg->ppsout_ch < 0) || @@ -5323,7 +5323,7 @@ int ETH_PPSOUT_Config(struct DWC_ETH_QOS_prv_data *pdata, struct ifr_data_struct EMACDBG("PPS: PPSOut_Config: interval=%d, width=%d\n", interval, width); - if (pdata->emac_hw_version_type == EMAC_HW_v2_3_1) { + if (pdata->res_data->pps_lpass_conn_en) { //calculate interval & width interval_ns = (1000000000/eth_pps_cfg->ppsout_freq) ; interval = ((interval_ns)/4) - 1; @@ -5333,7 +5333,7 @@ int ETH_PPSOUT_Config(struct DWC_ETH_QOS_prv_data *pdata, struct ifr_data_struct switch (eth_pps_cfg->ppsout_ch) { case DWC_ETH_QOS_PPS_CH_0: - if (pdata->emac_hw_version_type == EMAC_HW_v2_3_1) { + if (pdata->res_data->pps_lpass_conn_en) { if (eth_pps_cfg->ppsout_start == DWC_ETH_QOS_PPS_START) { MAC_PPSC_PPSEN0_UDFWR(0x1); MAC_PPS_INTVAL_PPSINT0_UDFWR(DWC_ETH_QOS_PPS_CH_0, interval); diff --git a/drivers/emac-dwc-eqos/DWC_ETH_QOS_platform.c b/drivers/emac-dwc-eqos/DWC_ETH_QOS_platform.c index 72f906f..e2202a1 100644 --- a/drivers/emac-dwc-eqos/DWC_ETH_QOS_platform.c +++ b/drivers/emac-dwc-eqos/DWC_ETH_QOS_platform.c @@ -529,6 +529,7 @@ static void DWC_ETH_QOS_configure_gpio_pins(struct platform_device *pdev) dwc_eth_qos_res_data.pinctrl = pinctrl; if (dwc_eth_qos_res_data.emac_hw_version_type == EMAC_HW_v2_2_0 || + dwc_eth_qos_res_data.emac_hw_version_type == EMAC_HW_v2_1_2 || dwc_eth_qos_res_data.emac_hw_version_type == EMAC_HW_v2_3_1) { /* PPS0 pin */ emac_pps_0 = pinctrl_lookup_state(pinctrl, EMAC_PIN_PPS0); @@ -847,6 +848,10 @@ static int DWC_ETH_QOS_get_dts_config(struct platform_device *pdev) } EMACDBG(": emac_core_version = %d\n", dwc_eth_qos_res_data.emac_hw_version_type); + if (dwc_eth_qos_res_data.emac_hw_version_type == EMAC_HW_v2_3_1 || + dwc_eth_qos_res_data.emac_hw_version_type == EMAC_HW_v2_1_2) + dwc_eth_qos_res_data.pps_lpass_conn_en = true; + if (dwc_eth_qos_res_data.emac_hw_version_type == EMAC_HW_v2_3_1) { resource = platform_get_resource_byname(pdev, IORESOURCE_IRQ, diff --git a/drivers/emac-dwc-eqos/DWC_ETH_QOS_ptp.c b/drivers/emac-dwc-eqos/DWC_ETH_QOS_ptp.c index 0a286ae..d47221b 100644 --- a/drivers/emac-dwc-eqos/DWC_ETH_QOS_ptp.c +++ b/drivers/emac-dwc-eqos/DWC_ETH_QOS_ptp.c @@ -315,10 +315,10 @@ int DWC_ETH_QOS_ptp_init(struct DWC_ETH_QOS_prv_data *pdata) } #ifdef CONFIG_PPS_OUTPUT - if (pdata->emac_hw_version_type == EMAC_HW_v2_3_1) { - /*Configuaring PPS0 PPS output frequency to defualt 19.2 Mhz*/ + if (pdata->res_data->pps_lpass_conn_en) { + /*Configuring PPS0 PPS output frequency to defualt 19.2 Mhz*/ eth_pps_cfg.ppsout_ch = 0; - eth_pps_cfg.ptpclk_freq = DWC_ETH_QOS_DEFAULT_PTP_CLOCK; + eth_pps_cfg.ptpclk_freq = DWC_ETH_QOS_DEFAULT_LPASS_CLOCK; eth_pps_cfg.ppsout_freq = 19200000; eth_pps_cfg.ppsout_start = 1; req.ptr = (void*)ð_pps_cfg; diff --git a/drivers/emac-dwc-eqos/DWC_ETH_QOS_yheader.h b/drivers/emac-dwc-eqos/DWC_ETH_QOS_yheader.h index 23aca7c..67fdd03 100644 --- a/drivers/emac-dwc-eqos/DWC_ETH_QOS_yheader.h +++ b/drivers/emac-dwc-eqos/DWC_ETH_QOS_yheader.h @@ -428,6 +428,7 @@ extern void *ipc_emac_log_ctxt; #define DWC_ETH_QOS_SYSTIMEPERIOD 4 /* System time period is 4ns */ #define DWC_ETH_QOS_DEFAULT_PTP_CLOCK 50000000 +#define DWC_ETH_QOS_DEFAULT_LPASS_CLOCK 250000000 #define DWC_ETH_QOS_TX_QUEUE_CNT (pdata->tx_queue_cnt) #define DWC_ETH_QOS_RX_QUEUE_CNT (pdata->rx_queue_cnt) @@ -1581,6 +1582,7 @@ struct DWC_ETH_QOS_res_data { struct clk *ptp_clk; unsigned int emac_hw_version_type; bool early_eth_en; + bool pps_lpass_conn_en; }; struct DWC_ETH_QOS_prv_ipa_data { |