1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
209
210
211
212
213
214
215
216
217
218
219
220
221
222
223
224
225
226
227
228
229
230
231
232
233
234
235
236
237
238
239
240
241
242
243
244
245
246
247
248
249
250
251
252
253
254
255
256
257
258
259
260
261
262
263
264
265
266
267
268
269
270
271
272
273
274
275
276
277
278
279
280
281
282
283
284
285
286
287
288
289
290
291
292
293
294
295
296
297
298
299
300
301
302
303
304
305
306
307
308
309
310
311
312
313
314
315
316
317
318
319
320
321
322
323
324
325
326
327
328
329
330
331
332
333
334
335
336
337
338
339
340
341
342
343
344
345
346
347
348
349
350
351
352
353
354
355
356
357
358
359
360
361
362
363
364
365
366
367
368
369
370
371
372
373
374
375
376
377
378
379
380
381
382
383
384
385
386
387
388
389
390
391
392
393
394
395
396
397
398
399
400
401
402
403
404
405
406
407
408
409
410
411
412
413
414
415
416
417
418
419
420
421
422
423
424
425
426
427
428
429
430
431
432
433
434
435
436
437
438
439
440
441
442
443
444
445
446
447
448
449
450
451
452
453
454
455
456
457
458
459
460
461
462
463
464
465
466
467
468
469
470
471
472
473
474
475
476
477
478
479
480
481
482
483
484
485
486
487
488
489
490
491
492
493
494
495
496
497
498
499
500
501
502
503
504
505
506
507
508
509
510
511
512
513
514
515
516
517
518
519
520
521
522
523
524
525
526
527
528
529
530
531
532
533
534
535
536
537
538
539
540
541
542
543
544
545
546
547
548
549
550
551
552
553
554
555
556
557
558
559
560
561
562
563
564
565
566
567
568
569
570
571
572
573
574
575
576
577
578
579
580
581
582
583
584
585
586
587
588
589
590
591
592
593
594
595
596
597
598
599
600
601
602
603
604
605
606
607
608
609
610
611
612
613
614
615
616
617
618
619
620
621
622
623
624
625
626
627
628
629
630
631
632
633
634
635
636
637
638
639
640
641
642
643
644
645
646
647
648
649
650
651
652
653
654
655
656
657
658
659
660
661
662
663
664
665
666
667
668
669
670
671
672
673
674
675
676
677
678
679
680
681
682
683
684
685
686
687
688
689
690
691
692
693
694
695
696
697
698
699
700
701
702
703
704
705
706
707
708
709
710
711
712
713
714
715
716
717
718
719
720
721
722
723
724
725
726
727
728
729
730
731
732
733
734
735
736
737
738
739
740
741
742
743
744
745
746
747
748
749
750
751
752
753
754
755
756
757
758
759
760
761
762
763
764
765
766
767
768
769
770
771
772
773
774
775
776
777
778
779
780
781
782
783
784
785
786
787
788
789
790
791
792
793
794
795
796
797
798
799
800
801
802
803
804
805
806
807
808
809
810
811
812
813
814
815
816
817
818
819
820
821
822
823
824
825
826
827
828
829
830
831
832
833
834
835
836
837
838
839
840
841
842
843
844
845
846
847
848
849
850
851
852
853
854
855
856
857
858
859
860
861
862
863
864
865
866
867
868
869
870
871
872
873
874
875
876
877
878
879
880
881
882
883
884
885
886
887
888
889
890
891
892
893
894
895
896
897
898
899
900
901
902
903
904
905
906
907
908
909
910
911
912
913
914
915
916
917
918
919
920
921
922
923
924
925
926
927
928
929
930
931
932
933
934
935
936
937
938
939
940
941
942
943
944
945
946
947
948
949
950
951
952
953
954
955
956
957
958
959
960
961
962
963
964
965
966
967
968
969
970
971
972
973
974
975
976
977
978
979
980
981
982
983
984
985
986
987
988
989
990
991
992
993
994
995
996
997
998
999
1000
1001
1002
1003
1004
1005
1006
1007
1008
1009
1010
1011
1012
1013
1014
1015
1016
1017
1018
1019
1020
1021
1022
1023
1024
1025
1026
1027
1028
1029
1030
1031
1032
1033
1034
1035
1036
1037
1038
1039
1040
1041
1042
1043
1044
1045
1046
1047
1048
1049
1050
1051
1052
1053
1054
1055
1056
1057
1058
1059
1060
1061
1062
1063
1064
1065
1066
1067
1068
1069
1070
1071
1072
1073
1074
1075
1076
1077
1078
1079
1080
1081
1082
1083
1084
1085
1086
1087
1088
1089
1090
1091
1092
1093
1094
1095
1096
1097
1098
1099
1100
1101
1102
1103
1104
1105
1106
1107
1108
1109
1110
1111
1112
1113
1114
1115
1116
1117
1118
1119
1120
1121
1122
1123
1124
1125
1126
1127
1128
1129
1130
1131
1132
1133
1134
1135
1136
1137
1138
1139
1140
1141
1142
1143
1144
1145
1146
1147
1148
1149
1150
1151
1152
1153
1154
1155
1156
1157
1158
1159
1160
1161
1162
1163
1164
1165
1166
1167
1168
1169
1170
1171
1172
1173
1174
1175
1176
1177
1178
1179
1180
1181
1182
1183
1184
1185
1186
1187
1188
1189
1190
1191
1192
1193
1194
1195
1196
1197
1198
1199
1200
1201
1202
1203
1204
1205
1206
1207
1208
1209
1210
1211
1212
1213
1214
1215
1216
1217
1218
1219
1220
1221
1222
1223
1224
1225
1226
1227
1228
1229
1230
1231
1232
1233
1234
1235
1236
1237
1238
1239
1240
1241
1242
1243
1244
1245
1246
1247
1248
1249
1250
1251
1252
1253
1254
1255
1256
1257
1258
1259
1260
1261
1262
1263
1264
1265
1266
1267
1268
1269
1270
1271
1272
1273
1274
1275
1276
1277
1278
1279
1280
1281
1282
1283
1284
1285
1286
1287
1288
1289
1290
1291
1292
1293
1294
1295
1296
1297
1298
1299
1300
1301
1302
1303
1304
1305
1306
1307
1308
1309
1310
1311
1312
1313
1314
1315
1316
1317
1318
1319
1320
1321
1322
1323
1324
1325
1326
1327
1328
1329
1330
1331
1332
1333
1334
1335
1336
1337
1338
1339
1340
1341
1342
1343
1344
1345
1346
1347
1348
1349
1350
1351
1352
1353
1354
1355
1356
1357
1358
1359
1360
1361
1362
1363
1364
1365
1366
1367
1368
1369
1370
1371
1372
1373
1374
1375
1376
1377
1378
1379
1380
1381
1382
1383
1384
1385
1386
1387
1388
1389
1390
1391
1392
1393
1394
1395
1396
1397
1398
1399
1400
1401
1402
1403
1404
1405
1406
1407
1408
1409
1410
1411
1412
1413
1414
1415
1416
1417
1418
1419
1420
1421
1422
1423
1424
1425
1426
1427
1428
1429
1430
1431
1432
1433
1434
1435
1436
1437
1438
1439
1440
1441
1442
1443
1444
1445
1446
1447
1448
1449
1450
1451
1452
1453
1454
1455
1456
1457
1458
1459
1460
1461
1462
1463
1464
1465
1466
1467
1468
1469
1470
1471
1472
1473
1474
1475
1476
1477
1478
1479
1480
1481
1482
1483
1484
1485
1486
1487
1488
1489
1490
1491
1492
1493
1494
1495
1496
1497
1498
1499
1500
1501
1502
1503
1504
1505
1506
1507
1508
1509
1510
1511
1512
1513
1514
1515
1516
1517
1518
1519
1520
1521
1522
1523
1524
1525
1526
1527
1528
1529
1530
1531
1532
1533
1534
1535
1536
1537
1538
1539
1540
1541
1542
1543
1544
1545
1546
1547
1548
1549
1550
1551
1552
1553
1554
1555
1556
1557
1558
1559
1560
1561
1562
1563
1564
1565
1566
1567
1568
1569
1570
1571
1572
1573
1574
1575
1576
1577
1578
1579
1580
1581
1582
1583
1584
1585
1586
1587
1588
1589
1590
1591
1592
1593
1594
1595
1596
1597
1598
1599
1600
1601
1602
1603
1604
1605
1606
1607
1608
1609
1610
1611
1612
1613
1614
1615
1616
1617
1618
1619
1620
1621
1622
1623
1624
1625
1626
1627
1628
1629
1630
1631
1632
1633
1634
1635
1636
1637
1638
1639
1640
1641
1642
1643
1644
1645
1646
1647
1648
1649
1650
1651
1652
1653
1654
1655
1656
1657
1658
1659
1660
1661
1662
1663
1664
1665
1666
1667
1668
1669
1670
|
/*
* Copyright (c) 2020, The Linux Foundation. All rights reserved.
*
* Permission to use, copy, modify, and/or distribute this software for any
* purpose with or without fee is hereby granted, provided that the above
* copyright notice and this permission notice appear in all copies.
*
* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
* WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
* MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
* ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
* WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
* ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
* OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
*/
#ifndef _REO_UPDATE_RX_REO_QUEUE_H_
#define _REO_UPDATE_RX_REO_QUEUE_H_
#if !defined(__ASSEMBLER__)
#endif
#include "uniform_reo_cmd_header.h"
// ################ START SUMMARY #################
//
// Dword Fields
// 0 struct uniform_reo_cmd_header cmd_header;
// 1 rx_reo_queue_desc_addr_31_0[31:0]
// 2 rx_reo_queue_desc_addr_39_32[7:0], update_receive_queue_number[8], update_vld[9], update_associated_link_descriptor_counter[10], update_disable_duplicate_detection[11], update_soft_reorder_enable[12], update_ac[13], update_bar[14], update_rty[15], update_chk_2k_mode[16], update_oor_mode[17], update_ba_window_size[18], update_pn_check_needed[19], update_pn_shall_be_even[20], update_pn_shall_be_uneven[21], update_pn_handling_enable[22], update_pn_size[23], update_ignore_ampdu_flag[24], update_svld[25], update_ssn[26], update_seq_2k_error_detected_flag[27], update_pn_error_detected_flag[28], update_pn_valid[29], update_pn[30], clear_stat_counters[31]
// 3 receive_queue_number[15:0], vld[16], associated_link_descriptor_counter[18:17], disable_duplicate_detection[19], soft_reorder_enable[20], ac[22:21], bar[23], rty[24], chk_2k_mode[25], oor_mode[26], pn_check_needed[27], pn_shall_be_even[28], pn_shall_be_uneven[29], pn_handling_enable[30], ignore_ampdu_flag[31]
// 4 ba_window_size[7:0], pn_size[9:8], svld[10], ssn[22:11], seq_2k_error_detected_flag[23], pn_error_detected_flag[24], pn_valid[25], flush_from_cache[26], reserved_4a[31:27]
// 5 pn_31_0[31:0]
// 6 pn_63_32[31:0]
// 7 pn_95_64[31:0]
// 8 pn_127_96[31:0]
//
// ################ END SUMMARY #################
#define NUM_OF_DWORDS_REO_UPDATE_RX_REO_QUEUE 9
struct reo_update_rx_reo_queue {
struct uniform_reo_cmd_header cmd_header;
uint32_t rx_reo_queue_desc_addr_31_0 : 32; //[31:0]
uint32_t rx_reo_queue_desc_addr_39_32 : 8, //[7:0]
update_receive_queue_number : 1, //[8]
update_vld : 1, //[9]
update_associated_link_descriptor_counter: 1, //[10]
update_disable_duplicate_detection: 1, //[11]
update_soft_reorder_enable : 1, //[12]
update_ac : 1, //[13]
update_bar : 1, //[14]
update_rty : 1, //[15]
update_chk_2k_mode : 1, //[16]
update_oor_mode : 1, //[17]
update_ba_window_size : 1, //[18]
update_pn_check_needed : 1, //[19]
update_pn_shall_be_even : 1, //[20]
update_pn_shall_be_uneven : 1, //[21]
update_pn_handling_enable : 1, //[22]
update_pn_size : 1, //[23]
update_ignore_ampdu_flag : 1, //[24]
update_svld : 1, //[25]
update_ssn : 1, //[26]
update_seq_2k_error_detected_flag: 1, //[27]
update_pn_error_detected_flag : 1, //[28]
update_pn_valid : 1, //[29]
update_pn : 1, //[30]
clear_stat_counters : 1; //[31]
uint32_t receive_queue_number : 16, //[15:0]
vld : 1, //[16]
associated_link_descriptor_counter: 2, //[18:17]
disable_duplicate_detection : 1, //[19]
soft_reorder_enable : 1, //[20]
ac : 2, //[22:21]
bar : 1, //[23]
rty : 1, //[24]
chk_2k_mode : 1, //[25]
oor_mode : 1, //[26]
pn_check_needed : 1, //[27]
pn_shall_be_even : 1, //[28]
pn_shall_be_uneven : 1, //[29]
pn_handling_enable : 1, //[30]
ignore_ampdu_flag : 1; //[31]
uint32_t ba_window_size : 8, //[7:0]
pn_size : 2, //[9:8]
svld : 1, //[10]
ssn : 12, //[22:11]
seq_2k_error_detected_flag : 1, //[23]
pn_error_detected_flag : 1, //[24]
pn_valid : 1, //[25]
flush_from_cache : 1, //[26]
reserved_4a : 5; //[31:27]
uint32_t pn_31_0 : 32; //[31:0]
uint32_t pn_63_32 : 32; //[31:0]
uint32_t pn_95_64 : 32; //[31:0]
uint32_t pn_127_96 : 32; //[31:0]
};
/*
struct uniform_reo_cmd_header cmd_header
Consumer: REO
Producer: SW
Details for command execution tracking purposes.
rx_reo_queue_desc_addr_31_0
Consumer: REO
Producer: SW
Address (lower 32 bits) of the REO queue descriptor
<legal all>
rx_reo_queue_desc_addr_39_32
Consumer: REO
Producer: SW
Address (upper 8 bits) of the REO queue descriptor
<legal all>
update_receive_queue_number
Consumer: REO
Producer: SW
When set, receive_queue_number from this command will be
updated in the descriptor.
<legal all>
update_vld
Consumer: REO
Producer: SW
When clear, REO will NOT update the VLD bit setting. For
this setting, SW MUST set the Flush_from_cache bit in this
command.
When set, VLD from this command will be updated in the
descriptor.
<legal all>
update_associated_link_descriptor_counter
Consumer: REO
Producer: SW
When set, Associated_link_descriptor_counter from this
command will be updated in the descriptor.
<legal all>
update_disable_duplicate_detection
Consumer: REO
Producer: SW
When set, Disable_duplicate_detection from this command
will be updated in the descriptor.
<legal all>
update_soft_reorder_enable
Consumer: REO
Producer: SW
When set, Soft_reorder_enable from this command will be
updated in the descriptor.
<legal all>
update_ac
Consumer: REO
Producer: SW
When set, AC from this command will be updated in the
descriptor.
<legal all>
update_bar
Consumer: REO
Producer: SW
When set, BAR from this command will be updated in the
descriptor.
<legal all>
update_rty
Consumer: REO
Producer: SW
When set, RTY from this command will be updated in the
descriptor.
<legal all>
update_chk_2k_mode
Consumer: REO
Producer: SW
When set, Chk_2k_mode from this command will be updated
in the descriptor.
<legal all>
update_oor_mode
Consumer: REO
Producer: SW
When set, OOR_Mode from this command will be updated in
the descriptor.
<legal all>
update_ba_window_size
Consumer: REO
Producer: SW
When set, BA_window_size from this command will be
updated in the descriptor.
<legal all>
update_pn_check_needed
Consumer: REO
Producer: SW
When set, Pn_check_needed from this command will be
updated in the descriptor.
<legal all>
update_pn_shall_be_even
Consumer: REO
Producer: SW
When set, Pn_shall_be_even from this command will be
updated in the descriptor.
<legal all>
update_pn_shall_be_uneven
Consumer: REO
Producer: SW
When set, Pn_shall_be_uneven from this command will be
updated in the descriptor.
<legal all>
update_pn_handling_enable
Consumer: REO
Producer: SW
When set, Pn_handling_enable from this command will be
updated in the descriptor.
<legal all>
update_pn_size
Consumer: REO
Producer: SW
When set, Pn_size from this command will be updated in
the descriptor.
<legal all>
update_ignore_ampdu_flag
Consumer: REO
Producer: SW
When set, Ignore_ampdu_flag from this command will be
updated in the descriptor.
<legal all>
update_svld
Consumer: REO
Producer: SW
When set, Svld from this command will be updated in the
descriptor.
<legal all>
update_ssn
Consumer: REO
Producer: SW
When set, SSN from this command will be updated in the
descriptor.
<legal all>
update_seq_2k_error_detected_flag
Consumer: REO
Producer: SW
When set, Seq_2k_error_detected_flag from this command
will be updated in the descriptor.
<legal all>
update_pn_error_detected_flag
Consumer: REO
Producer: SW
When set, pn_error_detected_flag from this command will
be updated in the descriptor.
<legal all>
update_pn_valid
Consumer: REO
Producer: SW
When set, pn_valid from this command will be updated in
the descriptor.
<legal all>
update_pn
Consumer: REO
Producer: SW
When set, all pn_... fields from this command will be
updated in the descriptor.
<legal all>
clear_stat_counters
Consumer: REO
Producer: SW
When set, REO will clear (=> set to 0) the following
stat counters in the REO_QUEUE_STRUCT
Last_rx_enqueue_TimeStamp
Last_rx_dequeue_Timestamp
Rx_bitmap (not a counter, but bitmap is cleared)
Timeout_count
Forward_due_to_bar_count
Duplicate_count
Frames_in_order_count
BAR_received_count
MPDU_Frames_processed_count
MSDU_Frames_processed_count
Total_processed_byte_count
Late_receive_MPDU_count
window_jump_2k
Hole_count
<legal all>
receive_queue_number
Field value to be copied over into the RX_REO_QUEUE
descriptor.
<legal all>
vld
Field only valid when Update_VLD is set
For Update_VLD set and VLD clear, SW MUST set the
Flush_from_cache bit in this command.
Field value to be copied over into the RX_REO_QUEUE
descriptor.
<legal all>
associated_link_descriptor_counter
Field only valid when
Update_Associated_link_descriptor_counter is set
Field value to be copied over into the RX_REO_QUEUE
descriptor.
<legal all>
disable_duplicate_detection
Field only valid when Update_Disable_duplicate_detection
is set
Field value to be copied over into the RX_REO_QUEUE
descriptor.
<legal all>
soft_reorder_enable
Field only valid when Update_Soft_reorder_enable is set
Field value to be copied over into the RX_REO_QUEUE
descriptor.
<legal all>
ac
Field only valid when Update_AC is set
Field value to be copied over into the RX_REO_QUEUE
descriptor.
<legal all>
bar
Field only valid when Update_BAR is set
Field value to be copied over into the RX_REO_QUEUE
descriptor.
<legal all>
rty
Field only valid when Update_RTY is set
Field value to be copied over into the RX_REO_QUEUE
descriptor.
<legal all>
chk_2k_mode
Field only valid when Update_Chk_2k_Mode is set
Field value to be copied over into the RX_REO_QUEUE
descriptor.
<legal all>
oor_mode
Field only valid when Update_OOR_Mode is set
Field value to be copied over into the RX_REO_QUEUE
descriptor.
<legal all>
pn_check_needed
Field only valid when Update_Pn_check_needed is set
Field value to be copied over into the RX_REO_QUEUE
descriptor.
<legal all>
pn_shall_be_even
Field only valid when Update_Pn_shall_be_even is set
Field value to be copied over into the RX_REO_QUEUE
descriptor.
<legal all>
pn_shall_be_uneven
Field only valid when Update_Pn_shall_be_uneven is set
Field value to be copied over into the RX_REO_QUEUE
descriptor.
<legal all>
pn_handling_enable
Field only valid when Update_Pn_handling_enable is set
Field value to be copied over into the RX_REO_QUEUE
descriptor.
<legal all>
ignore_ampdu_flag
Field only valid when Update_Ignore_ampdu_flag is set
Field value to be copied over into the RX_REO_QUEUE
descriptor.
<legal all>
ba_window_size
Field only valid when Update_BA_window_size is set
Field value to be copied over into the RX_REO_QUEUE
descriptor.
<legal all>
pn_size
Field only valid when Update_Pn_size is set
Field value to be copied over into the RX_REO_QUEUE
descriptor.
<enum 0 pn_size_24>
<enum 1 pn_size_48>
<enum 2 pn_size_128>
<legal 0-2>
svld
Field only valid when Update_Svld is set
Field value to be copied over into the RX_REO_QUEUE
descriptor.
<legal all>
ssn
Field only valid when Update_SSN is set
Field value to be copied over into the RX_REO_QUEUE
descriptor.
<legal all>
seq_2k_error_detected_flag
Field only valid when Update_Seq_2k_error_detected_flag
is set
Field value to be copied over into the RX_REO_QUEUE
descriptor.
<legal all>
pn_error_detected_flag
Field only valid when Update_pn_error_detected_flag is
set
Field value to be copied over into the RX_REO_QUEUE
descriptor.
<legal all>
pn_valid
Field only valid when Update_pn_valid is set
Field value to be copied over into the RX_REO_QUEUE
descriptor.
<legal all>
flush_from_cache
When set, REO shall, after finishing the execution of
this command, flush the related descriptor from the cache.
<legal all>
reserved_4a
<legal 0>
pn_31_0
Field only valid when Update_Pn is set
Field value to be copied over into the RX_REO_QUEUE
descriptor.
<legal all>
pn_63_32
Field only valid when Update_pn is set
Field value to be copied over into the RX_REO_QUEUE
descriptor.
<legal all>
pn_95_64
Field only valid when Update_pn is set
Field value to be copied over into the RX_REO_QUEUE
descriptor.
<legal all>
pn_127_96
Field only valid when Update_pn is set
Field value to be copied over into the RX_REO_QUEUE
descriptor.
<legal all>
*/
/* EXTERNAL REFERENCE : struct uniform_reo_cmd_header cmd_header */
/* Description REO_UPDATE_RX_REO_QUEUE_0_CMD_HEADER_REO_CMD_NUMBER
Consumer: REO/SW/DEBUG
Producer: SW
This number can be used by SW to track, identify and
link the created commands with the command statusses
<legal all>
*/
#define REO_UPDATE_RX_REO_QUEUE_0_CMD_HEADER_REO_CMD_NUMBER_OFFSET 0x00000000
#define REO_UPDATE_RX_REO_QUEUE_0_CMD_HEADER_REO_CMD_NUMBER_LSB 0
#define REO_UPDATE_RX_REO_QUEUE_0_CMD_HEADER_REO_CMD_NUMBER_MASK 0x0000ffff
/* Description REO_UPDATE_RX_REO_QUEUE_0_CMD_HEADER_REO_STATUS_REQUIRED
Consumer: REO
Producer: SW
<enum 0 NoStatus> REO does not need to generate a status
TLV for the execution of this command
<enum 1 StatusRequired> REO shall generate a status TLV
for the execution of this command
<legal all>
*/
#define REO_UPDATE_RX_REO_QUEUE_0_CMD_HEADER_REO_STATUS_REQUIRED_OFFSET 0x00000000
#define REO_UPDATE_RX_REO_QUEUE_0_CMD_HEADER_REO_STATUS_REQUIRED_LSB 16
#define REO_UPDATE_RX_REO_QUEUE_0_CMD_HEADER_REO_STATUS_REQUIRED_MASK 0x00010000
/* Description REO_UPDATE_RX_REO_QUEUE_0_CMD_HEADER_RESERVED_0A
<legal 0>
*/
#define REO_UPDATE_RX_REO_QUEUE_0_CMD_HEADER_RESERVED_0A_OFFSET 0x00000000
#define REO_UPDATE_RX_REO_QUEUE_0_CMD_HEADER_RESERVED_0A_LSB 17
#define REO_UPDATE_RX_REO_QUEUE_0_CMD_HEADER_RESERVED_0A_MASK 0xfffe0000
/* Description REO_UPDATE_RX_REO_QUEUE_1_RX_REO_QUEUE_DESC_ADDR_31_0
Consumer: REO
Producer: SW
Address (lower 32 bits) of the REO queue descriptor
<legal all>
*/
#define REO_UPDATE_RX_REO_QUEUE_1_RX_REO_QUEUE_DESC_ADDR_31_0_OFFSET 0x00000004
#define REO_UPDATE_RX_REO_QUEUE_1_RX_REO_QUEUE_DESC_ADDR_31_0_LSB 0
#define REO_UPDATE_RX_REO_QUEUE_1_RX_REO_QUEUE_DESC_ADDR_31_0_MASK 0xffffffff
/* Description REO_UPDATE_RX_REO_QUEUE_2_RX_REO_QUEUE_DESC_ADDR_39_32
Consumer: REO
Producer: SW
Address (upper 8 bits) of the REO queue descriptor
<legal all>
*/
#define REO_UPDATE_RX_REO_QUEUE_2_RX_REO_QUEUE_DESC_ADDR_39_32_OFFSET 0x00000008
#define REO_UPDATE_RX_REO_QUEUE_2_RX_REO_QUEUE_DESC_ADDR_39_32_LSB 0
#define REO_UPDATE_RX_REO_QUEUE_2_RX_REO_QUEUE_DESC_ADDR_39_32_MASK 0x000000ff
/* Description REO_UPDATE_RX_REO_QUEUE_2_UPDATE_RECEIVE_QUEUE_NUMBER
Consumer: REO
Producer: SW
When set, receive_queue_number from this command will be
updated in the descriptor.
<legal all>
*/
#define REO_UPDATE_RX_REO_QUEUE_2_UPDATE_RECEIVE_QUEUE_NUMBER_OFFSET 0x00000008
#define REO_UPDATE_RX_REO_QUEUE_2_UPDATE_RECEIVE_QUEUE_NUMBER_LSB 8
#define REO_UPDATE_RX_REO_QUEUE_2_UPDATE_RECEIVE_QUEUE_NUMBER_MASK 0x00000100
/* Description REO_UPDATE_RX_REO_QUEUE_2_UPDATE_VLD
Consumer: REO
Producer: SW
When clear, REO will NOT update the VLD bit setting. For
this setting, SW MUST set the Flush_from_cache bit in this
command.
When set, VLD from this command will be updated in the
descriptor.
<legal all>
*/
#define REO_UPDATE_RX_REO_QUEUE_2_UPDATE_VLD_OFFSET 0x00000008
#define REO_UPDATE_RX_REO_QUEUE_2_UPDATE_VLD_LSB 9
#define REO_UPDATE_RX_REO_QUEUE_2_UPDATE_VLD_MASK 0x00000200
/* Description REO_UPDATE_RX_REO_QUEUE_2_UPDATE_ASSOCIATED_LINK_DESCRIPTOR_COUNTER
Consumer: REO
Producer: SW
When set, Associated_link_descriptor_counter from this
command will be updated in the descriptor.
<legal all>
*/
#define REO_UPDATE_RX_REO_QUEUE_2_UPDATE_ASSOCIATED_LINK_DESCRIPTOR_COUNTER_OFFSET 0x00000008
#define REO_UPDATE_RX_REO_QUEUE_2_UPDATE_ASSOCIATED_LINK_DESCRIPTOR_COUNTER_LSB 10
#define REO_UPDATE_RX_REO_QUEUE_2_UPDATE_ASSOCIATED_LINK_DESCRIPTOR_COUNTER_MASK 0x00000400
/* Description REO_UPDATE_RX_REO_QUEUE_2_UPDATE_DISABLE_DUPLICATE_DETECTION
Consumer: REO
Producer: SW
When set, Disable_duplicate_detection from this command
will be updated in the descriptor.
<legal all>
*/
#define REO_UPDATE_RX_REO_QUEUE_2_UPDATE_DISABLE_DUPLICATE_DETECTION_OFFSET 0x00000008
#define REO_UPDATE_RX_REO_QUEUE_2_UPDATE_DISABLE_DUPLICATE_DETECTION_LSB 11
#define REO_UPDATE_RX_REO_QUEUE_2_UPDATE_DISABLE_DUPLICATE_DETECTION_MASK 0x00000800
/* Description REO_UPDATE_RX_REO_QUEUE_2_UPDATE_SOFT_REORDER_ENABLE
Consumer: REO
Producer: SW
When set, Soft_reorder_enable from this command will be
updated in the descriptor.
<legal all>
*/
#define REO_UPDATE_RX_REO_QUEUE_2_UPDATE_SOFT_REORDER_ENABLE_OFFSET 0x00000008
#define REO_UPDATE_RX_REO_QUEUE_2_UPDATE_SOFT_REORDER_ENABLE_LSB 12
#define REO_UPDATE_RX_REO_QUEUE_2_UPDATE_SOFT_REORDER_ENABLE_MASK 0x00001000
/* Description REO_UPDATE_RX_REO_QUEUE_2_UPDATE_AC
Consumer: REO
Producer: SW
When set, AC from this command will be updated in the
descriptor.
<legal all>
*/
#define REO_UPDATE_RX_REO_QUEUE_2_UPDATE_AC_OFFSET 0x00000008
#define REO_UPDATE_RX_REO_QUEUE_2_UPDATE_AC_LSB 13
#define REO_UPDATE_RX_REO_QUEUE_2_UPDATE_AC_MASK 0x00002000
/* Description REO_UPDATE_RX_REO_QUEUE_2_UPDATE_BAR
Consumer: REO
Producer: SW
When set, BAR from this command will be updated in the
descriptor.
<legal all>
*/
#define REO_UPDATE_RX_REO_QUEUE_2_UPDATE_BAR_OFFSET 0x00000008
#define REO_UPDATE_RX_REO_QUEUE_2_UPDATE_BAR_LSB 14
#define REO_UPDATE_RX_REO_QUEUE_2_UPDATE_BAR_MASK 0x00004000
/* Description REO_UPDATE_RX_REO_QUEUE_2_UPDATE_RTY
Consumer: REO
Producer: SW
When set, RTY from this command will be updated in the
descriptor.
<legal all>
*/
#define REO_UPDATE_RX_REO_QUEUE_2_UPDATE_RTY_OFFSET 0x00000008
#define REO_UPDATE_RX_REO_QUEUE_2_UPDATE_RTY_LSB 15
#define REO_UPDATE_RX_REO_QUEUE_2_UPDATE_RTY_MASK 0x00008000
/* Description REO_UPDATE_RX_REO_QUEUE_2_UPDATE_CHK_2K_MODE
Consumer: REO
Producer: SW
When set, Chk_2k_mode from this command will be updated
in the descriptor.
<legal all>
*/
#define REO_UPDATE_RX_REO_QUEUE_2_UPDATE_CHK_2K_MODE_OFFSET 0x00000008
#define REO_UPDATE_RX_REO_QUEUE_2_UPDATE_CHK_2K_MODE_LSB 16
#define REO_UPDATE_RX_REO_QUEUE_2_UPDATE_CHK_2K_MODE_MASK 0x00010000
/* Description REO_UPDATE_RX_REO_QUEUE_2_UPDATE_OOR_MODE
Consumer: REO
Producer: SW
When set, OOR_Mode from this command will be updated in
the descriptor.
<legal all>
*/
#define REO_UPDATE_RX_REO_QUEUE_2_UPDATE_OOR_MODE_OFFSET 0x00000008
#define REO_UPDATE_RX_REO_QUEUE_2_UPDATE_OOR_MODE_LSB 17
#define REO_UPDATE_RX_REO_QUEUE_2_UPDATE_OOR_MODE_MASK 0x00020000
/* Description REO_UPDATE_RX_REO_QUEUE_2_UPDATE_BA_WINDOW_SIZE
Consumer: REO
Producer: SW
When set, BA_window_size from this command will be
updated in the descriptor.
<legal all>
*/
#define REO_UPDATE_RX_REO_QUEUE_2_UPDATE_BA_WINDOW_SIZE_OFFSET 0x00000008
#define REO_UPDATE_RX_REO_QUEUE_2_UPDATE_BA_WINDOW_SIZE_LSB 18
#define REO_UPDATE_RX_REO_QUEUE_2_UPDATE_BA_WINDOW_SIZE_MASK 0x00040000
/* Description REO_UPDATE_RX_REO_QUEUE_2_UPDATE_PN_CHECK_NEEDED
Consumer: REO
Producer: SW
When set, Pn_check_needed from this command will be
updated in the descriptor.
<legal all>
*/
#define REO_UPDATE_RX_REO_QUEUE_2_UPDATE_PN_CHECK_NEEDED_OFFSET 0x00000008
#define REO_UPDATE_RX_REO_QUEUE_2_UPDATE_PN_CHECK_NEEDED_LSB 19
#define REO_UPDATE_RX_REO_QUEUE_2_UPDATE_PN_CHECK_NEEDED_MASK 0x00080000
/* Description REO_UPDATE_RX_REO_QUEUE_2_UPDATE_PN_SHALL_BE_EVEN
Consumer: REO
Producer: SW
When set, Pn_shall_be_even from this command will be
updated in the descriptor.
<legal all>
*/
#define REO_UPDATE_RX_REO_QUEUE_2_UPDATE_PN_SHALL_BE_EVEN_OFFSET 0x00000008
#define REO_UPDATE_RX_REO_QUEUE_2_UPDATE_PN_SHALL_BE_EVEN_LSB 20
#define REO_UPDATE_RX_REO_QUEUE_2_UPDATE_PN_SHALL_BE_EVEN_MASK 0x00100000
/* Description REO_UPDATE_RX_REO_QUEUE_2_UPDATE_PN_SHALL_BE_UNEVEN
Consumer: REO
Producer: SW
When set, Pn_shall_be_uneven from this command will be
updated in the descriptor.
<legal all>
*/
#define REO_UPDATE_RX_REO_QUEUE_2_UPDATE_PN_SHALL_BE_UNEVEN_OFFSET 0x00000008
#define REO_UPDATE_RX_REO_QUEUE_2_UPDATE_PN_SHALL_BE_UNEVEN_LSB 21
#define REO_UPDATE_RX_REO_QUEUE_2_UPDATE_PN_SHALL_BE_UNEVEN_MASK 0x00200000
/* Description REO_UPDATE_RX_REO_QUEUE_2_UPDATE_PN_HANDLING_ENABLE
Consumer: REO
Producer: SW
When set, Pn_handling_enable from this command will be
updated in the descriptor.
<legal all>
*/
#define REO_UPDATE_RX_REO_QUEUE_2_UPDATE_PN_HANDLING_ENABLE_OFFSET 0x00000008
#define REO_UPDATE_RX_REO_QUEUE_2_UPDATE_PN_HANDLING_ENABLE_LSB 22
#define REO_UPDATE_RX_REO_QUEUE_2_UPDATE_PN_HANDLING_ENABLE_MASK 0x00400000
/* Description REO_UPDATE_RX_REO_QUEUE_2_UPDATE_PN_SIZE
Consumer: REO
Producer: SW
When set, Pn_size from this command will be updated in
the descriptor.
<legal all>
*/
#define REO_UPDATE_RX_REO_QUEUE_2_UPDATE_PN_SIZE_OFFSET 0x00000008
#define REO_UPDATE_RX_REO_QUEUE_2_UPDATE_PN_SIZE_LSB 23
#define REO_UPDATE_RX_REO_QUEUE_2_UPDATE_PN_SIZE_MASK 0x00800000
/* Description REO_UPDATE_RX_REO_QUEUE_2_UPDATE_IGNORE_AMPDU_FLAG
Consumer: REO
Producer: SW
When set, Ignore_ampdu_flag from this command will be
updated in the descriptor.
<legal all>
*/
#define REO_UPDATE_RX_REO_QUEUE_2_UPDATE_IGNORE_AMPDU_FLAG_OFFSET 0x00000008
#define REO_UPDATE_RX_REO_QUEUE_2_UPDATE_IGNORE_AMPDU_FLAG_LSB 24
#define REO_UPDATE_RX_REO_QUEUE_2_UPDATE_IGNORE_AMPDU_FLAG_MASK 0x01000000
/* Description REO_UPDATE_RX_REO_QUEUE_2_UPDATE_SVLD
Consumer: REO
Producer: SW
When set, Svld from this command will be updated in the
descriptor.
<legal all>
*/
#define REO_UPDATE_RX_REO_QUEUE_2_UPDATE_SVLD_OFFSET 0x00000008
#define REO_UPDATE_RX_REO_QUEUE_2_UPDATE_SVLD_LSB 25
#define REO_UPDATE_RX_REO_QUEUE_2_UPDATE_SVLD_MASK 0x02000000
/* Description REO_UPDATE_RX_REO_QUEUE_2_UPDATE_SSN
Consumer: REO
Producer: SW
When set, SSN from this command will be updated in the
descriptor.
<legal all>
*/
#define REO_UPDATE_RX_REO_QUEUE_2_UPDATE_SSN_OFFSET 0x00000008
#define REO_UPDATE_RX_REO_QUEUE_2_UPDATE_SSN_LSB 26
#define REO_UPDATE_RX_REO_QUEUE_2_UPDATE_SSN_MASK 0x04000000
/* Description REO_UPDATE_RX_REO_QUEUE_2_UPDATE_SEQ_2K_ERROR_DETECTED_FLAG
Consumer: REO
Producer: SW
When set, Seq_2k_error_detected_flag from this command
will be updated in the descriptor.
<legal all>
*/
#define REO_UPDATE_RX_REO_QUEUE_2_UPDATE_SEQ_2K_ERROR_DETECTED_FLAG_OFFSET 0x00000008
#define REO_UPDATE_RX_REO_QUEUE_2_UPDATE_SEQ_2K_ERROR_DETECTED_FLAG_LSB 27
#define REO_UPDATE_RX_REO_QUEUE_2_UPDATE_SEQ_2K_ERROR_DETECTED_FLAG_MASK 0x08000000
/* Description REO_UPDATE_RX_REO_QUEUE_2_UPDATE_PN_ERROR_DETECTED_FLAG
Consumer: REO
Producer: SW
When set, pn_error_detected_flag from this command will
be updated in the descriptor.
<legal all>
*/
#define REO_UPDATE_RX_REO_QUEUE_2_UPDATE_PN_ERROR_DETECTED_FLAG_OFFSET 0x00000008
#define REO_UPDATE_RX_REO_QUEUE_2_UPDATE_PN_ERROR_DETECTED_FLAG_LSB 28
#define REO_UPDATE_RX_REO_QUEUE_2_UPDATE_PN_ERROR_DETECTED_FLAG_MASK 0x10000000
/* Description REO_UPDATE_RX_REO_QUEUE_2_UPDATE_PN_VALID
Consumer: REO
Producer: SW
When set, pn_valid from this command will be updated in
the descriptor.
<legal all>
*/
#define REO_UPDATE_RX_REO_QUEUE_2_UPDATE_PN_VALID_OFFSET 0x00000008
#define REO_UPDATE_RX_REO_QUEUE_2_UPDATE_PN_VALID_LSB 29
#define REO_UPDATE_RX_REO_QUEUE_2_UPDATE_PN_VALID_MASK 0x20000000
/* Description REO_UPDATE_RX_REO_QUEUE_2_UPDATE_PN
Consumer: REO
Producer: SW
When set, all pn_... fields from this command will be
updated in the descriptor.
<legal all>
*/
#define REO_UPDATE_RX_REO_QUEUE_2_UPDATE_PN_OFFSET 0x00000008
#define REO_UPDATE_RX_REO_QUEUE_2_UPDATE_PN_LSB 30
#define REO_UPDATE_RX_REO_QUEUE_2_UPDATE_PN_MASK 0x40000000
/* Description REO_UPDATE_RX_REO_QUEUE_2_CLEAR_STAT_COUNTERS
Consumer: REO
Producer: SW
When set, REO will clear (=> set to 0) the following
stat counters in the REO_QUEUE_STRUCT
Last_rx_enqueue_TimeStamp
Last_rx_dequeue_Timestamp
Rx_bitmap (not a counter, but bitmap is cleared)
Timeout_count
Forward_due_to_bar_count
Duplicate_count
Frames_in_order_count
BAR_received_count
MPDU_Frames_processed_count
MSDU_Frames_processed_count
Total_processed_byte_count
Late_receive_MPDU_count
window_jump_2k
Hole_count
<legal all>
*/
#define REO_UPDATE_RX_REO_QUEUE_2_CLEAR_STAT_COUNTERS_OFFSET 0x00000008
#define REO_UPDATE_RX_REO_QUEUE_2_CLEAR_STAT_COUNTERS_LSB 31
#define REO_UPDATE_RX_REO_QUEUE_2_CLEAR_STAT_COUNTERS_MASK 0x80000000
/* Description REO_UPDATE_RX_REO_QUEUE_3_RECEIVE_QUEUE_NUMBER
Field value to be copied over into the RX_REO_QUEUE
descriptor.
<legal all>
*/
#define REO_UPDATE_RX_REO_QUEUE_3_RECEIVE_QUEUE_NUMBER_OFFSET 0x0000000c
#define REO_UPDATE_RX_REO_QUEUE_3_RECEIVE_QUEUE_NUMBER_LSB 0
#define REO_UPDATE_RX_REO_QUEUE_3_RECEIVE_QUEUE_NUMBER_MASK 0x0000ffff
/* Description REO_UPDATE_RX_REO_QUEUE_3_VLD
Field only valid when Update_VLD is set
For Update_VLD set and VLD clear, SW MUST set the
Flush_from_cache bit in this command.
Field value to be copied over into the RX_REO_QUEUE
descriptor.
<legal all>
*/
#define REO_UPDATE_RX_REO_QUEUE_3_VLD_OFFSET 0x0000000c
#define REO_UPDATE_RX_REO_QUEUE_3_VLD_LSB 16
#define REO_UPDATE_RX_REO_QUEUE_3_VLD_MASK 0x00010000
/* Description REO_UPDATE_RX_REO_QUEUE_3_ASSOCIATED_LINK_DESCRIPTOR_COUNTER
Field only valid when
Update_Associated_link_descriptor_counter is set
Field value to be copied over into the RX_REO_QUEUE
descriptor.
<legal all>
*/
#define REO_UPDATE_RX_REO_QUEUE_3_ASSOCIATED_LINK_DESCRIPTOR_COUNTER_OFFSET 0x0000000c
#define REO_UPDATE_RX_REO_QUEUE_3_ASSOCIATED_LINK_DESCRIPTOR_COUNTER_LSB 17
#define REO_UPDATE_RX_REO_QUEUE_3_ASSOCIATED_LINK_DESCRIPTOR_COUNTER_MASK 0x00060000
/* Description REO_UPDATE_RX_REO_QUEUE_3_DISABLE_DUPLICATE_DETECTION
Field only valid when Update_Disable_duplicate_detection
is set
Field value to be copied over into the RX_REO_QUEUE
descriptor.
<legal all>
*/
#define REO_UPDATE_RX_REO_QUEUE_3_DISABLE_DUPLICATE_DETECTION_OFFSET 0x0000000c
#define REO_UPDATE_RX_REO_QUEUE_3_DISABLE_DUPLICATE_DETECTION_LSB 19
#define REO_UPDATE_RX_REO_QUEUE_3_DISABLE_DUPLICATE_DETECTION_MASK 0x00080000
/* Description REO_UPDATE_RX_REO_QUEUE_3_SOFT_REORDER_ENABLE
Field only valid when Update_Soft_reorder_enable is set
Field value to be copied over into the RX_REO_QUEUE
descriptor.
<legal all>
*/
#define REO_UPDATE_RX_REO_QUEUE_3_SOFT_REORDER_ENABLE_OFFSET 0x0000000c
#define REO_UPDATE_RX_REO_QUEUE_3_SOFT_REORDER_ENABLE_LSB 20
#define REO_UPDATE_RX_REO_QUEUE_3_SOFT_REORDER_ENABLE_MASK 0x00100000
/* Description REO_UPDATE_RX_REO_QUEUE_3_AC
Field only valid when Update_AC is set
Field value to be copied over into the RX_REO_QUEUE
descriptor.
<legal all>
*/
#define REO_UPDATE_RX_REO_QUEUE_3_AC_OFFSET 0x0000000c
#define REO_UPDATE_RX_REO_QUEUE_3_AC_LSB 21
#define REO_UPDATE_RX_REO_QUEUE_3_AC_MASK 0x00600000
/* Description REO_UPDATE_RX_REO_QUEUE_3_BAR
Field only valid when Update_BAR is set
Field value to be copied over into the RX_REO_QUEUE
descriptor.
<legal all>
*/
#define REO_UPDATE_RX_REO_QUEUE_3_BAR_OFFSET 0x0000000c
#define REO_UPDATE_RX_REO_QUEUE_3_BAR_LSB 23
#define REO_UPDATE_RX_REO_QUEUE_3_BAR_MASK 0x00800000
/* Description REO_UPDATE_RX_REO_QUEUE_3_RTY
Field only valid when Update_RTY is set
Field value to be copied over into the RX_REO_QUEUE
descriptor.
<legal all>
*/
#define REO_UPDATE_RX_REO_QUEUE_3_RTY_OFFSET 0x0000000c
#define REO_UPDATE_RX_REO_QUEUE_3_RTY_LSB 24
#define REO_UPDATE_RX_REO_QUEUE_3_RTY_MASK 0x01000000
/* Description REO_UPDATE_RX_REO_QUEUE_3_CHK_2K_MODE
Field only valid when Update_Chk_2k_Mode is set
Field value to be copied over into the RX_REO_QUEUE
descriptor.
<legal all>
*/
#define REO_UPDATE_RX_REO_QUEUE_3_CHK_2K_MODE_OFFSET 0x0000000c
#define REO_UPDATE_RX_REO_QUEUE_3_CHK_2K_MODE_LSB 25
#define REO_UPDATE_RX_REO_QUEUE_3_CHK_2K_MODE_MASK 0x02000000
/* Description REO_UPDATE_RX_REO_QUEUE_3_OOR_MODE
Field only valid when Update_OOR_Mode is set
Field value to be copied over into the RX_REO_QUEUE
descriptor.
<legal all>
*/
#define REO_UPDATE_RX_REO_QUEUE_3_OOR_MODE_OFFSET 0x0000000c
#define REO_UPDATE_RX_REO_QUEUE_3_OOR_MODE_LSB 26
#define REO_UPDATE_RX_REO_QUEUE_3_OOR_MODE_MASK 0x04000000
/* Description REO_UPDATE_RX_REO_QUEUE_3_PN_CHECK_NEEDED
Field only valid when Update_Pn_check_needed is set
Field value to be copied over into the RX_REO_QUEUE
descriptor.
<legal all>
*/
#define REO_UPDATE_RX_REO_QUEUE_3_PN_CHECK_NEEDED_OFFSET 0x0000000c
#define REO_UPDATE_RX_REO_QUEUE_3_PN_CHECK_NEEDED_LSB 27
#define REO_UPDATE_RX_REO_QUEUE_3_PN_CHECK_NEEDED_MASK 0x08000000
/* Description REO_UPDATE_RX_REO_QUEUE_3_PN_SHALL_BE_EVEN
Field only valid when Update_Pn_shall_be_even is set
Field value to be copied over into the RX_REO_QUEUE
descriptor.
<legal all>
*/
#define REO_UPDATE_RX_REO_QUEUE_3_PN_SHALL_BE_EVEN_OFFSET 0x0000000c
#define REO_UPDATE_RX_REO_QUEUE_3_PN_SHALL_BE_EVEN_LSB 28
#define REO_UPDATE_RX_REO_QUEUE_3_PN_SHALL_BE_EVEN_MASK 0x10000000
/* Description REO_UPDATE_RX_REO_QUEUE_3_PN_SHALL_BE_UNEVEN
Field only valid when Update_Pn_shall_be_uneven is set
Field value to be copied over into the RX_REO_QUEUE
descriptor.
<legal all>
*/
#define REO_UPDATE_RX_REO_QUEUE_3_PN_SHALL_BE_UNEVEN_OFFSET 0x0000000c
#define REO_UPDATE_RX_REO_QUEUE_3_PN_SHALL_BE_UNEVEN_LSB 29
#define REO_UPDATE_RX_REO_QUEUE_3_PN_SHALL_BE_UNEVEN_MASK 0x20000000
/* Description REO_UPDATE_RX_REO_QUEUE_3_PN_HANDLING_ENABLE
Field only valid when Update_Pn_handling_enable is set
Field value to be copied over into the RX_REO_QUEUE
descriptor.
<legal all>
*/
#define REO_UPDATE_RX_REO_QUEUE_3_PN_HANDLING_ENABLE_OFFSET 0x0000000c
#define REO_UPDATE_RX_REO_QUEUE_3_PN_HANDLING_ENABLE_LSB 30
#define REO_UPDATE_RX_REO_QUEUE_3_PN_HANDLING_ENABLE_MASK 0x40000000
/* Description REO_UPDATE_RX_REO_QUEUE_3_IGNORE_AMPDU_FLAG
Field only valid when Update_Ignore_ampdu_flag is set
Field value to be copied over into the RX_REO_QUEUE
descriptor.
<legal all>
*/
#define REO_UPDATE_RX_REO_QUEUE_3_IGNORE_AMPDU_FLAG_OFFSET 0x0000000c
#define REO_UPDATE_RX_REO_QUEUE_3_IGNORE_AMPDU_FLAG_LSB 31
#define REO_UPDATE_RX_REO_QUEUE_3_IGNORE_AMPDU_FLAG_MASK 0x80000000
/* Description REO_UPDATE_RX_REO_QUEUE_4_BA_WINDOW_SIZE
Field only valid when Update_BA_window_size is set
Field value to be copied over into the RX_REO_QUEUE
descriptor.
<legal all>
*/
#define REO_UPDATE_RX_REO_QUEUE_4_BA_WINDOW_SIZE_OFFSET 0x00000010
#define REO_UPDATE_RX_REO_QUEUE_4_BA_WINDOW_SIZE_LSB 0
#define REO_UPDATE_RX_REO_QUEUE_4_BA_WINDOW_SIZE_MASK 0x000000ff
/* Description REO_UPDATE_RX_REO_QUEUE_4_PN_SIZE
Field only valid when Update_Pn_size is set
Field value to be copied over into the RX_REO_QUEUE
descriptor.
<enum 0 pn_size_24>
<enum 1 pn_size_48>
<enum 2 pn_size_128>
<legal 0-2>
*/
#define REO_UPDATE_RX_REO_QUEUE_4_PN_SIZE_OFFSET 0x00000010
#define REO_UPDATE_RX_REO_QUEUE_4_PN_SIZE_LSB 8
#define REO_UPDATE_RX_REO_QUEUE_4_PN_SIZE_MASK 0x00000300
/* Description REO_UPDATE_RX_REO_QUEUE_4_SVLD
Field only valid when Update_Svld is set
Field value to be copied over into the RX_REO_QUEUE
descriptor.
<legal all>
*/
#define REO_UPDATE_RX_REO_QUEUE_4_SVLD_OFFSET 0x00000010
#define REO_UPDATE_RX_REO_QUEUE_4_SVLD_LSB 10
#define REO_UPDATE_RX_REO_QUEUE_4_SVLD_MASK 0x00000400
/* Description REO_UPDATE_RX_REO_QUEUE_4_SSN
Field only valid when Update_SSN is set
Field value to be copied over into the RX_REO_QUEUE
descriptor.
<legal all>
*/
#define REO_UPDATE_RX_REO_QUEUE_4_SSN_OFFSET 0x00000010
#define REO_UPDATE_RX_REO_QUEUE_4_SSN_LSB 11
#define REO_UPDATE_RX_REO_QUEUE_4_SSN_MASK 0x007ff800
/* Description REO_UPDATE_RX_REO_QUEUE_4_SEQ_2K_ERROR_DETECTED_FLAG
Field only valid when Update_Seq_2k_error_detected_flag
is set
Field value to be copied over into the RX_REO_QUEUE
descriptor.
<legal all>
*/
#define REO_UPDATE_RX_REO_QUEUE_4_SEQ_2K_ERROR_DETECTED_FLAG_OFFSET 0x00000010
#define REO_UPDATE_RX_REO_QUEUE_4_SEQ_2K_ERROR_DETECTED_FLAG_LSB 23
#define REO_UPDATE_RX_REO_QUEUE_4_SEQ_2K_ERROR_DETECTED_FLAG_MASK 0x00800000
/* Description REO_UPDATE_RX_REO_QUEUE_4_PN_ERROR_DETECTED_FLAG
Field only valid when Update_pn_error_detected_flag is
set
Field value to be copied over into the RX_REO_QUEUE
descriptor.
<legal all>
*/
#define REO_UPDATE_RX_REO_QUEUE_4_PN_ERROR_DETECTED_FLAG_OFFSET 0x00000010
#define REO_UPDATE_RX_REO_QUEUE_4_PN_ERROR_DETECTED_FLAG_LSB 24
#define REO_UPDATE_RX_REO_QUEUE_4_PN_ERROR_DETECTED_FLAG_MASK 0x01000000
/* Description REO_UPDATE_RX_REO_QUEUE_4_PN_VALID
Field only valid when Update_pn_valid is set
Field value to be copied over into the RX_REO_QUEUE
descriptor.
<legal all>
*/
#define REO_UPDATE_RX_REO_QUEUE_4_PN_VALID_OFFSET 0x00000010
#define REO_UPDATE_RX_REO_QUEUE_4_PN_VALID_LSB 25
#define REO_UPDATE_RX_REO_QUEUE_4_PN_VALID_MASK 0x02000000
/* Description REO_UPDATE_RX_REO_QUEUE_4_FLUSH_FROM_CACHE
When set, REO shall, after finishing the execution of
this command, flush the related descriptor from the cache.
<legal all>
*/
#define REO_UPDATE_RX_REO_QUEUE_4_FLUSH_FROM_CACHE_OFFSET 0x00000010
#define REO_UPDATE_RX_REO_QUEUE_4_FLUSH_FROM_CACHE_LSB 26
#define REO_UPDATE_RX_REO_QUEUE_4_FLUSH_FROM_CACHE_MASK 0x04000000
/* Description REO_UPDATE_RX_REO_QUEUE_4_RESERVED_4A
<legal 0>
*/
#define REO_UPDATE_RX_REO_QUEUE_4_RESERVED_4A_OFFSET 0x00000010
#define REO_UPDATE_RX_REO_QUEUE_4_RESERVED_4A_LSB 27
#define REO_UPDATE_RX_REO_QUEUE_4_RESERVED_4A_MASK 0xf8000000
/* Description REO_UPDATE_RX_REO_QUEUE_5_PN_31_0
Field only valid when Update_Pn is set
Field value to be copied over into the RX_REO_QUEUE
descriptor.
<legal all>
*/
#define REO_UPDATE_RX_REO_QUEUE_5_PN_31_0_OFFSET 0x00000014
#define REO_UPDATE_RX_REO_QUEUE_5_PN_31_0_LSB 0
#define REO_UPDATE_RX_REO_QUEUE_5_PN_31_0_MASK 0xffffffff
/* Description REO_UPDATE_RX_REO_QUEUE_6_PN_63_32
Field only valid when Update_pn is set
Field value to be copied over into the RX_REO_QUEUE
descriptor.
<legal all>
*/
#define REO_UPDATE_RX_REO_QUEUE_6_PN_63_32_OFFSET 0x00000018
#define REO_UPDATE_RX_REO_QUEUE_6_PN_63_32_LSB 0
#define REO_UPDATE_RX_REO_QUEUE_6_PN_63_32_MASK 0xffffffff
/* Description REO_UPDATE_RX_REO_QUEUE_7_PN_95_64
Field only valid when Update_pn is set
Field value to be copied over into the RX_REO_QUEUE
descriptor.
<legal all>
*/
#define REO_UPDATE_RX_REO_QUEUE_7_PN_95_64_OFFSET 0x0000001c
#define REO_UPDATE_RX_REO_QUEUE_7_PN_95_64_LSB 0
#define REO_UPDATE_RX_REO_QUEUE_7_PN_95_64_MASK 0xffffffff
/* Description REO_UPDATE_RX_REO_QUEUE_8_PN_127_96
Field only valid when Update_pn is set
Field value to be copied over into the RX_REO_QUEUE
descriptor.
<legal all>
*/
#define REO_UPDATE_RX_REO_QUEUE_8_PN_127_96_OFFSET 0x00000020
#define REO_UPDATE_RX_REO_QUEUE_8_PN_127_96_LSB 0
#define REO_UPDATE_RX_REO_QUEUE_8_PN_127_96_MASK 0xffffffff
#endif // _REO_UPDATE_RX_REO_QUEUE_H_
|