diff options
| author | Peter Ujfalusi <peter.ujfalusi@ti.com> | 2012-04-19 21:21:25 +0800 |
|---|---|---|
| committer | Andy Green <andy.green@linaro.org> | 2012-06-22 09:57:32 +0800 |
| commit | 8dca5e6aad838701347f60d66a8e40643b9b2378 (patch) | |
| tree | ef937c65ba62b18c587a42c684429c06fda4e036 /arch | |
| parent | 50839438d3596594e41023e55f99c3b9964d62a4 (diff) | |
| download | panda-8dca5e6aad838701347f60d66a8e40643b9b2378.tar.gz | |
ARM: OMAP4: clock: Add aliases for McBSP fclk clocks
CLKS signal for McBSP ports can be selected from internal (PRCM) or external
(ABE_CLKS pin) source.
To be able to use existing code we need to create clock aliases consistent
among OMAP2/3/4.
Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
Diffstat (limited to 'arch')
| -rw-r--r-- | arch/arm/mach-omap2/clock44xx_data.c | 8 |
1 files changed, 8 insertions, 0 deletions
diff --git a/arch/arm/mach-omap2/clock44xx_data.c b/arch/arm/mach-omap2/clock44xx_data.c index f1c5c8c59c2..c1942e924fc 100644 --- a/arch/arm/mach-omap2/clock44xx_data.c +++ b/arch/arm/mach-omap2/clock44xx_data.c @@ -3163,6 +3163,10 @@ static struct clk auxclkreq5_ck = { static struct omap_clk omap44xx_clks[] = { CLK(NULL, "extalt_clkin_ck", &extalt_clkin_ck, CK_443X), CLK(NULL, "pad_clks_ck", &pad_clks_ck, CK_443X), + CLK("omap-mcbsp.1", "pad_fck", &pad_clks_ck, CK_443X), + CLK("omap-mcbsp.2", "pad_fck", &pad_clks_ck, CK_443X), + CLK("omap-mcbsp.3", "pad_fck", &pad_clks_ck, CK_443X), + CLK("omap-mcbsp.4", "pad_fck", &pad_clks_ck, CK_443X), CLK(NULL, "pad_slimbus_core_clks_ck", &pad_slimbus_core_clks_ck, CK_443X), CLK(NULL, "secure_32k_clk_src_ck", &secure_32k_clk_src_ck, CK_443X), CLK(NULL, "slimbus_clk", &slimbus_clk, CK_443X), @@ -3299,12 +3303,16 @@ static struct omap_clk omap44xx_clks[] = { CLK(NULL, "mcasp_sync_mux_ck", &mcasp_sync_mux_ck, CK_443X), CLK(NULL, "mcasp_fck", &mcasp_fck, CK_443X), CLK(NULL, "mcbsp1_sync_mux_ck", &mcbsp1_sync_mux_ck, CK_443X), + CLK("omap-mcbsp.1", "prcm_fck", &mcbsp1_sync_mux_ck, CK_443X), CLK(NULL, "mcbsp1_fck", &mcbsp1_fck, CK_443X), CLK(NULL, "mcbsp2_sync_mux_ck", &mcbsp2_sync_mux_ck, CK_443X), + CLK("omap-mcbsp.2", "prcm_fck", &mcbsp2_sync_mux_ck, CK_443X), CLK(NULL, "mcbsp2_fck", &mcbsp2_fck, CK_443X), CLK(NULL, "mcbsp3_sync_mux_ck", &mcbsp3_sync_mux_ck, CK_443X), + CLK("omap-mcbsp.3", "prcm_fck", &mcbsp3_sync_mux_ck, CK_443X), CLK(NULL, "mcbsp3_fck", &mcbsp3_fck, CK_443X), CLK(NULL, "mcbsp4_sync_mux_ck", &mcbsp4_sync_mux_ck, CK_443X), + CLK("omap-mcbsp.4", "prcm_fck", &mcbsp4_sync_mux_ck, CK_443X), CLK(NULL, "mcbsp4_fck", &mcbsp4_fck, CK_443X), CLK(NULL, "mcpdm_fck", &mcpdm_fck, CK_443X), CLK(NULL, "mcspi1_fck", &mcspi1_fck, CK_443X), |