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author | The Android Open Source Project <initial-contribution@android.com> | 2012-04-01 00:00:00 -0700 |
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committer | The Android Open Source Project <initial-contribution@android.com> | 2012-06-21 10:38:11 -0700 |
commit | 41febc2d70dc46595932f5a383bafc1dae296607 (patch) | |
tree | e2f340784edb0c58bc3bc5bb890dc40254310bdd /vm/mterp/x86-atom/OP_CONST_WIDE_32.S | |
download | dalvik-snapshot-41febc2d70dc46595932f5a383bafc1dae296607.tar.gz |
Snapshot 1c7e1e149d3dcf3949c76ae594ca9c1ca20392f9ics-mr1
Diffstat (limited to 'vm/mterp/x86-atom/OP_CONST_WIDE_32.S')
-rw-r--r-- | vm/mterp/x86-atom/OP_CONST_WIDE_32.S | 39 |
1 files changed, 39 insertions, 0 deletions
diff --git a/vm/mterp/x86-atom/OP_CONST_WIDE_32.S b/vm/mterp/x86-atom/OP_CONST_WIDE_32.S new file mode 100644 index 0000000..92f8450 --- /dev/null +++ b/vm/mterp/x86-atom/OP_CONST_WIDE_32.S @@ -0,0 +1,39 @@ + /* Copyright (C) 2008 The Android Open Source Project + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + + /* + * File: OP_CONST_WIDE_32.S + * + * Code: Move a literal to a register. Uses no substitutions. + * + * For: const-wide/32 + * + * Description: Move the given literal value (sign-extended to 64 bits) + * into the specified register-pair + * + * Format: AA|op BBBBlo BBBBhi (31i) + * + * Syntax: op vAA, #+BBBBBBBB + */ + + FETCH 1, %edx # %edx<- BBBBlo + FETCHs 2, %ecx # %ecx<- BBBBhi + shl $$16, %ecx # prepare to create #+BBBBBBBB + or %ecx, %edx # %edx<- %edx<- #+BBBBBBBB + sar $$31, %ecx # %ecx<- sign bit + FFETCH_ADV 3, %eax # %eax<- next instruction hi; fetch, advance + movl %edx, (rFP, rINST, 4) # vAA<- BBBBBBBB + movl %ecx, 4(rFP, rINST, 4) # vAA+1<- ssssssss + FGETOP_JMP 3, %eax # jump to next instruction; getop, jmp |