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author | The Android Open Source Project <initial-contribution@android.com> | 2012-04-01 00:00:00 -0700 |
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committer | The Android Open Source Project <initial-contribution@android.com> | 2012-06-21 10:38:11 -0700 |
commit | 41febc2d70dc46595932f5a383bafc1dae296607 (patch) | |
tree | e2f340784edb0c58bc3bc5bb890dc40254310bdd /vm/mterp/x86-atom/binop2addr.S | |
download | dalvik-snapshot-41febc2d70dc46595932f5a383bafc1dae296607.tar.gz |
Snapshot 1c7e1e149d3dcf3949c76ae594ca9c1ca20392f9ics-mr1
Diffstat (limited to 'vm/mterp/x86-atom/binop2addr.S')
-rw-r--r-- | vm/mterp/x86-atom/binop2addr.S | 45 |
1 files changed, 45 insertions, 0 deletions
diff --git a/vm/mterp/x86-atom/binop2addr.S b/vm/mterp/x86-atom/binop2addr.S new file mode 100644 index 0000000..b26b25a --- /dev/null +++ b/vm/mterp/x86-atom/binop2addr.S @@ -0,0 +1,45 @@ + /* Copyright (C) 2008 The Android Open Source Project + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + + /* + * File: binop2addr.S + * + * Code: Generic 32-bit "/2addr" binary operation. Provides an + * "instr" line to specify an instruction that performs + * "%ecx = %ecx op %edx". + * + * For: add-int/2addr, and-int/2addr, mul-int/2addr, or-int/2addr, + * sub-int/2addr, xor-int/2addr + * + * Description: Perform a binary operation on two sources registers + * and store the result in the first source register + * + * Format: B|A|op (12x) + * + * Syntax: op vA, vB + */ + + movl rINST, %edx # %edx<- BA + shr $$4, %edx # %edx<- B + andl $$15, rINST # rINST<- A + movl rINST, %ecx # %ecx<- A + FFETCH_ADV 1, %eax # %eax<- next instruction hi; fetch, advance + GET_VREG %edx # %edx<- vB + GET_VREG %ecx # %ecx<- vA + $instr # %ecx<- vA op vB + SET_VREG %ecx, rINST # vAA<- %ecx; result + FGETOP_JMP 1, %eax # jump to next instruction; getop, jmp + + |