Upgrade OpenCSD to v0.12.0 am: f5e655cc27 am: c22e748736

am: 4468ec60c6

Change-Id: Ie7785c1f08c8fc9b0102ddef5da0f10367c845c0

26 files changed, 936 insertions, 122 deletions

diff --git a/METADATA b/METADATA
index f928557..34a61a7 100644
--- a/METADATA
+++ b/METADATA
@@ -9,10 +9,10 @@ third_party {
     type: GIT
     value: "https://github.com/Linaro/OpenCSD.git"
   }
-  version: "v0.11.2"
+  version: "v0.12.0"
   last_upgrade_date {
     year: 2019
     month: 7
-    day: 24
+    day: 31
   }
 }
diff --git a/README.md b/README.md
index 588ba0b..c3f238f 100644
--- a/README.md
+++ b/README.md
@@ -27,7 +27,7 @@ Releases will appear on the master branch in the git repository with an appropri
 CoreSight Trace Component Support.
 ----------------------------------
 
-_Current Version 0.11.2_
+_Current Version 0.12.0_
 
 ### Current support:
 
@@ -156,7 +156,15 @@ Version and Modification Information
 - _Version 0.11.1_: __Update__: build:- change -fpic to -fPIC to allow Debian build on sparc.
                     __Bugfix__: build:- remove unused variable
 - _Version 0.11.2_: __Update__: docs:- HOWTO.md update to match new perf build requirements.
-                    __Bugfix__: Minor spelling typos fixed.                   
+                    __Bugfix__: Minor spelling typos fixed.
+- _Version 0.12.0_: __Update__: Frame deformatter - TPIU FSYNC and HSYNC support added.
+                    __Update__: ETM v4: Bugfix & clarification on Exception trace handling. Where exception occurs at a branch target before any instructions
+                    have been executed, the preferred return address is also the target address of the branch instruction. This case now includes as specific flag in
+                    the packet. Additionally any context change associated with this target address was being applied incorrectly.
+                    __Update__: Core / Architecture mapping to core names as used by test programs / snapshots updated to include additional recent ARM cores.
+                    __Update__: Docs: Update to reflect new exception flag. Update test program example to reflect latest output.
+                    __Bugfix__: ETM v4: Valid trace info packet was not handled correctly (0x01, 0x00).
+                    __Bugfix__: ETM v4: Error messaging on commit stack overflow.
 
 
 Licence Information
diff --git a/decoder/docs/prog_guide/prog_guide_generic_pkts.md b/decoder/docs/prog_guide/prog_guide_generic_pkts.md
index d6c57f8..9f69aac 100644
--- a/decoder/docs/prog_guide/prog_guide_generic_pkts.md
+++ b/decoder/docs/prog_guide/prog_guide_generic_pkts.md
@@ -71,6 +71,7 @@ typedef struct _ocsd_generic_trace_elem {
             uint32_t extended_data:1;       /* 1 if the packet extended data pointer is valid. Allows packet extensions for custom decoders, or additional data payloads for data trace.  */
             uint32_t has_ts:1;              /* 1 if the packet has an associated timestamp - e.g. SW/STM trace TS+Payload as a single packet */
             uint32_t last_instr_cond:1;     /* 1 if the last instruction was conditional */
+            uint32_t excep_ret_addr_br_tgt:1; /* 1 if exception return address (en_addr) is also the target of a taken branch addr from the previous range. */
         };
         uint32_t flag_bits;
     };
@@ -224,7 +225,7 @@ The packet will be sent once when unknown address occurs. Further `OCSD_GEN_TRC_
 ### OCSD_GEN_TRC_ELEM_EXCEPTION ###
 __packet fields valid__: `exception_number`
 
-__packet fields optional__: `has_cc -> cycle_count, excep_ret_addr -> en_addr, excep_data_marker`
+__packet fields optional__: `has_cc -> cycle_count, excep_ret_addr -> en_addr, excep_data_marker, excep_ret_addr_br_tgt`
 
 __protocol specific__: ETMv4, ETMv3, PTM
 
@@ -233,6 +234,8 @@ All protocols will include the exception number in the packet.
 __ETMv4__ : This protocol may provide the preferred return address for the exception - this is the address of
 the instruction that could be executed on exception return. This address appears in `en_addr` if `excep_ret_addr` = 1.
 
+Additionally, this address could also represent the target address of a branch, if the exception occured at the branch target, before any further instructions were execute. If htis is the case then the excep_ret_addr_br_tgt flag will be set. This makes explicit what was previously only implied by teh packet ordered. This information could be used for clients such as perf that branch source/target address pairs.
+
 __ETMv3__ : This can set the `excep_data_marker` flag. This indicates that the exception packet is a marker
 to indicate exception entry in a 7M profile core, for the purposes of tracking data. This will __not__ provide
 an exception number in this case.
diff --git a/decoder/docs/test_progs.md b/decoder/docs/test_progs.md
index 022c48e..2719455 100644
--- a/decoder/docs/test_progs.md
+++ b/decoder/docs/test_progs.md
@@ -54,6 +54,8 @@ __Command Line Options__
 
 - `-id <n>`          : Set an ID to list (may be used multiple times) - default if no id set is for all IDs to be printed.
 - `-src_name <name>` : List packets from a given snapshot source name (defaults to first source found).
+- `-tpiu`            : Input data is from a TPIU source that has TPIU FSYNC packets present.
+- `-tpiu_hsync`      : Input data is from a TPIU source that has both TPIU FSYNC and HSYNC packets present.
 - `-decode`          : Full decode of the packets from the trace snapshot (default is to list undecoded packets only.
 - `-decode_only`     : Does not list the undecoded packets, just the trace decode.
 - `-o_raw_packed`    : Output raw packed trace frames.
@@ -140,42 +142,49 @@ Command line:-
 `trc_pkt_lister -ss_dir ..\..\..\snapshots\juno_r1_1 -decode -id 0x10`
 
 ~~~~~~~~~~~~~~~~
-Idx:17230; ID:10; RCTDL_GEN_TRC_ELEM_TRACE_ON()
-Idx:17232; ID:10; RCTDL_GEN_TRC_ELEM_PE_CONTEXT(EL1N; AArch64; VMID=0x0; CTXTID=0x0; )
-Idx:17248; ID:10; RCTDL_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xffffffc000096a00:[0xffffffc000096a10] )
+
+Idx:17204; ID:10; [0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x80 ];	I_ASYNC : Alignment Synchronisation.
+Idx:17218; ID:10; [0x01 0x01 0x00 ];	I_TRACE_INFO : Trace Info.; INFO=0x0
+Idx:17221; ID:10; [0x9d 0x00 0x35 0x09 0x00 0xc0 0xff 0xff 0xff ];	I_ADDR_L_64IS0 : Address, Long, 64 bit, IS0.; Addr=0xFFFFFFC000096A00; 
+Idx:17230; ID:10; [0x04 ];	I_TRACE_ON : Trace On.
+Idx:17232; ID:10; [0x85 0x00 0x35 0x09 0x00 0xc0 0xff 0xff 0xff 0xf1 0x00 0x00 0x00 0x00 0x00 ];	I_ADDR_CTXT_L_64IS0 : Address & Context, Long, 64 bit, IS0.; Addr=0xFFFFFFC000096A00; Ctxt: AArch64,EL1, NS; CID=0x00000000; VMID=0x0000;
+Idx:17248; ID:10; [0xf7 ];	I_ATOM_F1 : Atom format 1.; E
+Idx:17230; ID:10; OCSD_GEN_TRC_ELEM_TRACE_ON( [begin or filter])
+Idx:17232; ID:10; OCSD_GEN_TRC_ELEM_PE_CONTEXT((ISA=A64) EL1N; 64-bit; VMID=0x0; CTXTID=0x0; )
+Idx:17248; ID:10; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xffffffc000096a00:[0xffffffc000096a10] num_i(4) last_sz(4) (ISA=A64) E ISB )
 Idx:17249; ID:10; [0x9d 0x30 0x25 0x59 0x00 0xc0 0xff 0xff 0xff ];	I_ADDR_L_64IS0 : Address, Long, 64 bit, IS0.; Addr=0xFFFFFFC000594AC0; 
 Idx:17258; ID:10; [0xf7 ];	I_ATOM_F1 : Atom format 1.; E
-Idx:17258; ID:10; RCTDL_GEN_TRC_ELEM_ADDR_NACC( 0xffffffc000594ac0 )
+Idx:17258; ID:10; OCSD_GEN_TRC_ELEM_ADDR_NACC( 0xffffffc000594ac0 )
 Idx:17259; ID:10; [0x95 0xd6 0x95 ];	I_ADDR_S_IS0 : Address, Short, IS0.; Addr=0xFFFFFFC000592B58 ~[0x12B58]
 Idx:17262; ID:10; [0xf9 ];	I_ATOM_F3 : Atom format 3.; ENN
-Idx:17262; ID:10; RCTDL_GEN_TRC_ELEM_ADDR_NACC( 0xffffffc000592b58 )
+Idx:17262; ID:10; OCSD_GEN_TRC_ELEM_ADDR_NACC( 0xffffffc000592b58 )
 Idx:17264; ID:10; [0xf7 ];	I_ATOM_F1 : Atom format 1.; E
-Idx:17265; ID:10; [0x9a 0x32 0x62 0x5a 0x00 ];	I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x005AC4C8; 
+Idx:17265; ID:10; [0x9a 0x32 0x62 0x5a 0x00 ];	I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0xFFFFFFC0005AC4C8; 
 Idx:17270; ID:10; [0xdb ];	I_ATOM_F2 : Atom format 2.; EE
-Idx:17270; ID:10; RCTDL_GEN_TRC_ELEM_ADDR_NACC( 0xffffffc0005ac4c8 )
-Idx:17271; ID:10; [0x9a 0x62 0x52 0x0e 0x00 ];	I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x000EA588; 
+Idx:17270; ID:10; OCSD_GEN_TRC_ELEM_ADDR_NACC( 0xffffffc0005ac4c8 )
+Idx:17271; ID:10; [0x9a 0x62 0x52 0x0e 0x00 ];	I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0xFFFFFFC0000EA588; 
 Idx:17276; ID:10; [0xfc ];	I_ATOM_F3 : Atom format 3.; NNE
-Idx:17276; ID:10; RCTDL_GEN_TRC_ELEM_ADDR_NACC( 0xffffffc0000ea588 )
-Idx:17277; ID:10; [0x9a 0x58 0x15 0x59 0x00 ];	I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x00592B60; 
+Idx:17276; ID:10; OCSD_GEN_TRC_ELEM_ADDR_NACC( 0xffffffc0000ea588 )
+Idx:17277; ID:10; [0x9a 0x58 0x15 0x59 0x00 ];	I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0xFFFFFFC000592B60; 
 Idx:17283; ID:10; [0x06 0x1d ];	I_EXCEPT : Exception.;  IRQ; Ret Addr Follows;
-Idx:17285; ID:10; [0x95 0x59 ];	I_ADDR_S_IS0 : Address, Short, IS0.; Addr=0x00592B64 ~[0x164]
-Idx:17283; ID:10; RCTDL_GEN_TRC_ELEM_EXCEPTION(pref ret addr:0xffffffc000592b64; excep num (0x0e)
-Idx:17287; ID:10; [0x9a 0x20 0x19 0x08 0x00 ];	I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x00083280; 
+Idx:17285; ID:10; [0x95 0x59 ];	I_ADDR_S_IS0 : Address, Short, IS0.; Addr=0xFFFFFFC000592B64 ~[0x164]
+Idx:17283; ID:10; OCSD_GEN_TRC_ELEM_ADDR_NACC( 0xffffffc000592b60 )
+Idx:17283; ID:10; OCSD_GEN_TRC_ELEM_EXCEPTION(pref ret addr:0xffffffc000592b64; excep num (0x0e) )
+Idx:17287; ID:10; [0x9a 0x20 0x19 0x08 0x00 ];	I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0xFFFFFFC000083280; 
 Idx:17292; ID:10; [0xfd ];	I_ATOM_F3 : Atom format 3.; ENE
-Idx:17292; ID:10; RCTDL_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xffffffc000083280:[0xffffffc000083284] )
-Idx:17292; ID:10; RCTDL_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xffffffc000083d40:[0xffffffc000083d9c] )
-Idx:17292; ID:10; RCTDL_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xffffffc000083d9c:[0xffffffc000083dac] )
-Idx:17293; ID:10; [0x95 0xf7 0x09 ];	I_ADDR_S_IS0 : Address, Short, IS0.; Addr=0x000813DC ~[0x13DC]
+Idx:17292; ID:10; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xffffffc000083280:[0xffffffc000083284] num_i(1) last_sz(4) (ISA=A64) E BR  )
+Idx:17292; ID:10; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xffffffc000083d40:[0xffffffc000083d9c] num_i(23) last_sz(4) (ISA=A64) N BR   <cond>)
+Idx:17292; ID:10; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xffffffc000083d9c:[0xffffffc000083dac] num_i(4) last_sz(4) (ISA=A64) E iBR b+link )
+Idx:17293; ID:10; [0x95 0xf7 0x09 ];	I_ADDR_S_IS0 : Address, Short, IS0.; Addr=0xFFFFFFC0000813DC ~[0x13DC]
 Idx:17297; ID:10; [0xdb ];	I_ATOM_F2 : Atom format 2.; EE
-Idx:17297; ID:10; RCTDL_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xffffffc0000813dc:[0xffffffc0000813f0] )
-Idx:17297; ID:10; RCTDL_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xffffffc00008f2e0:[0xffffffc00008f2e4] )
-Idx:17298; ID:10; [0x95 0x7e ];	I_ADDR_S_IS0 : Address, Short, IS0.; Addr=0x000813F8 ~[0x1F8]
+Idx:17297; ID:10; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xffffffc0000813dc:[0xffffffc0000813f0] num_i(5) last_sz(4) (ISA=A64) E BR  b+link )
+Idx:17297; ID:10; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xffffffc00008f2e0:[0xffffffc00008f2e4] num_i(1) last_sz(4) (ISA=A64) E iBR A64:ret )
+Idx:17298; ID:10; [0x95 0x7e ];	I_ADDR_S_IS0 : Address, Short, IS0.; Addr=0xFFFFFFC0000813F8 ~[0x1F8]
 Idx:17300; ID:10; [0xe0 ];	I_ATOM_F6 : Atom format 6.; EEEN
-Idx:17300; ID:10; RCTDL_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xffffffc0000813f8:[0xffffffc00008140c] )
-Idx:17300; ID:10; RCTDL_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xffffffc00008141c:[0xffffffc000081434] )
-Idx:17300; ID:10; RCTDL_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xffffffc00008140c:[0xffffffc000081414] )
-Idx:17300; ID:10; RCTDL_GEN_TRC_ELEM_ADDR_NACC( 0xffffffc000117cf0 )
-
+Idx:17300; ID:10; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xffffffc0000813f8:[0xffffffc00008140c] num_i(5) last_sz(4) (ISA=A64) E BR  )
+Idx:17300; ID:10; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xffffffc00008141c:[0xffffffc000081434] num_i(6) last_sz(4) (ISA=A64) E BR   <cond>)
+Idx:17300; ID:10; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xffffffc00008140c:[0xffffffc000081414] num_i(2) last_sz(4) (ISA=A64) E BR  b+link )
+Idx:17300; ID:10; OCSD_GEN_TRC_ELEM_ADDR_NACC( 0xffffffc000117cf0 )
 
 ~~~~~~~~~~~~~~~~
 
diff --git a/decoder/include/opencsd/etmv4/trc_etmv4_stack_elem.h b/decoder/include/opencsd/etmv4/trc_etmv4_stack_elem.h
index d5d88cb..1599654 100644
--- a/decoder/include/opencsd/etmv4/trc_etmv4_stack_elem.h
+++ b/decoder/include/opencsd/etmv4/trc_etmv4_stack_elem.h
@@ -251,6 +251,7 @@ public:
     ~EtmV4P0Stack();
 
     void push_front(TrcStackElem *pElem);
+    void push_back(TrcStackElem *pElem);        // insert element when processing
     void pop_back();
     TrcStackElem *back();
     size_t size();
@@ -261,7 +262,7 @@ public:
 
     // creation functions - create and push if successful.
     TrcStackElemParam *createParamElem(const p0_elem_t p0_type, const bool isP0, const ocsd_etmv4_i_pkt_type root_pkt, const ocsd_trc_index_t root_index, const std::vector<uint32_t> &params);
-    TrcStackElemParam *createParamElemNoParam(const p0_elem_t p0_type, const bool isP0, const ocsd_etmv4_i_pkt_type root_pkt, const ocsd_trc_index_t root_index);
+    TrcStackElem *createParamElemNoParam(const p0_elem_t p0_type, const bool isP0, const ocsd_etmv4_i_pkt_type root_pkt, const ocsd_trc_index_t root_index, bool back = false);
     TrcStackElemAtom *createAtomElem (const ocsd_etmv4_i_pkt_type root_pkt, const ocsd_trc_index_t root_index, const ocsd_pkt_atom &atom);
     TrcStackElemExcept *createExceptElem(const ocsd_etmv4_i_pkt_type root_pkt, const ocsd_trc_index_t root_index, const bool bSame, const uint16_t excepNum);
     TrcStackElemCtxt *createContextElem(const ocsd_etmv4_i_pkt_type root_pkt, const ocsd_trc_index_t root_index, const etmv4_context_t &context);
@@ -285,6 +286,12 @@ inline void EtmV4P0Stack::push_front(TrcStackElem *pElem)
     m_P0_stack.push_front(pElem);
 }
 
+// put an element on the back of the stack
+inline void EtmV4P0Stack::push_back(TrcStackElem *pElem)
+{
+    m_P0_stack.push_back(pElem);
+}
+
 // pop last element pointer off the stack and stash it for later deletion
 inline void EtmV4P0Stack::pop_back()
 {
diff --git a/decoder/include/opencsd/etmv4/trc_pkt_decode_etmv4i.h b/decoder/include/opencsd/etmv4/trc_pkt_decode_etmv4i.h
index e996878..1c06e5d 100644
--- a/decoder/include/opencsd/etmv4/trc_pkt_decode_etmv4i.h
+++ b/decoder/include/opencsd/etmv4/trc_pkt_decode_etmv4i.h
@@ -154,13 +154,17 @@ private:
         EXCEP_POP, // start of processing read exception packets off the stack and analyze
         EXCEP_RANGE, // output a range element
         EXCEP_NACC,  // output a nacc element
+        EXCEP_CTXT,  // output a ctxt element
         EXCEP_EXCEP, // output an ecxeption element.
     } excep_proc_state_t;
 
-    excep_proc_state_t m_excep_proc;  //!< state of exception processing
-    etmv4_addr_val_t m_excep_addr;    //!< excetion return address.
-    uint32_t m_excep_number;          //!< exception number.
-    ocsd_trc_index_t m_excep_index;  //!< trace index for exception element
+    struct {
+        excep_proc_state_t proc;    //!< state of exception processing
+        etmv4_addr_val_t addr;      //!< excetion return address.
+        uint32_t number;            //!< exception number.
+        ocsd_trc_index_t index;     //!< trace index for exception element
+        bool addr_b_tgt;            //!< return address is also branch tgt address.
+    } m_excep_info; //!< exception info when processing exception packets
 
     ocsd_instr_info m_instr_info;  //!< instruction info for code follower - in address is the next to be decoded.
 
diff --git a/decoder/include/opencsd/etmv4/trc_pkt_elem_etmv4i.h b/decoder/include/opencsd/etmv4/trc_pkt_elem_etmv4i.h
index d823ad3..02adfc5 100644
--- a/decoder/include/opencsd/etmv4/trc_pkt_elem_etmv4i.h
+++ b/decoder/include/opencsd/etmv4/trc_pkt_elem_etmv4i.h
@@ -224,7 +224,9 @@ inline void EtmV4ITrcPacket::clearTraceInfo()
     pkt_valid.bits.spec_depth_valid = 0;
     pkt_valid.bits.cc_thresh_valid  = 0;
 
-    pkt_valid.bits.ts_valid = 0;    // mark TS as invalid - must be re-updated after trace info.
+    // set these as defaults - if they don't appear in TINFO this is the state.
+    setTraceInfo(0);        
+    setTraceInfoSpec(0);   
 }
 
 inline void EtmV4ITrcPacket::setTraceInfo(const uint32_t infoVal)
diff --git a/decoder/include/opencsd/ocsd_if_types.h b/decoder/include/opencsd/ocsd_if_types.h
index a139ceb..7d74d77 100644
--- a/decoder/include/opencsd/ocsd_if_types.h
+++ b/decoder/include/opencsd/ocsd_if_types.h
@@ -107,6 +107,7 @@ typedef enum _ocsd_err_t {
     OCSD_ERR_DATA_DECODE_FATAL,    /**< A decoder in the data path has returned a fatal error. */
     /* frame deformatter errors */
     OCSD_ERR_DFMTR_NOTCONTTRACE,    /**< Trace input to deformatter none-continuous */
+    OCSD_ERR_DFMTR_BAD_FHSYNC,      /**< Bad frame or half frame sync in trace deformatter */
     /* packet processor errors - protocol issues etc */
     OCSD_ERR_BAD_PACKET_SEQ,        /**< Bad packet sequence */
     OCSD_ERR_INVALID_PCKT_HDR,      /**< Invalid packet header */
diff --git a/decoder/include/opencsd/ocsd_if_version.h b/decoder/include/opencsd/ocsd_if_version.h
index a9e2a72..70c8df4 100644
--- a/decoder/include/opencsd/ocsd_if_version.h
+++ b/decoder/include/opencsd/ocsd_if_version.h
@@ -43,8 +43,8 @@
 /** @name Library Versioning
 @{*/
 #define OCSD_VER_MAJOR 0x0 /**< Library Major Version */
-#define OCSD_VER_MINOR 0xB /**< Library Minor Version */
-#define OCSD_VER_PATCH 0x2 /**< Library Patch Version */
+#define OCSD_VER_MINOR 0xC /**< Library Minor Version */
+#define OCSD_VER_PATCH 0x0 /**< Library Patch Version */
 
 /** Library version number - MMMMnnpp format.
     MMMM = major version, 
@@ -53,7 +53,7 @@
 */
 #define OCSD_VER_NUM ((OCSD_VER_MAJOR << 16) | (OCSD_VER_MINOR << 8) | OCSD_VER_PATCH) 
 
-#define OCSD_VER_STRING "0.11.2"    /**< Library Version string */
+#define OCSD_VER_STRING "0.12.0"    /**< Library Version string */
 #define OCSD_LIB_NAME "OpenCSD Library"  /**< Library name string */
 #define OCSD_LIB_SHORT_NAME "OCSD"    /**< Library Short name string */
 /** @}*/
diff --git a/decoder/include/opencsd/trc_gen_elem_types.h b/decoder/include/opencsd/trc_gen_elem_types.h
index 0cf94cf..1d77b53 100644
--- a/decoder/include/opencsd/trc_gen_elem_types.h
+++ b/decoder/include/opencsd/trc_gen_elem_types.h
@@ -98,6 +98,7 @@ typedef struct _ocsd_generic_trace_elem {
             uint32_t extended_data:1;       /**< 1 if the packet extended data pointer is valid. Allows packet extensions for custom decoders, or additional data payloads for data trace.  */
             uint32_t has_ts:1;              /**< 1 if the packet has an associated timestamp - e.g. SW/STM trace TS+Payload as a single packet */
             uint32_t last_instr_cond:1;     /**< 1 if the last instruction was conditional */
+            uint32_t excep_ret_addr_br_tgt:1;   /**< 1 if exception return address (en_addr) is also the target of a taken branch addr from the previous range. */
         };
         uint32_t flag_bits;
     };
diff --git a/decoder/source/etmv4/trc_etmv4_stack_elem.cpp b/decoder/source/etmv4/trc_etmv4_stack_elem.cpp
index ace0ac9..8916c7d 100644
--- a/decoder/source/etmv4/trc_etmv4_stack_elem.cpp
+++ b/decoder/source/etmv4/trc_etmv4_stack_elem.cpp
@@ -36,11 +36,17 @@
 #include "opencsd/etmv4/trc_etmv4_stack_elem.h"
 
 /* implementation of P0 element stack in ETM v4 trace*/
-TrcStackElemParam *EtmV4P0Stack::createParamElemNoParam(const p0_elem_t p0_type, const bool isP0, const ocsd_etmv4_i_pkt_type root_pkt, const ocsd_trc_index_t root_index)
+TrcStackElem *EtmV4P0Stack::createParamElemNoParam(const p0_elem_t p0_type, const bool isP0, const ocsd_etmv4_i_pkt_type root_pkt, const ocsd_trc_index_t root_index, bool back /*= false*/)
 {
-    std::vector<uint32_t> params;
-    params.clear();
-    return createParamElem(p0_type, isP0, root_pkt, root_index, params);
+    TrcStackElem *pElem = new (std::nothrow) TrcStackElem(p0_type, isP0, root_pkt, root_index);
+    if (pElem)
+    {
+        if (back)
+            push_back(pElem);
+        else
+            push_front(pElem);
+    }
+    return pElem;
 }
 
 TrcStackElemParam *EtmV4P0Stack::createParamElem(const p0_elem_t p0_type, const bool isP0, const ocsd_etmv4_i_pkt_type root_pkt, const ocsd_trc_index_t root_index, const std::vector<uint32_t> &params)
diff --git a/decoder/source/etmv4/trc_pkt_decode_etmv4i.cpp b/decoder/source/etmv4/trc_pkt_decode_etmv4i.cpp
index e4c0db4..2eb6cbc 100644
--- a/decoder/source/etmv4/trc_pkt_decode_etmv4i.cpp
+++ b/decoder/source/etmv4/trc_pkt_decode_etmv4i.cpp
@@ -128,7 +128,7 @@ ocsd_datapath_resp_t TrcPktDecodeEtmV4I::onFlush()
     ocsd_datapath_resp_t resp = OCSD_RESP_CONT;
 
     // continue exception processing (can't go through processPacket as elements no longer on stack)
-    if(m_excep_proc != EXCEP_POP)
+    if(m_excep_info.proc != EXCEP_POP)
         resp = processException();
     // continue ongoing output operations on comitted elements.
     else if(m_curr_state == COMMIT_ELEM)
@@ -234,7 +234,7 @@ void TrcPktDecodeEtmV4I::resetDecoder()
     m_prev_overflow = false;
     m_P0_stack.delete_all();
     m_output_elem.init();
-    m_excep_proc = EXCEP_POP;
+    m_excep_info.proc = EXCEP_POP;
     m_flush_EOT = false;
 }
 
@@ -507,6 +507,7 @@ ocsd_datapath_resp_t TrcPktDecodeEtmV4I::commitElements(bool &Complete)
     bool bPause = false;    // pause commit operation 
     bool bPopElem = true;       // do we remove the element from the stack (multi atom elements may need to stay!)
     int num_commit_req = m_P0_commit;
+    ocsd_trc_index_t err_idx = 0;
 
     Complete = true; // assume we exit due to completion of commit operation
 
@@ -517,8 +518,9 @@ ocsd_datapath_resp_t TrcPktDecodeEtmV4I::commitElements(bool &Complete)
         if(m_P0_stack.size() > 0)
         {
             pElem = m_P0_stack.back();  // get oldest element
-            
-            switch(pElem->getP0Type())
+            err_idx = pElem->getRootIndex(); // save index in case of error.
+
+            switch (pElem->getP0Type())
             {
             // indicates a trace restart - beginning of trace or discontinuiuty
             case P0_TRC_ON:
@@ -629,7 +631,7 @@ ocsd_datapath_resp_t TrcPktDecodeEtmV4I::commitElements(bool &Complete)
                 if ((resp = returnStackPop()) != OCSD_RESP_CONT)
                     break;
 
-                m_excep_proc = EXCEP_POP;   // set state in case we need to stop part way through
+                m_excep_info.proc = EXCEP_POP;   // set state in case we need to stop part way through
                 resp = processException();  // output trace + exception elements.
                 m_P0_commit--;
                 break;
@@ -661,10 +663,6 @@ ocsd_datapath_resp_t TrcPktDecodeEtmV4I::commitElements(bool &Complete)
         else
         {
             // too few elements for commit operation - decode error.
-            ocsd_trc_index_t err_idx = 0;
-            if(pElem)
-                err_idx = pElem->getRootIndex();
-              
             resp = OCSD_RESP_FATAL_INVALID_DATA;
             LogError(ocsdError(OCSD_ERR_SEV_ERROR,OCSD_ERR_COMMIT_PKT_OVERRUN,err_idx,m_CSID,"Not enough elements to commit"));
             bPause = true;
@@ -902,11 +900,13 @@ ocsd_datapath_resp_t TrcPktDecodeEtmV4I::processAtom(const ocsd_atm_val atom, bo
 ocsd_datapath_resp_t  TrcPktDecodeEtmV4I::processException()
 {
     ocsd_datapath_resp_t resp = OCSD_RESP_CONT; 
-    bool excep_implied_P0 = false;          //!< exception implies P0
+    TrcStackElemExcept *pExceptElem;
 
-    if(m_excep_proc == EXCEP_POP)
+    m_excep_info.addr_b_tgt = false;
+    
+    if(m_excep_info.proc == EXCEP_POP)
     {
-        TrcStackElemExcept *pExceptElem = dynamic_cast<TrcStackElemExcept *>(m_P0_stack.back());  // get the exception element
+        pExceptElem = dynamic_cast<TrcStackElemExcept *>(m_P0_stack.back());  // get the exception element
         TrcStackElemAddr *pAddressElem = 0;
         TrcStackElemCtxt *pCtxtElem = 0;
         TrcStackElem *pElem = 0;
@@ -931,32 +931,52 @@ ocsd_datapath_resp_t  TrcPktDecodeEtmV4I::processException()
             // extract address
             pAddressElem = static_cast<TrcStackElemAddr *>(pElem);
 
-            m_excep_addr = pAddressElem->getAddr();                
-
-            // if we have context, get that.
-            if(pCtxtElem)
-                 updateContext(pCtxtElem);
-
-            // record the exception number
-           m_excep_number = pExceptElem->getExcepNum();
+            // fill in exception info for use later
+            m_excep_info.addr = pAddressElem->getAddr();                
+            m_excep_info.number = pExceptElem->getExcepNum();
+            m_excep_info.index = pExceptElem->getRootIndex();
+            m_excep_info.addr_b_tgt = pExceptElem->getPrevSame();
 
-            // see if there is an implied P0 element on the exception.
-            excep_implied_P0 = pExceptElem->getPrevSame();
-
-            // save the trace index.
-            m_excep_index = pExceptElem->getRootIndex();
+            // see if there is an address + optional context element implied 
+            // prior to the exception.
+            if (m_excep_info.addr_b_tgt)
+            {
+                // this was a branch target address - update current setting
+                bool b64bit = m_instr_info.isa == ocsd_isa_aarch64;
+                if (pCtxtElem) {
+                    b64bit = pCtxtElem->getContext().SF;
+                }
+                m_instr_info.instr_addr = m_excep_info.addr.val;
+                m_instr_info.isa = (m_excep_info.addr.isa == 0) ? 
+                    (b64bit ? ocsd_isa_aarch64 : ocsd_isa_arm) : ocsd_isa_thumb2;
+                m_need_addr = false;
+            }
 
             // figure out next move
-            if(m_excep_addr.val == m_instr_info.instr_addr)
-                m_excep_proc = EXCEP_EXCEP;
+            if (pCtxtElem) {
+                m_excep_info.proc = EXCEP_CTXT;
+                updateContext(pCtxtElem);
+            }
+            else if(m_excep_info.addr.val == m_instr_info.instr_addr)
+                m_excep_info.proc = EXCEP_EXCEP;
             else
-                m_excep_proc = EXCEP_RANGE;
+                m_excep_info.proc = EXCEP_RANGE;
         }
         m_P0_stack.delete_popped();
     }
 
+    // output a context element
+    if (m_excep_info.proc == EXCEP_CTXT)
+    {
+        m_output_elem.setType(OCSD_GEN_TRC_ELEM_PE_CONTEXT);
+        resp = outputTraceElementIdx(m_excep_info.index, m_output_elem);
+        m_excep_info.proc = EXCEP_EXCEP;
+        if (!OCSD_DATA_RESP_IS_CONT(resp))
+            return resp;
+    }
+
     // output a range element
-    if(m_excep_proc == EXCEP_RANGE) 
+    if(m_excep_info.proc == EXCEP_RANGE) 
     {
         bool bWPFound = false;
         ocsd_err_t err;
@@ -964,8 +984,8 @@ ocsd_datapath_resp_t  TrcPktDecodeEtmV4I::processException()
         // last instr_info address is the start address
         m_output_elem.st_addr = m_instr_info.instr_addr;
 
-        // look for either a WP or match to return address.
-        err = traceInstrToWP(bWPFound,!excep_implied_P0,m_excep_addr.val);
+        // look for match to return address.
+        err = traceInstrToWP(bWPFound,true,m_excep_info.addr.val);
 
         if(err != OCSD_OK)
         {
@@ -973,34 +993,21 @@ ocsd_datapath_resp_t  TrcPktDecodeEtmV4I::processException()
             {
                 m_need_addr = true;
                 m_need_ctxt = true;
-                LogError(ocsdError(OCSD_ERR_SEV_WARN,err,m_excep_index,m_CSID,"Warning: unsupported instruction set processing exception packet."));  
+                LogError(ocsdError(OCSD_ERR_SEV_WARN,err,m_excep_info.index,m_CSID,"Warning: unsupported instruction set processing exception packet."));  
             }
             else
             {
                 resp = OCSD_RESP_FATAL_INVALID_DATA;
-                LogError(ocsdError(OCSD_ERR_SEV_ERROR,err,m_excep_index,m_CSID,"Error processing exception packet."));  
-                m_excep_proc = EXCEP_POP;  // nothing more to do, reset to start of exception handling
+                LogError(ocsdError(OCSD_ERR_SEV_ERROR,err,m_excep_info.index,m_CSID,"Error processing exception packet."));  
+                m_excep_info.proc = EXCEP_POP;  // nothing more to do, reset to start of exception handling
             }
         }
 
         if(bWPFound)
         {
-            // action according to waypoint type and atom value
-            if(excep_implied_P0)
-            {
-                switch(m_instr_info.type)
-                {
-                case OCSD_INSTR_BR:
-                m_instr_info.instr_addr = m_instr_info.branch_addr;
-                break;
-
-                case OCSD_INSTR_BR_INDIRECT:
-                m_instr_info.instr_addr = m_excep_addr.val;
-                break;
-                }
-            }
-            resp = outputTraceRange(true, m_excep_index);
-            m_excep_proc = EXCEP_EXCEP;
+            // waypoint address found - output range
+            resp = outputTraceRange(true, m_excep_info.index);
+            m_excep_info.proc = EXCEP_EXCEP;
         }
         else
         {
@@ -1010,32 +1017,33 @@ ocsd_datapath_resp_t  TrcPktDecodeEtmV4I::processException()
             if(m_output_elem.st_addr != m_output_elem.en_addr)
             {
                 // some trace before we were out of memory access range
-                resp = outputTraceRange(true, m_excep_index);
+                resp = outputTraceRange(true, m_excep_info.index);
             }
 
-            m_excep_proc = m_mem_nacc_pending ? EXCEP_NACC : EXCEP_EXCEP;
+            m_excep_info.proc = m_mem_nacc_pending ? EXCEP_NACC : EXCEP_EXCEP;
         }
     }  
     
-    if((m_excep_proc == EXCEP_NACC) && OCSD_DATA_RESP_IS_CONT(resp))
+    if((m_excep_info.proc == EXCEP_NACC) && OCSD_DATA_RESP_IS_CONT(resp))
     {
         m_output_elem.setType(OCSD_GEN_TRC_ELEM_ADDR_NACC);
         m_output_elem.st_addr = m_nacc_addr;
-        resp = outputTraceElementIdx(m_excep_index,m_output_elem);
-        m_excep_proc = EXCEP_EXCEP;
+        resp = outputTraceElementIdx(m_excep_info.index,m_output_elem);
+        m_excep_info.proc = EXCEP_EXCEP;
         m_mem_nacc_pending = false;
     }
     
-    if((m_excep_proc == EXCEP_EXCEP) && OCSD_DATA_RESP_IS_CONT(resp))
+    if((m_excep_info.proc == EXCEP_EXCEP) && OCSD_DATA_RESP_IS_CONT(resp))
     {
         // output element.
         m_output_elem.setType(OCSD_GEN_TRC_ELEM_EXCEPTION);
         // add end address as preferred return address to end addr in element
-        m_output_elem.en_addr = m_excep_addr.val;
+        m_output_elem.en_addr = m_excep_info.addr.val;
         m_output_elem.excep_ret_addr = 1;
-        m_output_elem.exception_number = m_excep_number;
-        resp = outputTraceElementIdx(m_excep_index,m_output_elem);  
-        m_excep_proc = EXCEP_POP;
+        m_output_elem.excep_ret_addr_br_tgt = m_excep_info.addr_b_tgt;
+        m_output_elem.exception_number = m_excep_info.number;
+        resp = outputTraceElementIdx(m_excep_info.index,m_output_elem);  
+        m_excep_info.proc = EXCEP_POP;
     }   
     return resp;
 }
diff --git a/decoder/source/ocsd_error.cpp b/decoder/source/ocsd_error.cpp
index 9450d06..251964b 100644
--- a/decoder/source/ocsd_error.cpp
+++ b/decoder/source/ocsd_error.cpp
@@ -61,6 +61,7 @@ static const char *s_errorCodeDescs[][2] = {
     {"OCSD_ERR_DATA_DECODE_FATAL", "A decoder in the data path has returned a fatal error."},
     /* frame deformatter errors */
     {"OCSD_ERR_DFMTR_NOTCONTTRACE", "Trace input to deformatter none-continuous"},
+    {"OCSD_ERR_DFMTR_BAD_FHSYNC", "Bad frame or half frame sync in trace deformatter"},
     /* packet processor errors - protocol issues etc */
     {"OCSD_ERR_BAD_PACKET_SEQ","Bad packet sequence"},
     {"OCSD_ERR_INVALID_PCKT_HDR","Invalid packet header"},
diff --git a/decoder/source/trc_core_arch_map.cpp b/decoder/source/trc_core_arch_map.cpp
index 6651311..70a25ee 100644
--- a/decoder/source/trc_core_arch_map.cpp
+++ b/decoder/source/trc_core_arch_map.cpp
@@ -39,9 +39,17 @@ static struct _ap_map_elements {
     ocsd_arch_profile_t ap;
 } ap_map_array[] = 
 {
+    { "Cortex-A77", { ARCH_V8r3, profile_CortexA } },
+    { "Cortex-A76", { ARCH_V8r3, profile_CortexA } },
+    { "Cortex-A75", { ARCH_V8r3, profile_CortexA } },
+    { "Cortex-A73", { ARCH_V8, profile_CortexA } },
     { "Cortex-A72", { ARCH_V8, profile_CortexA } },
+    { "Cortex-A65", { ARCH_V8r3, profile_CortexA } },
     { "Cortex-A57", { ARCH_V8, profile_CortexA } },
+    { "Cortex-A55", { ARCH_V8r3, profile_CortexA } },
     { "Cortex-A53", { ARCH_V8, profile_CortexA } },
+    { "Cortex-A35", { ARCH_V8, profile_CortexA } },
+    { "Cortex-A32", { ARCH_V8, profile_CortexA } },
     { "Cortex-A17", { ARCH_V7, profile_CortexA } },
     { "Cortex-A15", { ARCH_V7, profile_CortexA } },
     { "Cortex-A12", { ARCH_V7, profile_CortexA } },
@@ -49,9 +57,13 @@ static struct _ap_map_elements {
     { "Cortex-A8", { ARCH_V7, profile_CortexA } },
     { "Cortex-A7", { ARCH_V7, profile_CortexA } },
     { "Cortex-A5", { ARCH_V7, profile_CortexA } },
+    { "Cortex-R52", { ARCH_V8, profile_CortexR } },
+    { "Cortex-R8", { ARCH_V7, profile_CortexR } },
     { "Cortex-R7", { ARCH_V7, profile_CortexR } },
     { "Cortex-R5", { ARCH_V7, profile_CortexR } },
     { "Cortex-R4", { ARCH_V7, profile_CortexR } },
+    { "Cortex-M33", { ARCH_V8, profile_CortexM } },
+    { "Cortex-M23", { ARCH_V8, profile_CortexM } },
     { "Cortex-M0", { ARCH_V7, profile_CortexM } },
     { "Cortex-M0+", { ARCH_V7, profile_CortexM } },
     { "Cortex-M3", { ARCH_V7, profile_CortexM } },
diff --git a/decoder/source/trc_frame_deformatter.cpp b/decoder/source/trc_frame_deformatter.cpp
index b4f40a2..4d46854 100644
--- a/decoder/source/trc_frame_deformatter.cpp
+++ b/decoder/source/trc_frame_deformatter.cpp
@@ -393,9 +393,21 @@ bool TraceFmtDcdImpl::checkForSync()
 
 uint32_t TraceFmtDcdImpl::findfirstFSync()
 {
-    uint32_t unsynced = m_in_block_size;  // consider entire block as unsynced at present.
-    //**TBD - handle fsync patterns in TPIU captured code
-    return unsynced;
+    uint32_t processed = 0;
+    const uint32_t FSYNC_PATTERN = 0x7FFFFFFF;    // LE host pattern for FSYNC	 
+    const uint8_t *dataPtr = m_in_block_base;
+
+    while (processed < (m_in_block_size - 3))
+    {
+        if (*((uint32_t *)(dataPtr)) == FSYNC_PATTERN)
+        {
+            m_frame_synced = true;
+            break;
+        }
+        processed++;
+        dataPtr++;
+    }
+    return processed;
 }
 
 void TraceFmtDcdImpl::outputUnsyncedBytes(uint32_t /*num_bytes*/)
@@ -453,7 +465,7 @@ bool TraceFmtDcdImpl::extractFrame()
 	bool cont_process = true;   // continue processing after extraction.
     uint32_t f_sync_bytes = 0; // skipped f sync bytes
     uint32_t h_sync_bytes = 0; // skipped h sync bytes
-    uint32_t ex_bytes = 0;  // extracted bytes
+    uint32_t ex_bytes = 0;  // extracted this pass (may be filling out part frame)
 
     // memory aligned sources are always multiples of frames, aligned to start.
     if( m_cfgFlags & OCSD_DFRMTR_FRAME_MEM_ALIGN)
@@ -512,8 +524,6 @@ bool TraceFmtDcdImpl::extractFrame()
                 f_sync_bytes += 4;
                 dataPtr += 4;
                 cont_process = (bool)(dataPtr < eodPtr);
-
-                // TBD:  output raw FSYNC data on raw frame channel.
             }
         }
 
@@ -526,6 +536,7 @@ bool TraceFmtDcdImpl::extractFrame()
                 if(*((uint32_t *)(dataPtr)) == FSYNC_PATTERN) 
                 {
                     // throw an illegal FSYNC error
+                    throw ocsdError(OCSD_ERR_SEV_ERROR, OCSD_ERR_DFMTR_BAD_FHSYNC, m_trc_curr_idx, "Bad FSYNC in frame.");
                 }
             }
 
@@ -546,12 +557,11 @@ bool TraceFmtDcdImpl::extractFrame()
                     m_ex_frm_n_bytes-=2;
                     ex_bytes -= 2;
                     h_sync_bytes+=2;
-
-                    // TBD:  output raw HSYNC data on raw frame channel.
                 }
                 else
                 {
                     // throw illegal HSYNC error.
+                    throw ocsdError(OCSD_ERR_SEV_ERROR, OCSD_ERR_DFMTR_BAD_FHSYNC, m_trc_curr_idx, "Bad HSYNC in frame.");
                 }
             }
 
@@ -565,22 +575,25 @@ bool TraceFmtDcdImpl::extractFrame()
             cont_process = true;
     }
 
+    // total bytes processed this pass 
+    uint32_t total_processed = ex_bytes + f_sync_bytes + h_sync_bytes;
+
     // output raw data on raw frame channel - packed raw. 
-    if ((m_ex_frm_n_bytes == OCSD_DFRMTR_FRAME_SIZE) && m_b_output_packed_raw)
+    if (((m_ex_frm_n_bytes == OCSD_DFRMTR_FRAME_SIZE) || !cont_process) && m_b_output_packed_raw)
     {
         outputRawMonBytes(  OCSD_OP_DATA, 
                             m_trc_curr_idx, 
                             OCSD_FRM_PACKED,
-                            ex_bytes + f_sync_bytes + h_sync_bytes,
+                            total_processed,
                             m_in_block_base+m_in_block_processed,
                             0);
     }
 
     // update the processed count for the buffer
-    m_in_block_processed += m_ex_frm_n_bytes + f_sync_bytes + h_sync_bytes;
+    m_in_block_processed += total_processed;
 
     // update index past the processed data   
-    m_trc_curr_idx += m_ex_frm_n_bytes + f_sync_bytes + h_sync_bytes;
+    m_trc_curr_idx += total_processed;
 
     return cont_process;
 }
@@ -817,7 +830,7 @@ ocsd_err_t TraceFormatterFrameDecoder::Configure(uint32_t cfg_flags)
             m_pDecoder = new (std::nothrow) TraceFmtDcdImpl();
         if(!m_pDecoder) return OCSD_ERR_MEM;
     }
-    m_pDecoder->m_cfgFlags = cfg_flags;
+    m_pDecoder->DecodeConfigure(cfg_flags);
     return OCSD_OK;
 }
 
diff --git a/decoder/source/trc_gen_elem.cpp b/decoder/source/trc_gen_elem.cpp
index 063e94a..b3ec75f 100644
--- a/decoder/source/trc_gen_elem.cpp
+++ b/decoder/source/trc_gen_elem.cpp
@@ -123,9 +123,14 @@ void OcsdTraceElement::toString(std::string &str) const
             break;
 
         case OCSD_GEN_TRC_ELEM_EXCEPTION:
-            if(excep_ret_addr == 1)
+            if (excep_ret_addr == 1)
             {
-                oss << "pref ret addr:0x" << std::hex << en_addr << "; ";
+                oss << "pref ret addr:0x" << std::hex << en_addr; 
+                if (excep_ret_addr_br_tgt)
+                {
+                    oss << " [addr also prev br tgt]";
+                }
+                oss << "; ";
             }
             oss << "excep num (0x" << std::setfill('0') << std::setw(2) << std::hex << exception_number << ") ";
             break;
diff --git a/decoder/tests/run_pkt_decode_tests.bash b/decoder/tests/run_pkt_decode_tests.bash
index 210a149..56b1cbf 100755
--- a/decoder/tests/run_pkt_decode_tests.bash
+++ b/decoder/tests/run_pkt_decode_tests.bash
@@ -71,3 +71,8 @@ do
     ${BIN_DIR}/trc_pkt_lister -ss_dir "${SNAPSHOT_DIR}/$test_dir" -decode -logfilename "${OUT_DIR}/$test_dir.ppl"
     echo "Done : Return $?"
 done
+
+# === test the TPIU deformatter ===
+echo "Testing a55-test-tpiu..."
+${BIN_DIR}/trc_pkt_lister -ss_dir "${SNAPSHOT_DIR}/a55-test-tpiu" -dstream_format -o_raw_packed -o_raw_unpacked -logfilename "${OUT_DIR}/a55-test-tpiu.ppl"
+echo "Done : Return $?"
diff --git a/decoder/tests/snapshot_parser_lib/source/ss_to_dcdtree.cpp b/decoder/tests/snapshot_parser_lib/source/ss_to_dcdtree.cpp
index 0022436..4eeec73 100644
--- a/decoder/tests/snapshot_parser_lib/source/ss_to_dcdtree.cpp
+++ b/decoder/tests/snapshot_parser_lib/source/ss_to_dcdtree.cpp
@@ -79,15 +79,19 @@ bool CreateDcdTreeFromSnapShot::createDecodeTree(const std::string &SourceName,
         if(m_pReader->getTraceBufferSourceTree(SourceName, tree))
         {
             int numDecodersCreated = 0; // count how many we create - if none then give up.
+            uint32_t formatter_flags = OCSD_DFRMTR_FRAME_MEM_ALIGN;
 
             /* make a note of the trace binary file name + path to ss directory */            
             m_BufferFileName = m_pReader->getSnapShotDir() + tree.buffer_info.dataFileName;
 
             ocsd_dcd_tree_src_t src_format = tree.buffer_info.dataFormat == "source_data" ? OCSD_TRC_SRC_SINGLE : OCSD_TRC_SRC_FRAME_FORMATTED;
 
+            if (tree.buffer_info.dataFormat == "dstream_coresight")
+                formatter_flags = OCSD_DFRMTR_HAS_FSYNCS;
+
             /* create the initial device tree */
             // TBD:     handle syncs / hsyncs data from TPIU
-            m_pDecodeTree = DecodeTree::CreateDecodeTree(src_format,OCSD_DFRMTR_FRAME_MEM_ALIGN); 
+            m_pDecodeTree = DecodeTree::CreateDecodeTree(src_format, formatter_flags);
             if(m_pDecodeTree == 0)
             {
                 LogError("Failed to create decode tree object\n");
diff --git a/decoder/tests/snapshots/a55-test-tpiu/DSTREAM_0.bin b/decoder/tests/snapshots/a55-test-tpiu/DSTREAM_0.bin
new file mode 100644
index 0000000..33c4b1a
--- /dev/null
+++ b/decoder/tests/snapshots/a55-test-tpiu/DSTREAM_0.bin
diff --git a/decoder/tests/snapshots/a55-test-tpiu/README.txt b/decoder/tests/snapshots/a55-test-tpiu/README.txt
new file mode 100644
index 0000000..fe190e6
--- /dev/null
+++ b/decoder/tests/snapshots/a55-test-tpiu/README.txt
@@ -0,0 +1 @@
+DS-5 Debugger has generated this trace dump data set. The intention is that in a future release the DS-5 Debugger will be able to directly consume this data set. Until then, this data set must be converted into a Snapshot viewer compatible format before it can be used by DS-5 Debugger.
\ No newline at end of file
diff --git a/decoder/tests/snapshots/a55-test-tpiu/contents.ini b/decoder/tests/snapshots/a55-test-tpiu/contents.ini
new file mode 100644
index 0000000..900f772
--- /dev/null
+++ b/decoder/tests/snapshots/a55-test-tpiu/contents.ini
@@ -0,0 +1,6 @@
+; CoreSight trace dump
+
+[trace]
+metadata=trace.ini
+buffer0=DSTREAM_0.bin
+
diff --git a/decoder/tests/snapshots/a55-test-tpiu/device1.ini b/decoder/tests/snapshots/a55-test-tpiu/device1.ini
new file mode 100644
index 0000000..2381b31
--- /dev/null
+++ b/decoder/tests/snapshots/a55-test-tpiu/device1.ini
@@ -0,0 +1,451 @@
+[device]
+name=Cortex-A55_0
+class=core
+type=Cortex-A55
+
+[regs]
+X0(size:64)=0x00000000002971C8
+X1(size:64)=0x00000000910163E0
+X2(size:64)=0x00000000FFD0C1C4
+X3(size:64)=0x0000000000345000
+X4(size:64)=0x0000000000000004
+X5(size:64)=0x00000000FC01EB50
+X6(size:64)=0x00000000FC01EB4C
+X7(size:64)=0x0000000000000000
+X8(size:64)=0x00000000FC01E9C8
+X9(size:64)=0xFFFFFFFFFFFFFFFF
+X10(size:64)=0x0000000000000006
+X11(size:64)=0x0000000000000000
+X12(size:64)=0x00000000407FE0FA
+X13(size:64)=0x0000000000000000
+X14(size:64)=0x0000000000000000
+X15(size:64)=0x0000000000000000
+X16(size:64)=0x0000000000000000
+X17(size:64)=0x0000000000000000
+X18(size:64)=0x0000000000000000
+X19(size:64)=0x00000000C2800290
+X20(size:64)=0x0000000000000000
+X21(size:64)=0x0000000000000000
+X22(size:64)=0x0000000000000000
+X23(size:64)=0x0000000000000000
+X24(size:64)=0x0000000000000000
+X25(size:64)=0x0000000000000000
+X26(size:64)=0x0000000000000000
+X27(size:64)=0x0000000000000000
+X28(size:64)=0x0000000000000000
+X29(size:64)=0x0000000000000000
+LR(size:64)=0x00000000FFFEAF48
+PC(size:64)=0x00000000FFFEB44C
+SP(size:64)=0x00000000FC01EBA0
+W0=0x002971C8
+W1=0x910163E0
+W2=0xFFD0C1C4
+W3=0x00345000
+W4=0x00000004
+W5=0xFC01EB50
+W6=0xFC01EB4C
+W7=0x00000000
+W8=0xFC01E9C8
+W9=0xFFFFFFFF
+W10=0x00000006
+W11=0x00000000
+W12=0x407FE0FA
+W13=0x00000000
+W14=0x00000000
+W15=0x00000000
+W16=0x00000000
+W17=0x00000000
+W18=0x00000000
+W19=0xC2800290
+W20=0x00000000
+W21=0x00000000
+W22=0x00000000
+W23=0x00000000
+W24=0x00000000
+W25=0x00000000
+W26=0x00000000
+W27=0x00000000
+W28=0x00000000
+W29=0x00000000
+W30=0xFFFEAF48
+B0=0x00000000
+B1=0x00000000
+B2=0x00000000
+B3=0x00000000
+B4=0x00000000
+B5=0x00000000
+B6=0x00000000
+B7=0x00000000
+B8=0x00000000
+B9=0x00000000
+B10=0x00000000
+B11=0x00000000
+B12=0x00000000
+B13=0x00000000
+B14=0x00000000
+B15=0x00000000
+B16=0x00000000
+B17=0x00000000
+B18=0x00000000
+B19=0x00000000
+B20=0x00000000
+B21=0x00000000
+B22=0x00000000
+B23=0x00000000
+B24=0x00000000
+B25=0x00000000
+B26=0x00000000
+B27=0x00000000
+B28=0x00000000
+B29=0x00000000
+B30=0x00000000
+B31=0x00000000
+D0(size:64)=0x0000000000000000
+D1(size:64)=0x0000000000000000
+D2(size:64)=0x0000000000000000
+D3(size:64)=0x0000000000000000
+D4(size:64)=0x0000000000000000
+D5(size:64)=0x0000000000000000
+D6(size:64)=0x0000000000000000
+D7(size:64)=0x0000000000000000
+D8(size:64)=0x0000000000000000
+D9(size:64)=0x0000000000000000
+D10(size:64)=0x0000000000000000
+D11(size:64)=0x0000000000000000
+D12(size:64)=0x0000000000000000
+D13(size:64)=0x0000000000000000
+D14(size:64)=0x0000000000000000
+D15(size:64)=0x0000000000000000
+D16(size:64)=0x0000000000000000
+D17(size:64)=0x0000000000000000
+D18(size:64)=0x0000000000000000
+D19(size:64)=0x0000000000000000
+D20(size:64)=0x0000000000000000
+D21(size:64)=0x0000000000000000
+D22(size:64)=0x0000000000000000
+D23(size:64)=0x0000000000000000
+D24(size:64)=0x0000000000000000
+D25(size:64)=0x0000000000000000
+D26(size:64)=0x0000000000000000
+D27(size:64)=0x0000000000000000
+D28(size:64)=0x0000000000000000
+D29(size:64)=0x0000000000000000
+D30(size:64)=0x0000000000000000
+D31(size:64)=0x0000000000000000
+H0=0x00000000
+H1=0x00000000
+H2=0x00000000
+H3=0x00000000
+H4=0x00000000
+H5=0x00000000
+H6=0x00000000
+H7=0x00000000
+H8=0x00000000
+H9=0x00000000
+H10=0x00000000
+H11=0x00000000
+H12=0x00000000
+H13=0x00000000
+H14=0x00000000
+H15=0x00000000
+H16=0x00000000
+H17=0x00000000
+H18=0x00000000
+H19=0x00000000
+H20=0x00000000
+H21=0x00000000
+H22=0x00000000
+H23=0x00000000
+H24=0x00000000
+H25=0x00000000
+H26=0x00000000
+H27=0x00000000
+H28=0x00000000
+H29=0x00000000
+H30=0x00000000
+H31=0x00000000
+S0=0x00000000
+S1=0x00000000
+S2=0x00000000
+S3=0x00000000
+S4=0x00000000
+S5=0x00000000
+S6=0x00000000
+S7=0x00000000
+S8=0x00000000
+S9=0x00000000
+S10=0x00000000
+S11=0x00000000
+S12=0x00000000
+S13=0x00000000
+S14=0x00000000
+S15=0x00000000
+S16=0x00000000
+S17=0x00000000
+S18=0x00000000
+S19=0x00000000
+S20=0x00000000
+S21=0x00000000
+S22=0x00000000
+S23=0x00000000
+S24=0x00000000
+S25=0x00000000
+S26=0x00000000
+S27=0x00000000
+S28=0x00000000
+S29=0x00000000
+S30=0x00000000
+S31=0x00000000
+PAR_EL1(size:64)=0x0000000000000800
+DBGAUTHSTATUS_EL1=0x000000FF
+DBGBCR0_EL1=0x000001E0
+DBGBCR1_EL1=0x000001E0
+DBGBCR2_EL1=0x000001E0
+DBGBCR3_EL1=0x000001E0
+DBGBCR4_EL1=0x000001E0
+DBGBCR5_EL1=0x000001E0
+DBGBVR0_EL1(size:64)=0x0000000000000000
+DBGBVR1_EL1(size:64)=0x0000000000000000
+DBGBVR2_EL1(size:64)=0x0000000000000000
+DBGBVR3_EL1(size:64)=0x0000000000000000
+DBGBVR4_EL1(size:64)=0x0000000000000000
+DBGBVR5_EL1(size:64)=0x0000000000000000
+DBGCLAIMCLR_EL1=0x00000000
+DBGCLAIMSET_EL1=0x000000FF
+DBGPRCR_EL1=0x00000001
+DBGWCR0_EL1=0x00000000
+DBGWCR1_EL1=0x00000000
+DBGWCR2_EL1=0x00000000
+DBGWCR3_EL1=0x00000000
+DBGWVR0_EL1(size:64)=0x0000000000000000
+DBGWVR1_EL1(size:64)=0x0000000000000000
+DBGWVR2_EL1(size:64)=0x0000000000000000
+DBGWVR3_EL1(size:64)=0x0000000000000000
+MDCCINT_EL1=0x00000000
+MDCCSR_EL0=0x00000000
+MDCR_EL2=0x00000006
+MDCR_EL3=0x00000000
+MDRAR_EL1(size:64)=0x0000000410000003
+MDSCR_EL1=0x00004000
+OSDLR_EL1=0x00000000
+OSDTRRX_EL1=0x00000000
+OSDTRTX_EL1=0x00000000
+OSECCR_EL1=0x00000000
+OSLSR_EL1=0x00000008
+AFSR0_EL1=0x00000000
+AFSR0_EL2=0x00000000
+AFSR0_EL3=0x00000000
+AFSR1_EL1=0x00000000
+AFSR1_EL2=0x00000000
+AFSR1_EL3=0x00000000
+ESR_EL1=0x00000000
+ESR_EL2=0x00000000
+ESR_EL3=0x00000000
+FAR_EL1(size:64)=0x0000000000000000
+FAR_EL2(size:64)=0x0000000000000000
+FAR_EL3(size:64)=0x0000000000000000
+HPFAR_EL2(size:64)=0x0000000000000000
+ISR_EL1=0x00000000
+VBAR_EL1(size:64)=0x0000000000000000
+VBAR_EL2(size:64)=0x00000000C0007000
+VBAR_EL3(size:64)=0x0000000000000000
+FPCR=0x00000000
+FPSR=0x00000000
+MVFR0_EL1=0x00000000
+MVFR1_EL1=0x00000000
+MVFR2_EL1=0x00000000
+ICC_AP0R0_EL1=0x00000000
+ICC_AP1R0_EL1=0x00000000
+S_ICC_AP1R0_EL1=0x00000000
+N_ICC_AP1R0_EL1=0x00000000
+ICC_BPR0_EL1=0x00000002
+ICC_BPR1_EL1=0x00000003
+S_ICC_BPR1_EL1=0x00000002
+N_ICC_BPR1_EL1=0x00000003
+ICC_CTLR_EL1=0x00004400
+S_ICC_CTLR_EL1=0x00004400
+N_ICC_CTLR_EL1=0x00004400
+ICC_CTLR_EL3=0x00004400
+ICC_HPPIR0_EL1=0x000003FF
+ICC_HPPIR1_EL1=0x000003FF
+ICC_IAR0_EL1=0x000003FF
+ICC_IAR1_EL1=0x000003FF
+ICC_IGRPEN0_EL1=0x00000000
+ICC_IGRPEN1_EL1=0x00000000
+S_ICC_IGRPEN1_EL1=0x00000000
+N_ICC_IGRPEN1_EL1=0x00000000
+ICC_IGRPEN1_EL3=0x00000000
+ICC_PMR_EL1=0x00000000
+ICC_RPR_EL1=0x000000FF
+ICC_SRE_EL1=0x00000007
+S_ICC_SRE_EL1=0x00000007
+N_ICC_SRE_EL1=0x00000007
+ICC_SRE_EL2=0x0000000F
+ICC_SRE_EL3=0x0000000F
+ICH_AP0R0_EL2=0x00000000
+ICH_AP1R0_EL2=0x00000000
+ICH_EISR_EL2=0x00000000
+ICH_ELRSR_EL2=0x000000FF
+ICH_HCR_EL2=0x00000000
+ICH_LR0_EL2(size:64)=0x0000000000000000
+ICH_LR1_EL2(size:64)=0x0000000000000000
+ICH_LR2_EL2(size:64)=0x0000000000000000
+ICH_LR3_EL2(size:64)=0x0000000000000000
+ICH_LR4_EL2(size:64)=0x0000000000000000
+ICH_LR5_EL2(size:64)=0x0000000000000000
+ICH_LR6_EL2(size:64)=0x0000000000000000
+ICH_LR7_EL2(size:64)=0x0000000000000000
+ICH_MISR_EL2=0x00000000
+ICH_VMCR_EL2=0x004C0008
+ICH_VTR_EL2=0x90580007
+AIDR_EL1=0x00000000
+CCSIDR_EL1=0x7007E03A
+CLIDR_EL1(size:64)=0x000000000B200123
+CSSELR_EL1=0x00000000
+CTR_EL0=0x8444C004
+DCZID_EL0=0x00000004
+ID_AA64AFR0_EL1(size:64)=0x0000000000000000
+ID_AA64AFR1_EL1(size:64)=0x0000000000000000
+ID_AA64DFR0_EL1(size:64)=0x0000000010305407
+ID_AA64DFR1_EL1(size:64)=0x0000000000000000
+ID_AA64ISAR0_EL1(size:64)=0x0000000010211120
+ID_AA64ISAR1_EL1(size:64)=0x0000000000000000
+ID_AA64MMFR0_EL1(size:64)=0x0000000000001124
+ID_AA64MMFR1_EL1(size:64)=0x0000000001111120
+ID_AA64PFR0_EL1(size:64)=0x0000000011001111
+ID_AA64PFR1_EL1(size:64)=0x0000000000000000
+ID_AFR0_EL1=0x00000000
+ID_DFR0_EL1=0x00000000
+ID_ISAR0_EL1=0x00000000
+ID_ISAR1_EL1=0x00000000
+ID_ISAR2_EL1=0x00000000
+ID_ISAR3_EL1=0x00000000
+ID_ISAR4_EL1=0x00000000
+ID_ISAR5_EL1=0x00000000
+ID_MMFR0_EL1=0x00000000
+ID_MMFR1_EL1=0x00000000
+ID_MMFR2_EL1=0x00000000
+ID_MMFR3_EL1=0x00000000
+ID_MMFR4_EL1=0x00000000
+ID_PFR0_EL1=0x00000000
+ID_PFR1_EL1=0x00000000
+MIDR_EL1=0x420F5160
+MPIDR_EL1(size:64)=0x0000000081000000
+REVIDR_EL1=0x00000000
+VMPIDR_EL2(size:64)=0x0000000080000000
+VPIDR_EL2=0x00000000
+ACTLR_EL1(size:64)=0x0000000000000000
+ACTLR_EL2(size:64)=0x0000000000000000
+ACTLR_EL3(size:64)=0x0000000000000000
+AMAIR_EL1(size:64)=0x0000000000000000
+AMAIR_EL2(size:64)=0x0000000000000000
+AMAIR_EL3(size:64)=0x0000000000000000
+HACR_EL2=0x00000000
+IL1Data0_EL1=0x00000000
+IL1Data1_EL1=0x00000000
+IL1Data2_EL1=0x00000000
+IL1Data3_EL1=0x00000000
+DL1Data0_EL1=0x00000000
+DL1Data1_EL1=0x00000000
+DL1Data2_EL1=0x00000000
+DL1Data3_EL1=0x00000000
+DL1Data4_EL1=0x00000000
+CONTEXTIDR_EL1=0x00000000
+MAIR_EL1(size:64)=0x0000000000000000
+MAIR_EL2(size:64)=0x00000000FFBB4400
+MAIR_EL3(size:64)=0x0000000000000000
+TCR_EL1(size:64)=0x0000000080000000
+TCR_EL2=0x8081351D
+TCR_EL3=0x80800000
+TTBR0_EL1(size:64)=0x0000000000000000
+TTBR0_EL2(size:64)=0x00000000FFFFD000
+TTBR0_EL3(size:64)=0x0000000000000000
+TTBR1_EL1(size:64)=0x0000000000000000
+VTCR_EL2=0x80000000
+VTTBR_EL2(size:64)=0x0000000000000000
+CPACR_EL1=0x00000000
+SCTLR_EL1=0x30500980
+SCTLR_EL2=0x30401805
+SCTLR_EL3=0x30C50830
+PMCCFILTR_EL0=0x00000000
+PMCCNTR_EL0(size:64)=0x0000000000000000
+PMCEID0_EL0=0xFBFFEFFF
+PMCEID1_EL0=0x0000A07F
+PMCNTENCLR_EL0=0x00000000
+PMCNTENSET_EL0=0x00000000
+PMCR_EL0=0x42003040
+PMEVCNTR0_EL0=0x00000000
+PMEVCNTR1_EL0=0x00000000
+PMEVCNTR2_EL0=0x00000000
+PMEVCNTR3_EL0=0x00000000
+PMEVCNTR4_EL0=0x00000000
+PMEVCNTR5_EL0=0x00000000
+PMEVTYPER0_EL0=0x00000000
+PMEVTYPER1_EL0=0x00000000
+PMEVTYPER2_EL0=0x00000000
+PMEVTYPER3_EL0=0x00000000
+PMEVTYPER4_EL0=0x00000000
+PMEVTYPER5_EL0=0x00000000
+PMINTENCLR_EL1=0x00000000
+PMINTENSET_EL1=0x00000000
+PMOVSCLR_EL0=0x00000000
+PMOVSSET_EL0=0x00000000
+PMSELR_EL0=0x00000000
+PMUSERENR_EL0=0x00000000
+PMXEVCNTR_EL0=0x00000000
+PMXEVTYPER_EL0=0x00000000
+CurrentEL=0x00000008
+DAIF=0x000003C0
+NZCV=0x20000000
+SPSel=0x00000001
+Mode=0x00000009
+RVBAR_EL3(size:64)=0x0000000000000000
+CPTR_EL3=0x00000000
+SCR_EL3=0x00000531
+ELR_EL1(size:64)=0x0000000000000000
+ELR_EL2(size:64)=0x0000000000000000
+ELR_EL3(size:64)=0x0000000000000000
+SPSR_EL1=0x00000000
+SPSR_EL2=0x00000000
+SPSR_EL3=0x00000000
+SPSR_ABT=0x00000000
+SPSR_FIQ=0x00000000
+SPSR_IRQ=0x00000000
+SPSR_UND=0x00000000
+SP_EL0(size:64)=0x0000000000000000
+SP_EL1(size:64)=0x0000000000000000
+SP_EL2(size:64)=0x00000000FC01EBA0
+SP_EL3(size:64)=0x0000000000000000
+TPIDRRO_EL0(size:64)=0x0000000000000000
+TPIDR_EL0(size:64)=0x0000000000000000
+TPIDR_EL1(size:64)=0x0000000000000000
+TPIDR_EL2(size:64)=0x0000000000000000
+TPIDR_EL3(size:64)=0x0000000000000000
+CNTFRQ_EL0=0x05F5E100
+CNTHCTL_EL2=0x00000000
+CNTHP_CTL_EL2=0x00000000
+CNTHP_CVAL_EL2(size:64)=0x0000000000000000
+CNTHP_TVAL_EL2=0xFBDEF81B
+CNTKCTL_EL1=0x00000000
+CNTPCT_EL0(size:64)=0x00000000042157F5
+CNTPS_CTL_EL1=0x00000000
+CNTPS_CVAL_EL1(size:64)=0x0000000000000000
+CNTPS_TVAL_EL1=0xFBDE0D61
+CNTP_CTL_EL0=0x00000000
+CNTP_CVAL_EL0(size:64)=0x0000000000000000
+CNTP_TVAL_EL0=0xFBDD778C
+CNTVCT_EL0(size:64)=0x000000000422AE1E
+CNTVOFF_EL2(size:64)=0x0000000000000000
+CNTV_CTL_EL0=0x00000000
+CNTV_CVAL_EL0(size:64)=0x0000000000000000
+CNTV_TVAL_EL0=0xFBDCA814
+CPTR_EL2=0x00000000
+HCR_EL2(size:64)=0x000000008000003A
+HSTR_EL2=0x00000000
+CPSR=0x200003C9
+
+[dump1]
+space=EL2
+address=0xFFFEB448
+file=mem_Cortex-A57_0.bin
+
diff --git a/decoder/tests/snapshots/a55-test-tpiu/device2.ini b/decoder/tests/snapshots/a55-test-tpiu/device2.ini
new file mode 100644
index 0000000..21bebaa
--- /dev/null
+++ b/decoder/tests/snapshots/a55-test-tpiu/device2.ini
@@ -0,0 +1,189 @@
+[device]
+name=CSETM_0
+class=trace_source
+type=ETM4.2
+
+[regs]
+TRCPROCSELR(id:0x2)=0x00000000
+TRCCONFIGR(id:0x4)=0x00000001
+TRCAUXCTLR(id:0x6)=0x00000000
+TRCEVENTCTL0R(id:0x8)=0x00000000
+TRCEVENTCTL1R(id:0x9)=0x00000000
+TRCSTALLCTLR(id:0xB)=0x00000000
+TRCTSCTLR(id:0xC)=0x00000000
+TRCSYNCPR(id:0xD)=0x0000000B
+TRCCCCTLR(id:0xE)=0x00000000
+TRCBBCTLR(id:0xF)=0x00000000
+TRCTRACEIDR(id:0x10)=0x00000001
+TRCQCTLR(id:0x11)=0x00000000
+TRCVICTLR(id:0x20)=0x00000201
+TRCVIIECTLR(id:0x21)=0x00000000
+TRCVISSCTLR(id:0x22)=0x00000000
+TRCVIPCSSCTLR(id:0x23)=0x00000000
+TRCVDCTLR(id:0x28)=0x00000000
+TRCVDSACCTLR(id:0x29)=0x00000000
+TRCVDARCCTLR(id:0x2A)=0x00000000
+TRCSEQEVR0(id:0x40)=0x00000000
+TRCSEQEVR1(id:0x41)=0x00000000
+TRCSEQEVR2(id:0x42)=0x00000000
+TRCSEQRSTEVR(id:0x46)=0x00000000
+TRCSEQSTR(id:0x47)=0x00000000
+TRCEXTINSELR(id:0x48)=0x00000000
+TRCCNTRLDVR0(id:0x50)=0x00000000
+TRCCNTRLDVR1(id:0x51)=0x00000000
+TRCCNTRLDVR2(id:0x52)=0x00000000
+TRCCNTRLDVR3(id:0x53)=0x00000000
+TRCCNTCTLR0(id:0x54)=0x00000000
+TRCCNTCTLR1(id:0x55)=0x00000000
+TRCCNTCTLR2(id:0x56)=0x00000000
+TRCCNTCTLR3(id:0x57)=0x00000000
+TRCCNTVR0(id:0x58)=0x00000000
+TRCCNTVR1(id:0x59)=0x00000000
+TRCCNTVR2(id:0x5A)=0x00000000
+TRCCNTVR3(id:0x5B)=0x00000000
+TRCIDR8(id:0x60)=0x00000000
+TRCIDR9(id:0x61)=0x00000000
+TRCIDR10(id:0x62)=0x00000000
+TRCIDR11(id:0x63)=0x00000000
+TRCIDR12(id:0x64)=0x00000000
+TRCIDR13(id:0x65)=0x00000000
+TRCIMSPEC0(id:0x70)=0x00000000
+TRCIMSPEC1(id:0x71)=0x00000000
+TRCIMSPEC2(id:0x72)=0x00000000
+TRCIMSPEC3(id:0x73)=0x00000000
+TRCIMSPEC4(id:0x74)=0x00000000
+TRCIMSPEC5(id:0x75)=0x00000000
+TRCIMSPEC6(id:0x76)=0x00000000
+TRCIMSPEC7(id:0x77)=0x00000000
+TRCIDR0(id:0x78)=0x08000CA1
+TRCIDR1(id:0x79)=0x4200F410
+TRCIDR2(id:0x7A)=0x20001088
+TRCIDR3(id:0x7B)=0x007B0004
+TRCIDR4(id:0x7C)=0x11170004
+TRCIDR5(id:0x7D)=0x28070804
+TRCIDR6(id:0x7E)=0x00000000
+TRCIDR7(id:0x7F)=0x00000000
+TRCRSCTLR2(id:0x82)=0x00040000
+TRCRSCTLR3(id:0x83)=0x00000000
+TRCRSCTLR4(id:0x84)=0x00000000
+TRCRSCTLR5(id:0x85)=0x00000000
+TRCRSCTLR6(id:0x86)=0x00000000
+TRCRSCTLR7(id:0x87)=0x00000000
+TRCRSCTLR8(id:0x88)=0x00000000
+TRCRSCTLR9(id:0x89)=0x00000000
+TRCRSCTLR10(id:0x8A)=0x00000000
+TRCRSCTLR11(id:0x8B)=0x00000000
+TRCRSCTLR12(id:0x8C)=0x00000000
+TRCRSCTLR13(id:0x8D)=0x00000000
+TRCRSCTLR14(id:0x8E)=0x00000000
+TRCRSCTLR15(id:0x8F)=0x00000000
+TRCRSCTLR16(id:0x90)=0x00000000
+TRCRSCTLR17(id:0x91)=0x00000000
+TRCRSCTLR18(id:0x92)=0x00000000
+TRCRSCTLR19(id:0x93)=0x00000000
+TRCRSCTLR20(id:0x94)=0x00000000
+TRCRSCTLR21(id:0x95)=0x00000000
+TRCRSCTLR22(id:0x96)=0x00000000
+TRCRSCTLR23(id:0x97)=0x00000000
+TRCRSCTLR24(id:0x98)=0x00000000
+TRCRSCTLR25(id:0x99)=0x00000000
+TRCRSCTLR26(id:0x9A)=0x00000000
+TRCRSCTLR27(id:0x9B)=0x00000000
+TRCRSCTLR28(id:0x9C)=0x00000000
+TRCRSCTLR29(id:0x9D)=0x00000000
+TRCRSCTLR30(id:0x9E)=0x00000000
+TRCRSCTLR31(id:0x9F)=0x00000000
+TRCSSCCR0(id:0xA0)=0x00000000
+TRCSSCCR1(id:0xA1)=0x00000000
+TRCSSCCR2(id:0xA2)=0x00000000
+TRCSSCCR3(id:0xA3)=0x00000000
+TRCSSCCR4(id:0xA4)=0x00000000
+TRCSSCCR5(id:0xA5)=0x00000000
+TRCSSCCR6(id:0xA6)=0x00000000
+TRCSSCCR7(id:0xA7)=0x00000000
+TRCSSCSR0(id:0xA8)=0x00000001
+TRCSSCSR1(id:0xA9)=0x00000000
+TRCSSCSR2(id:0xAA)=0x00000000
+TRCSSCSR3(id:0xAB)=0x00000000
+TRCSSCSR4(id:0xAC)=0x00000000
+TRCSSCSR5(id:0xAD)=0x00000000
+TRCSSCSR6(id:0xAE)=0x00000000
+TRCSSCSR7(id:0xAF)=0x00000000
+TRCSSPCICR0(id:0xB0)=0x00000000
+TRCSSPCICR1(id:0xB1)=0x00000000
+TRCSSPCICR2(id:0xB2)=0x00000000
+TRCSSPCICR3(id:0xB3)=0x00000000
+TRCSSPCICR4(id:0xB4)=0x00000000
+TRCSSPCICR5(id:0xB5)=0x00000000
+TRCSSPCICR6(id:0xB6)=0x00000000
+TRCSSPCICR7(id:0xB7)=0x00000000
+TRCACVR0(id:0x100,size:64)=0x0000000000000000
+TRCACVR1(id:0x102,size:64)=0x0000000000000000
+TRCACVR2(id:0x104,size:64)=0x0000000000000000
+TRCACVR3(id:0x106,size:64)=0x0000000000000000
+TRCACVR4(id:0x108,size:64)=0x0000000000000000
+TRCACVR5(id:0x10A,size:64)=0x0000000000000000
+TRCACVR6(id:0x10C,size:64)=0x0000000000000000
+TRCACVR7(id:0x10E,size:64)=0x0000000000000000
+TRCACVR8(id:0x110,size:64)=0x0000000000000000
+TRCACVR9(id:0x112,size:64)=0x0000000000000000
+TRCACVR10(id:0x114,size:64)=0x0000000000000000
+TRCACVR11(id:0x116,size:64)=0x0000000000000000
+TRCACVR12(id:0x118,size:64)=0x0000000000000000
+TRCACVR13(id:0x11A,size:64)=0x0000000000000000
+TRCACVR14(id:0x11C,size:64)=0x0000000000000000
+TRCACVR15(id:0x11E,size:64)=0x0000000000000000
+TRCACATR0(id:0x120,size:64)=0x0000000000000000
+TRCACATR1(id:0x122,size:64)=0x0000000000000000
+TRCACATR2(id:0x124,size:64)=0x0000000000000000
+TRCACATR3(id:0x126,size:64)=0x0000000000000000
+TRCACATR4(id:0x128,size:64)=0x0000000000000000
+TRCACATR5(id:0x12A,size:64)=0x0000000000000000
+TRCACATR6(id:0x12C,size:64)=0x0000000000000000
+TRCACATR7(id:0x12E,size:64)=0x0000000000000000
+TRCACATR8(id:0x130,size:64)=0x0000000000000000
+TRCACATR9(id:0x132,size:64)=0x0000000000000000
+TRCACATR10(id:0x134,size:64)=0x0000000000000000
+TRCACATR11(id:0x136,size:64)=0x0000000000000000
+TRCACATR12(id:0x138,size:64)=0x0000000000000000
+TRCACATR13(id:0x13A,size:64)=0x0000000000000000
+TRCACATR14(id:0x13C,size:64)=0x0000000000000000
+TRCACATR15(id:0x13E,size:64)=0x0000000000000000
+TRCDVCVR0(id:0x140,size:64)=0x0000000000000000
+TRCDVCVR1(id:0x142,size:64)=0x0000000000000000
+TRCDVCVR2(id:0x144,size:64)=0x0000000000000000
+TRCDVCVR3(id:0x146,size:64)=0x0000000000000000
+TRCDVCVR4(id:0x148,size:64)=0x0000000000000000
+TRCDVCVR5(id:0x14A,size:64)=0x0000000000000000
+TRCDVCVR6(id:0x14C,size:64)=0x0000000000000000
+TRCDVCVR7(id:0x14E,size:64)=0x0000000000000000
+TRCDVCMR0(id:0x160,size:64)=0x0000000000000000
+TRCDVCMR1(id:0x162,size:64)=0x0000000000000000
+TRCDVCMR2(id:0x164,size:64)=0x0000000000000000
+TRCDVCMR3(id:0x166,size:64)=0x0000000000000000
+TRCDVCMR4(id:0x168,size:64)=0x0000000000000000
+TRCDVCMR5(id:0x16A,size:64)=0x0000000000000000
+TRCDVCMR6(id:0x16C,size:64)=0x0000000000000000
+TRCDVCMR7(id:0x16E,size:64)=0x0000000000000000
+TRCCIDCVR0(id:0x180,size:64)=0x0000000000000000
+TRCCIDCVR1(id:0x182,size:64)=0x0000000000000000
+TRCCIDCVR2(id:0x184,size:64)=0x0000000000000000
+TRCCIDCVR3(id:0x186,size:64)=0x0000000000000000
+TRCCIDCVR4(id:0x188,size:64)=0x0000000000000000
+TRCCIDCVR5(id:0x18A,size:64)=0x0000000000000000
+TRCCIDCVR6(id:0x18C,size:64)=0x0000000000000000
+TRCCIDCVR7(id:0x18E,size:64)=0x0000000000000000
+TRCVMIDCVR0(id:0x190,size:64)=0x0000000000000000
+TRCVMIDCVR1(id:0x192,size:64)=0x0000000000000000
+TRCVMIDCVR2(id:0x194,size:64)=0x0000000000000000
+TRCVMIDCVR3(id:0x196,size:64)=0x0000000000000000
+TRCVMIDCVR4(id:0x198,size:64)=0x0000000000000000
+TRCVMIDCVR5(id:0x19A,size:64)=0x0000000000000000
+TRCVMIDCVR6(id:0x19C,size:64)=0x0000000000000000
+TRCVMIDCVR7(id:0x19E,size:64)=0x0000000000000000
+TRCCIDCCTLR0(id:0x1A0)=0x00000000
+TRCCIDCCTLR1(id:0x1A1)=0x00000000
+TRCVMIDCCTLR0(id:0x1A2)=0x00000000
+TRCVMIDCCTLR1(id:0x1A3)=0x00000000
+TRCAUTHSTATUS(id:0x3EE)=0x000000CC
+
diff --git a/decoder/tests/snapshots/a55-test-tpiu/snapshot.ini b/decoder/tests/snapshots/a55-test-tpiu/snapshot.ini
new file mode 100644
index 0000000..f5d6df7
--- /dev/null
+++ b/decoder/tests/snapshots/a55-test-tpiu/snapshot.ini
@@ -0,0 +1,12 @@
+; DS-5 snapshot
+
+[snapshot]
+version=1.0
+
+[device_list]
+device1=device1.ini
+device2=device2.ini
+
+[trace]
+metadata=trace.ini
+
diff --git a/decoder/tests/snapshots/a55-test-tpiu/trace.ini b/decoder/tests/snapshots/a55-test-tpiu/trace.ini
new file mode 100644
index 0000000..fec7621
--- /dev/null
+++ b/decoder/tests/snapshots/a55-test-tpiu/trace.ini
@@ -0,0 +1,16 @@
+; DS-5 trace metadata
+
+[trace_buffers]
+buffers=buffer0
+
+[buffer0]
+name=DSTREAM_0
+file=DSTREAM_0.bin
+format=dstream_coresight
+
+[core_trace_sources]
+Cortex-A55_0=CSETM_0
+
+[source_buffers]
+CSETM_0=DSTREAM_0
+
diff --git a/decoder/tests/source/trc_pkt_lister.cpp b/decoder/tests/source/trc_pkt_lister.cpp
index 4a09e55..50260a5 100644
--- a/decoder/tests/source/trc_pkt_lister.cpp
+++ b/decoder/tests/source/trc_pkt_lister.cpp
@@ -70,6 +70,9 @@ static bool decode = false;
 static bool no_undecoded_packets = false;
 static bool pkt_mon = false;
 static int test_waits = 0;
+static bool dstream_format = false;
+static bool tpiu_format = false;
+static bool has_hsync = false;
 
 int main(int argc, char* argv[])
 {
@@ -182,6 +185,9 @@ void print_help()
     oss << "\nDecode:\n\n";
     oss << "-id <n>             Set an ID to list (may be used multiple times) - default if no id set is for all IDs to be printed\n";
     oss << "-src_name <name>    List packets from a given snapshot source name (defaults to first source found)\n";
+    oss << "-dstream_format     Input is DSTREAM framed.";
+    oss << "-tpiu               Input from TPIU - sync by FSYNC.";
+    oss << "-tpiu_hsync         Input from TPIU - sync by FSYNC and HSYNC.";
     oss << "-decode             Full decode of the packets from the trace snapshot (default is to list undecoded packets only\n";
     oss << "-decode_only        Does not list the undecoded packets, just the trace decode.\n";
     oss << "-o_raw_packed       Output raw packed trace frames\n";
@@ -401,6 +407,19 @@ bool process_cmd_line_opts(int argc, char* argv[])
                     optIdx++;
                 }
             }
+            else if (strcmp(argv[optIdx], "-dstream_format") == 0)
+            {
+                dstream_format = true;
+            }
+            else if (strcmp(argv[optIdx], "-tpiu") == 0)
+            {
+                tpiu_format = true;
+            }
+            else if (strcmp(argv[optIdx], "-tpiu_hsync") == 0)
+            {
+                has_hsync = true;
+                tpiu_format = true;
+            }
             else
             {
                 std::ostringstream errstr;
@@ -488,9 +507,19 @@ void ConfigureFrameDeMux(DecodeTree *dcd_tree, RawFramePrinter **framePrinter)
     if(pDeformatter != 0)
     {
         // configuration - memory alinged buffer
-        uint32_t configFlags = OCSD_DFRMTR_FRAME_MEM_ALIGN;
+        uint32_t configFlags = pDeformatter->getConfigFlags();
+
+        // check for TPIU FSYNC & HSYNC
+        if (tpiu_format) configFlags |= OCSD_DFRMTR_HAS_FSYNCS;
+        if (has_hsync) configFlags |= OCSD_DFRMTR_HAS_HSYNCS;
+        // if FSYNC (& HSYNC) - cannot be mem frame aligned.
+        if (tpiu_format) configFlags &= ~OCSD_DFRMTR_FRAME_MEM_ALIGN;
 
-        pDeformatter->Configure(configFlags);
+        if (!configFlags)
+        {
+            configFlags = OCSD_DFRMTR_FRAME_MEM_ALIGN;
+            pDeformatter->Configure(configFlags);
+        }
         if (outRawPacked || outRawUnpacked)
         {
             if (outRawPacked) configFlags |= OCSD_DFRMTR_PACKED_RAW_OUT;
@@ -554,7 +583,12 @@ void ListTracePackets(ocsdDefaultErrorLogger &err_logger, SnapShotReader &reader
                 // process the file, a buffer load at a time
                 while(!in.eof() && !OCSD_DATA_RESP_IS_FATAL(dataPathResp))
                 {
-                    in.read((char *)&trace_buffer[0],bufferSize);   // load a block of data into the buffer
+                    if (dstream_format)
+                    { 
+                        in.read((char *)&trace_buffer[0], 512 - 8);
+                    }
+                    else
+                        in.read((char *)&trace_buffer[0],bufferSize);   // load a block of data into the buffer
 
                     std::streamsize nBuffRead = in.gcount();    // get count of data loaded.
                     std::streamsize nBuffProcessed = 0;         // amount processed in this buffer.
@@ -597,6 +631,22 @@ void ListTracePackets(ocsdDefaultErrorLogger &err_logger, SnapShotReader &reader
                             dataPathResp = dcd_tree->TraceDataIn(OCSD_OP_FLUSH,0,0,0,0);
                         }
                     }
+
+                    /* dump dstream footers */
+                    if (dstream_format) {
+                        in.read((char *)&trace_buffer[0], 8);
+                        if (outRawPacked)
+                        {
+                            std::ostringstream oss;
+                            oss << "DSTREAM footer [";
+                            for (int i = 0; i < 8; i++)
+                            {
+                                oss << "0x" << std::hex << (int)trace_buffer[i] << " ";
+                            }
+                            oss << "]\n";
+                            logger.LogMsg(oss.str());
+                        }
+                    }
                 }
 
                 // fatal error - no futher processing