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| author | Zhi An Ng <zhin@google.com> | 2022-02-03 16:08:31 -0800 |
|---|---|---|
| committer | XNNPACK Team <xnnpack-github-robot@google.com> | 2022-02-03 16:09:32 -0800 |
| commit | 1738f11208fe4ed57e6fae8a3348c125aef99054 (patch) | |
| tree | 809f9570c2d539fc1c20d599f2d925ce80243d3f | |
| parent | eb7256b6eead2a8277a36fd81d2041893eb2eaa7 (diff) | |
| download | XNNPACK-1738f11208fe4ed57e6fae8a3348c125aef99054.tar.gz | |
Implement ldr (post-index) for aarch64 assembler
PiperOrigin-RevId: 426261535
| -rw-r--r-- | src/jit/aarch64-assembler.cc | 9 | ||||
| -rw-r--r-- | src/xnnpack/aarch64-assembler.h | 1 | ||||
| -rw-r--r-- | test/aarch64-assembler.cc | 6 |
3 files changed, 16 insertions, 0 deletions
diff --git a/src/jit/aarch64-assembler.cc b/src/jit/aarch64-assembler.cc index fa0f60de8..5b4acf163 100644 --- a/src/jit/aarch64-assembler.cc +++ b/src/jit/aarch64-assembler.cc @@ -278,6 +278,15 @@ void Assembler::ldr(XRegister xt, MemOperand xn) { emit32(0xF9400000 | imm >> 3 << 10 | rn(xn.base) | xt.code); } +void Assembler::ldr(XRegister xt, MemOperand xn, int32_t imm) { + if (imm < kInt9Min || imm > kInt9Max) { + error_ = Error::kInvalidOperand; + return; + } + + emit32(0xF8400400 | (imm & kImm9Mask) << 12 | rn(xn.base) | rt(xt)); +} + void Assembler::mov(XRegister xd, XRegister xn) { emit32(0xAA0003E0 | rm(xn) | rd(xd)); } diff --git a/src/xnnpack/aarch64-assembler.h b/src/xnnpack/aarch64-assembler.h index 7563b2339..5408065ff 100644 --- a/src/xnnpack/aarch64-assembler.h +++ b/src/xnnpack/aarch64-assembler.h @@ -337,6 +337,7 @@ class Assembler : public AssemblerBase { void ldp(XRegister xt1, XRegister xt2, MemOperand xn); void ldp(XRegister xt1, XRegister xt2, MemOperand xn, int32_t imm); void ldr(XRegister xt, MemOperand xn); + void ldr(XRegister xt, MemOperand xn, int32_t imm); void mov(XRegister xd, XRegister xn); void prfm(PrefetchOp prfop, MemOperand xn); void ret(); diff --git a/test/aarch64-assembler.cc b/test/aarch64-assembler.cc index f2ba15bfa..bfd153600 100644 --- a/test/aarch64-assembler.cc +++ b/test/aarch64-assembler.cc @@ -55,6 +55,12 @@ TEST(AArch64Assembler, BaseInstructionEncoding) { EXPECT_ERROR(Error::kInvalidOperand, a.ldr(x8, mem[sp, 32768])); EXPECT_ERROR(Error::kInvalidOperand, a.ldr(x8, MemOperand(sp, 16, AddressingMode::kPostIndex))); + CHECK_ENCODING(0xF8408488, a.ldr(x8, mem[x4], 8)); + CHECK_ENCODING(0xF84FF488, a.ldr(x8, mem[x4], 255)); + CHECK_ENCODING(0xF8500488, a.ldr(x8, mem[x4], -256)); + EXPECT_ERROR(Error::kInvalidOperand, a.ldr(x8, mem[x4], 256)); + EXPECT_ERROR(Error::kInvalidOperand, a.ldr(x8, mem[x4], -257)); + CHECK_ENCODING(0xAA0303E9, a.mov(x9, x3)); CHECK_ENCODING(0xF98000A0, a.prfm(kPLDL1KEEP, mem[x5])); |