F16 MAXPOOL microkernel for F16C

PiperOrigin-RevId: 426324844

6 files changed, 1164 insertions, 0 deletions

diff --git a/BUILD.bazel b/BUILD.bazel
index 610028941..b9156846d 100644
--- a/BUILD.bazel
+++ b/BUILD.bazel
@@ -6037,6 +6037,7 @@ ALL_F16C_MICROKERNEL_SRCS = [
     "src/f16-gavgpool/gen/7x-minmax-f16c-c16.c",
     "src/f16-gavgpool/gen/7x-minmax-f16c-c24.c",
     "src/f16-gavgpool/gen/7x-minmax-f16c-c32.c",
+    "src/f16-maxpool/9p8x-minmax-f16c-c8.c",
     "src/f16-prelu/gen/f16c-2x8.c",
     "src/f16-prelu/gen/f16c-2x16.c",
     "src/f16-vbinary/gen/vadd-minmax-f16c-x8.c",
diff --git a/CMakeLists.txt b/CMakeLists.txt
index 2c233f8d5..8ef91efc0 100755
--- a/CMakeLists.txt
+++ b/CMakeLists.txt
@@ -4776,6 +4776,7 @@ SET(ALL_F16C_MICROKERNEL_SRCS
   src/f16-gavgpool/gen/7x-minmax-f16c-c16.c
   src/f16-gavgpool/gen/7x-minmax-f16c-c24.c
   src/f16-gavgpool/gen/7x-minmax-f16c-c32.c
+  src/f16-maxpool/9p8x-minmax-f16c-c8.c
   src/f16-prelu/gen/f16c-2x8.c
   src/f16-prelu/gen/f16c-2x16.c
   src/f16-vbinary/gen/vadd-minmax-f16c-x8.c
diff --git a/src/f16-maxpool/9p8x-minmax-f16c-c8.c b/src/f16-maxpool/9p8x-minmax-f16c-c8.c
new file mode 100644
index 000000000..82691d22e
--- /dev/null
+++ b/src/f16-maxpool/9p8x-minmax-f16c-c8.c
@@ -0,0 +1,272 @@
+// Copyright 2022 Google LLC
+//
+// This source code is licensed under the BSD-style license found in the
+// LICENSE file in the root directory of this source tree.
+
+#include <assert.h>
+
+#include <immintrin.h>
+
+#include <xnnpack/maxpool.h>
+
+
+void xnn_f16_maxpool_minmax_ukernel_9p8x__f16c_c8(
+    size_t output_pixels,
+    size_t kernel_elements,
+    size_t channels,
+    const void** input,
+    size_t input_offset,
+    void* output,
+    size_t input_increment,
+    size_t output_increment,
+    const union xnn_f16_minmax_params params[restrict XNN_MIN_ELEMENTS(1)]) XNN_OOB_READS
+{
+  assert(output_pixels != 0);
+  assert(kernel_elements != 0);
+  assert(channels != 0);
+
+  const __m256 voutput_min = _mm256_load_ps(params->avx.min);
+  const __m256 voutput_max = _mm256_load_ps(params->avx.max);
+  do {
+    uint16_t* o = output;
+    {
+      const uint16_t* i0 = *input++;
+      const uint16_t* i1 = *input++;
+      const uint16_t* i2 = *input++;
+      const uint16_t* i3 = *input++;
+      const uint16_t* i4 = *input++;
+      const uint16_t* i5 = *input++;
+      const uint16_t* i6 = *input++;
+      const uint16_t* i7 = *input++;
+      const uint16_t* i8 = *input++;
+      i0 = (const uint16_t*) ((uintptr_t) i0 + input_offset);
+      i1 = (const uint16_t*) ((uintptr_t) i1 + input_offset);
+      i2 = (const uint16_t*) ((uintptr_t) i2 + input_offset);
+      i3 = (const uint16_t*) ((uintptr_t) i3 + input_offset);
+      i4 = (const uint16_t*) ((uintptr_t) i4 + input_offset);
+      i5 = (const uint16_t*) ((uintptr_t) i5 + input_offset);
+      i6 = (const uint16_t*) ((uintptr_t) i6 + input_offset);
+      i7 = (const uint16_t*) ((uintptr_t) i7 + input_offset);
+      i8 = (const uint16_t*) ((uintptr_t) i8 + input_offset);
+      if (kernel_elements < 2) {
+        i1 = i0;
+      }
+      if (kernel_elements <= 2) {
+        i2 = i0;
+      }
+      if (kernel_elements < 4) {
+        i3 = i0;
+      }
+      if (kernel_elements <= 4) {
+        i4 = i0;
+      }
+      if (kernel_elements < 6) {
+        i5 = i0;
+      }
+      if (kernel_elements <= 6) {
+        i6 = i0;
+      }
+      if (kernel_elements < 8) {
+        i7 = i0;
+      }
+      if (kernel_elements <= 8) {
+        i8 = i0;
+      }
+
+      size_t c = channels;
+      for (; c >= 8; c -= 8) {
+        const __m256 vi0 = _mm256_cvtph_ps(_mm_loadu_si128((const __m128i*) i0));
+        i0 += 8;
+        const __m256 vi1 = _mm256_cvtph_ps(_mm_loadu_si128((const __m128i*) i1));
+        i1 += 8;
+        const __m256 vi2 = _mm256_cvtph_ps(_mm_loadu_si128((const __m128i*) i2));
+        i2 += 8;
+        const __m256 vi3 = _mm256_cvtph_ps(_mm_loadu_si128((const __m128i*) i3));
+        i3 += 8;
+        const __m256 vi4 = _mm256_cvtph_ps(_mm_loadu_si128((const __m128i*) i4));
+        i4 += 8;
+        const __m256 vi5 = _mm256_cvtph_ps(_mm_loadu_si128((const __m128i*) i5));
+        i5 += 8;
+        const __m256 vi6 = _mm256_cvtph_ps(_mm_loadu_si128((const __m128i*) i6));
+        i6 += 8;
+        const __m256 vi7 = _mm256_cvtph_ps(_mm_loadu_si128((const __m128i*) i7));
+        i7 += 8;
+        const __m256 vi8 = _mm256_cvtph_ps(_mm_loadu_si128((const __m128i*) i8));
+        i8 += 8;
+
+        const __m256 vmax018 = _mm256_max_ps(_mm256_max_ps(vi0, vi1), vi8);
+        const __m256 vmax23 = _mm256_max_ps(vi2, vi3);
+        const __m256 vmax45 = _mm256_max_ps(vi4, vi5);
+        const __m256 vmax67 = _mm256_max_ps(vi6, vi7);
+
+        const __m256 vmax2345 = _mm256_max_ps(vmax23, vmax45);
+        const __m256 vmax01678 = _mm256_max_ps(vmax018, vmax67);
+        const __m256 vmax = _mm256_max_ps(vmax2345, vmax01678);
+        const __m256 vout = _mm256_max_ps(_mm256_min_ps(vmax, voutput_max), voutput_min);
+
+        _mm_storeu_si128((__m128i*) o, _mm256_cvtps_ph(vout, _MM_FROUND_NO_EXC));
+        o += 8;
+      }
+      if (c != 0) {
+        const __m256 vi0 = _mm256_cvtph_ps(_mm_loadu_si128((const __m128i*) i0));
+        i0 += 8;
+        const __m256 vi1 = _mm256_cvtph_ps(_mm_loadu_si128((const __m128i*) i1));
+        i1 += 8;
+        const __m256 vi2 = _mm256_cvtph_ps(_mm_loadu_si128((const __m128i*) i2));
+        i2 += 8;
+        const __m256 vi3 = _mm256_cvtph_ps(_mm_loadu_si128((const __m128i*) i3));
+        i3 += 8;
+        const __m256 vi4 = _mm256_cvtph_ps(_mm_loadu_si128((const __m128i*) i4));
+        i4 += 8;
+        const __m256 vi5 = _mm256_cvtph_ps(_mm_loadu_si128((const __m128i*) i5));
+        i5 += 8;
+        const __m256 vi6 = _mm256_cvtph_ps(_mm_loadu_si128((const __m128i*) i6));
+        i6 += 8;
+        const __m256 vi7 = _mm256_cvtph_ps(_mm_loadu_si128((const __m128i*) i7));
+        i7 += 8;
+        const __m256 vi8 = _mm256_cvtph_ps(_mm_loadu_si128((const __m128i*) i8));
+        i8 += 8;
+
+        const __m256 vmax018 = _mm256_max_ps(_mm256_max_ps(vi0, vi1), vi8);
+        const __m256 vmax23 = _mm256_max_ps(vi2, vi3);
+        const __m256 vmax45 = _mm256_max_ps(vi4, vi5);
+        const __m256 vmax67 = _mm256_max_ps(vi6, vi7);
+
+        const __m256 vmax2345 = _mm256_max_ps(vmax23, vmax45);
+        const __m256 vmax01678 = _mm256_max_ps(vmax018, vmax67);
+        const __m256 vmax = _mm256_max_ps(vmax2345, vmax01678);
+        __m256 vout = _mm256_max_ps(_mm256_min_ps(vmax, voutput_max), voutput_min);
+
+        __m128i vh = _mm256_cvtps_ph(vout, _MM_FROUND_NO_EXC);
+        if (c & 4) {
+          _mm_storel_epi64((__m128i*) o, vh);
+          vh = _mm_unpackhi_epi64(vh, vh);
+          o += 4;
+        }
+        if (c & 2) {
+          *((uint32_t*) o) = (uint32_t) _mm_cvtsi128_si32(vh);
+          vh = _mm_srli_epi64(vh, 32);
+          o += 2;
+        }
+        if (c & 1) {
+          *o = _mm_extract_epi16(vh, 0);
+          o += 1;
+        }
+      }
+    }
+
+    for (ptrdiff_t k = (ptrdiff_t) kernel_elements - 9; k > 0; k -= 8) {
+      const uint16_t* i0 = *input++;
+      const uint16_t* i1 = *input++;
+      const uint16_t* i2 = *input++;
+      const uint16_t* i3 = *input++;
+      const uint16_t* i4 = *input++;
+      const uint16_t* i5 = *input++;
+      const uint16_t* i6 = *input++;
+      const uint16_t* i7 = *input++;
+      i0 = (const uint16_t*) ((uintptr_t) i0 + input_offset);
+      i1 = (const uint16_t*) ((uintptr_t) i1 + input_offset);
+      i2 = (const uint16_t*) ((uintptr_t) i2 + input_offset);
+      i3 = (const uint16_t*) ((uintptr_t) i3 + input_offset);
+      i4 = (const uint16_t*) ((uintptr_t) i4 + input_offset);
+      i5 = (const uint16_t*) ((uintptr_t) i5 + input_offset);
+      i6 = (const uint16_t*) ((uintptr_t) i6 + input_offset);
+      i7 = (const uint16_t*) ((uintptr_t) i7 + input_offset);
+      if (k < 2) {
+        i1 = i0;
+      }
+      if (k <= 2) {
+        i2 = i0;
+      }
+      if (k < 4) {
+        i3 = i0;
+      }
+      if (k <= 4) {
+        i4 = i0;
+      }
+      if (k < 6) {
+        i5 = i0;
+      }
+      if (k <= 6) {
+        i6 = i0;
+      }
+      if (k < 8) {
+        i7 = i0;
+      }
+
+      o = output;
+      size_t c = channels;
+      for (; c >= 8; c -= 8) {
+        const __m256 vi0 = _mm256_cvtph_ps(_mm_loadu_si128((const __m128i*) i0));
+        i0 += 8;
+        const __m256 vi1 = _mm256_cvtph_ps(_mm_loadu_si128((const __m128i*) i1));
+        i1 += 8;
+        const __m256 vi2 = _mm256_cvtph_ps(_mm_loadu_si128((const __m128i*) i2));
+        i2 += 8;
+        const __m256 vi3 = _mm256_cvtph_ps(_mm_loadu_si128((const __m128i*) i3));
+        i3 += 8;
+        const __m256 vi4 = _mm256_cvtph_ps(_mm_loadu_si128((const __m128i*) i4));
+        i4 += 8;
+        const __m256 vi5 = _mm256_cvtph_ps(_mm_loadu_si128((const __m128i*) i5));
+        i5 += 8;
+        const __m256 vi6 = _mm256_cvtph_ps(_mm_loadu_si128((const __m128i*) i6));
+        i6 += 8;
+        const __m256 vi7 = _mm256_cvtph_ps(_mm_loadu_si128((const __m128i*) i7));
+        i7 += 8;
+        const __m256 vo = _mm256_cvtph_ps(_mm_loadu_si128((const __m128i*) o));
+
+        const __m256 vmax01 = _mm256_max_ps(_mm256_max_ps(vi0, vi1), vo);
+        const __m256 vmax23 = _mm256_max_ps(vi2, vi3);
+        const __m256 vmax45 = _mm256_max_ps(vi4, vi5);
+        const __m256 vmax67 = _mm256_max_ps(vi6, vi7);
+
+        const __m256 vmax2345 = _mm256_max_ps(vmax23, vmax45);
+        const __m256 vmax0167 = _mm256_max_ps(vmax01, vmax67);
+        const __m256 vmax = _mm256_max_ps(vmax2345, vmax0167);
+        const __m256 vout = _mm256_max_ps(_mm256_min_ps(vmax, voutput_max), voutput_min);
+
+        _mm_storeu_si128((__m128i*) o, _mm256_cvtps_ph(vout, _MM_FROUND_NO_EXC));
+        o += 8;
+      }
+      if (c != 0) {
+        const __m256 vi0 = _mm256_cvtph_ps(_mm_loadu_si128((const __m128i*) i0));
+        const __m256 vi1 = _mm256_cvtph_ps(_mm_loadu_si128((const __m128i*) i1));
+        const __m256 vi2 = _mm256_cvtph_ps(_mm_loadu_si128((const __m128i*) i2));
+        const __m256 vi3 = _mm256_cvtph_ps(_mm_loadu_si128((const __m128i*) i3));
+        const __m256 vi4 = _mm256_cvtph_ps(_mm_loadu_si128((const __m128i*) i4));
+        const __m256 vi5 = _mm256_cvtph_ps(_mm_loadu_si128((const __m128i*) i5));
+        const __m256 vi6 = _mm256_cvtph_ps(_mm_loadu_si128((const __m128i*) i6));
+        const __m256 vi7 = _mm256_cvtph_ps(_mm_loadu_si128((const __m128i*) i7));
+        const __m256 vo = _mm256_cvtph_ps(_mm_loadu_si128((const __m128i*) o));
+
+        const __m256 vmax01 = _mm256_max_ps(_mm256_max_ps(vi0, vi1), vo);
+        const __m256 vmax23 = _mm256_max_ps(vi2, vi3);
+        const __m256 vmax45 = _mm256_max_ps(vi4, vi5);
+        const __m256 vmax67 = _mm256_max_ps(vi6, vi7);
+
+        const __m256 vmax2345 = _mm256_max_ps(vmax23, vmax45);
+        const __m256 vmax0167 = _mm256_max_ps(vmax01, vmax67);
+        const __m256 vmax = _mm256_max_ps(vmax2345, vmax0167);
+        __m256 vout = _mm256_max_ps(_mm256_min_ps(vmax, voutput_max), voutput_min);
+
+        __m128i vh = _mm256_cvtps_ph(vout, _MM_FROUND_NO_EXC);
+        if (c & 4) {
+          _mm_storel_epi64((__m128i*) o, vh);
+          vh = _mm_unpackhi_epi64(vh, vh);
+          o += 4;
+        }
+        if (c & 2) {
+          *((uint32_t*) o) = (uint32_t) _mm_cvtsi128_si32(vh);
+          vh = _mm_srli_epi64(vh, 32);
+          o += 2;
+        }
+        if (c & 1) {
+          *o = _mm_extract_epi16(vh, 0);
+          o += 1;
+        }
+      }
+    }
+    input = (const void**) ((uintptr_t) input + input_increment);
+    output = (uint16_t*) ((uintptr_t) o + output_increment);
+  } while (--output_pixels != 0);
+}
diff --git a/src/xnnpack/maxpool.h b/src/xnnpack/maxpool.h
index 3471b439b..024691ada 100644
--- a/src/xnnpack/maxpool.h
+++ b/src/xnnpack/maxpool.h
@@ -32,6 +32,7 @@ extern "C" {
       const union xnn_f16_minmax_params* params);
 
 DECLARE_F16_MAXPOOL_MINMAX_UKERNEL_FUNCTION(xnn_f16_maxpool_minmax_ukernel_9p8x__neonfp16arith_c8)
+DECLARE_F16_MAXPOOL_MINMAX_UKERNEL_FUNCTION(xnn_f16_maxpool_minmax_ukernel_9p8x__f16c_c8)
 
 
 #define DECLARE_F32_MAXPOOL_MINMAX_UKERNEL_FUNCTION(fn_name) \
diff --git a/test/f16-maxpool-minmax.cc b/test/f16-maxpool-minmax.cc
index 90771c038..eced14363 100644
--- a/test/f16-maxpool-minmax.cc
+++ b/test/f16-maxpool-minmax.cc
@@ -905,3 +905,890 @@
     }
   }
 #endif  // XNN_ARCH_ARM64
+
+
+#if XNN_ARCH_X86 || XNN_ARCH_X86_64
+  TEST(F16_MAXPOOL_MINMAX_9P8X__F16C_C8, channels_eq_8_unipass_fulltile) {
+    TEST_REQUIRES_X86_F16C;
+    MaxPoolMicrokernelTester()
+      .pooling_elements(9)
+      .pooling_tile(9, 8)
+      .channels(8)
+      .Test(xnn_f16_maxpool_minmax_ukernel_9p8x__f16c_c8, xnn_init_f16_minmax_avx_params);
+  }
+
+  TEST(F16_MAXPOOL_MINMAX_9P8X__F16C_C8, channels_eq_8_unipass_fulltile_with_input_offset) {
+    TEST_REQUIRES_X86_F16C;
+    MaxPoolMicrokernelTester()
+      .pooling_elements(9)
+      .pooling_tile(9, 8)
+      .channels(8)
+      .input_offset(11)
+      .Test(xnn_f16_maxpool_minmax_ukernel_9p8x__f16c_c8, xnn_init_f16_minmax_avx_params);
+  }
+
+  TEST(F16_MAXPOOL_MINMAX_9P8X__F16C_C8, channels_eq_8_unipass_fulltile_with_qmin) {
+    TEST_REQUIRES_X86_F16C;
+    MaxPoolMicrokernelTester()
+      .pooling_elements(9)
+      .pooling_tile(9, 8)
+      .channels(8)
+      .qmin(192)
+      .Test(xnn_f16_maxpool_minmax_ukernel_9p8x__f16c_c8, xnn_init_f16_minmax_avx_params);
+  }
+
+  TEST(F16_MAXPOOL_MINMAX_9P8X__F16C_C8, channels_eq_8_unipass_fulltile_with_qmax) {
+    TEST_REQUIRES_X86_F16C;
+    MaxPoolMicrokernelTester()
+      .pooling_elements(9)
+      .pooling_tile(9, 8)
+      .channels(8)
+      .qmax(192)
+      .Test(xnn_f16_maxpool_minmax_ukernel_9p8x__f16c_c8, xnn_init_f16_minmax_avx_params);
+  }
+
+  TEST(F16_MAXPOOL_MINMAX_9P8X__F16C_C8, channels_eq_8_unipass_subtile) {
+    TEST_REQUIRES_X86_F16C;
+    for (size_t pooling_elements = 2; pooling_elements < 9; pooling_elements++) {
+      MaxPoolMicrokernelTester()
+        .pooling_elements(pooling_elements)
+        .pooling_tile(9, 8)
+        .channels(8)
+        .Test(xnn_f16_maxpool_minmax_ukernel_9p8x__f16c_c8, xnn_init_f16_minmax_avx_params);
+    }
+  }
+
+  TEST(F16_MAXPOOL_MINMAX_9P8X__F16C_C8, channels_eq_8_unipass_subtile_with_input_offset) {
+    TEST_REQUIRES_X86_F16C;
+    for (size_t pooling_elements = 2; pooling_elements < 9; pooling_elements++) {
+      MaxPoolMicrokernelTester()
+        .pooling_elements(pooling_elements)
+        .pooling_tile(9, 8)
+        .channels(8)
+        .input_offset(11)
+        .Test(xnn_f16_maxpool_minmax_ukernel_9p8x__f16c_c8, xnn_init_f16_minmax_avx_params);
+    }
+  }
+
+  TEST(F16_MAXPOOL_MINMAX_9P8X__F16C_C8, channels_div_8_unipass_fulltile) {
+    TEST_REQUIRES_X86_F16C;
+    for (size_t channels = 16; channels < 64; channels += 8) {
+      MaxPoolMicrokernelTester()
+        .pooling_elements(9)
+        .pooling_tile(9, 8)
+        .channels(channels)
+        .Test(xnn_f16_maxpool_minmax_ukernel_9p8x__f16c_c8, xnn_init_f16_minmax_avx_params);
+    }
+  }
+
+  TEST(F16_MAXPOOL_MINMAX_9P8X__F16C_C8, channels_div_8_unipass_fulltile_with_input_offset) {
+    TEST_REQUIRES_X86_F16C;
+    for (size_t channels = 16; channels < 64; channels += 8) {
+      MaxPoolMicrokernelTester()
+        .pooling_elements(9)
+        .pooling_tile(9, 8)
+        .channels(channels)
+        .input_offset(67)
+        .Test(xnn_f16_maxpool_minmax_ukernel_9p8x__f16c_c8, xnn_init_f16_minmax_avx_params);
+    }
+  }
+
+  TEST(F16_MAXPOOL_MINMAX_9P8X__F16C_C8, channels_div_8_unipass_fulltile_with_qmin) {
+    TEST_REQUIRES_X86_F16C;
+    for (size_t channels = 16; channels < 64; channels += 8) {
+      MaxPoolMicrokernelTester()
+        .pooling_elements(9)
+        .pooling_tile(9, 8)
+        .channels(channels)
+        .qmin(192)
+        .Test(xnn_f16_maxpool_minmax_ukernel_9p8x__f16c_c8, xnn_init_f16_minmax_avx_params);
+    }
+  }
+
+  TEST(F16_MAXPOOL_MINMAX_9P8X__F16C_C8, channels_div_8_unipass_fulltile_with_qmax) {
+    TEST_REQUIRES_X86_F16C;
+    for (size_t channels = 16; channels < 64; channels += 8) {
+      MaxPoolMicrokernelTester()
+        .pooling_elements(9)
+        .pooling_tile(9, 8)
+        .channels(channels)
+        .qmax(192)
+        .Test(xnn_f16_maxpool_minmax_ukernel_9p8x__f16c_c8, xnn_init_f16_minmax_avx_params);
+    }
+  }
+
+  TEST(F16_MAXPOOL_MINMAX_9P8X__F16C_C8, channels_div_8_unipass_subtile) {
+    TEST_REQUIRES_X86_F16C;
+    for (size_t pooling_elements = 2; pooling_elements < 9; pooling_elements++) {
+      for (size_t channels = 16; channels < 64; channels += 8) {
+        MaxPoolMicrokernelTester()
+          .pooling_elements(pooling_elements)
+          .pooling_tile(9, 8)
+          .channels(channels)
+          .Test(xnn_f16_maxpool_minmax_ukernel_9p8x__f16c_c8, xnn_init_f16_minmax_avx_params);
+      }
+    }
+  }
+
+  TEST(F16_MAXPOOL_MINMAX_9P8X__F16C_C8, channels_div_8_unipass_subtile_with_input_offset) {
+    TEST_REQUIRES_X86_F16C;
+    for (size_t pooling_elements = 2; pooling_elements < 9; pooling_elements++) {
+      for (size_t channels = 16; channels < 64; channels += 8) {
+        MaxPoolMicrokernelTester()
+          .pooling_elements(pooling_elements)
+          .pooling_tile(9, 8)
+          .channels(channels)
+          .input_offset(67)
+          .Test(xnn_f16_maxpool_minmax_ukernel_9p8x__f16c_c8, xnn_init_f16_minmax_avx_params);
+      }
+    }
+  }
+
+  TEST(F16_MAXPOOL_MINMAX_9P8X__F16C_C8, channels_lt_8_unipass_fulltile) {
+    TEST_REQUIRES_X86_F16C;
+    for (size_t channels = 1; channels < 8; channels++) {
+      MaxPoolMicrokernelTester()
+        .pooling_elements(9)
+        .pooling_tile(9, 8)
+        .channels(channels)
+        .Test(xnn_f16_maxpool_minmax_ukernel_9p8x__f16c_c8, xnn_init_f16_minmax_avx_params);
+    }
+  }
+
+  TEST(F16_MAXPOOL_MINMAX_9P8X__F16C_C8, channels_lt_8_unipass_fulltile_with_input_offset) {
+    TEST_REQUIRES_X86_F16C;
+    for (size_t channels = 1; channels < 8; channels++) {
+      MaxPoolMicrokernelTester()
+        .pooling_elements(9)
+        .pooling_tile(9, 8)
+        .channels(channels)
+        .input_offset(11)
+        .Test(xnn_f16_maxpool_minmax_ukernel_9p8x__f16c_c8, xnn_init_f16_minmax_avx_params);
+    }
+  }
+
+  TEST(F16_MAXPOOL_MINMAX_9P8X__F16C_C8, channels_lt_8_unipass_fulltile_with_qmin) {
+    TEST_REQUIRES_X86_F16C;
+    for (size_t channels = 1; channels < 8; channels++) {
+      MaxPoolMicrokernelTester()
+        .pooling_elements(9)
+        .pooling_tile(9, 8)
+        .channels(channels)
+        .qmin(192)
+        .Test(xnn_f16_maxpool_minmax_ukernel_9p8x__f16c_c8, xnn_init_f16_minmax_avx_params);
+    }
+  }
+
+  TEST(F16_MAXPOOL_MINMAX_9P8X__F16C_C8, channels_lt_8_unipass_fulltile_with_qmax) {
+    TEST_REQUIRES_X86_F16C;
+    for (size_t channels = 1; channels < 8; channels++) {
+      MaxPoolMicrokernelTester()
+        .pooling_elements(9)
+        .pooling_tile(9, 8)
+        .channels(channels)
+        .qmax(192)
+        .Test(xnn_f16_maxpool_minmax_ukernel_9p8x__f16c_c8, xnn_init_f16_minmax_avx_params);
+    }
+  }
+
+  TEST(F16_MAXPOOL_MINMAX_9P8X__F16C_C8, channels_lt_8_unipass_subtile) {
+    TEST_REQUIRES_X86_F16C;
+    for (size_t pooling_elements = 2; pooling_elements < 9; pooling_elements++) {
+      for (size_t channels = 1; channels < 8; channels++) {
+        MaxPoolMicrokernelTester()
+          .pooling_elements(pooling_elements)
+          .pooling_tile(9, 8)
+          .channels(channels)
+          .Test(xnn_f16_maxpool_minmax_ukernel_9p8x__f16c_c8, xnn_init_f16_minmax_avx_params);
+      }
+    }
+  }
+
+  TEST(F16_MAXPOOL_MINMAX_9P8X__F16C_C8, channels_lt_8_unipass_subtile_with_input_offset) {
+    TEST_REQUIRES_X86_F16C;
+    for (size_t pooling_elements = 2; pooling_elements < 9; pooling_elements++) {
+      for (size_t channels = 1; channels < 8; channels++) {
+        MaxPoolMicrokernelTester()
+          .pooling_elements(pooling_elements)
+          .pooling_tile(9, 8)
+          .channels(channels)
+          .input_offset(11)
+          .Test(xnn_f16_maxpool_minmax_ukernel_9p8x__f16c_c8, xnn_init_f16_minmax_avx_params);
+      }
+    }
+  }
+
+  TEST(F16_MAXPOOL_MINMAX_9P8X__F16C_C8, channels_gt_8_unipass_fulltile) {
+    TEST_REQUIRES_X86_F16C;
+    for (size_t channels = 9; channels < 16; channels++) {
+      MaxPoolMicrokernelTester()
+        .pooling_elements(9)
+        .pooling_tile(9, 8)
+        .channels(channels)
+        .Test(xnn_f16_maxpool_minmax_ukernel_9p8x__f16c_c8, xnn_init_f16_minmax_avx_params);
+    }
+  }
+
+  TEST(F16_MAXPOOL_MINMAX_9P8X__F16C_C8, channels_gt_8_unipass_fulltile_with_input_offset) {
+    TEST_REQUIRES_X86_F16C;
+    for (size_t channels = 9; channels < 16; channels++) {
+      MaxPoolMicrokernelTester()
+        .pooling_elements(9)
+        .pooling_tile(9, 8)
+        .channels(channels)
+        .input_offset(17)
+        .Test(xnn_f16_maxpool_minmax_ukernel_9p8x__f16c_c8, xnn_init_f16_minmax_avx_params);
+    }
+  }
+
+  TEST(F16_MAXPOOL_MINMAX_9P8X__F16C_C8, channels_gt_8_unipass_fulltile_with_qmin) {
+    TEST_REQUIRES_X86_F16C;
+    for (size_t channels = 9; channels < 16; channels++) {
+      MaxPoolMicrokernelTester()
+        .pooling_elements(9)
+        .pooling_tile(9, 8)
+        .channels(channels)
+        .qmin(192)
+        .Test(xnn_f16_maxpool_minmax_ukernel_9p8x__f16c_c8, xnn_init_f16_minmax_avx_params);
+    }
+  }
+
+  TEST(F16_MAXPOOL_MINMAX_9P8X__F16C_C8, channels_gt_8_unipass_fulltile_with_qmax) {
+    TEST_REQUIRES_X86_F16C;
+    for (size_t channels = 9; channels < 16; channels++) {
+      MaxPoolMicrokernelTester()
+        .pooling_elements(9)
+        .pooling_tile(9, 8)
+        .channels(channels)
+        .qmax(192)
+        .Test(xnn_f16_maxpool_minmax_ukernel_9p8x__f16c_c8, xnn_init_f16_minmax_avx_params);
+    }
+  }
+
+  TEST(F16_MAXPOOL_MINMAX_9P8X__F16C_C8, channels_gt_8_unipass_subtile) {
+    TEST_REQUIRES_X86_F16C;
+    for (size_t pooling_elements = 2; pooling_elements < 9; pooling_elements++) {
+      for (size_t channels = 9; channels < 16; channels++) {
+        MaxPoolMicrokernelTester()
+          .pooling_elements(pooling_elements)
+          .pooling_tile(9, 8)
+          .channels(channels)
+          .Test(xnn_f16_maxpool_minmax_ukernel_9p8x__f16c_c8, xnn_init_f16_minmax_avx_params);
+      }
+    }
+  }
+
+  TEST(F16_MAXPOOL_MINMAX_9P8X__F16C_C8, channels_gt_8_unipass_subtile_with_input_offset) {
+    TEST_REQUIRES_X86_F16C;
+    for (size_t pooling_elements = 2; pooling_elements < 9; pooling_elements++) {
+      for (size_t channels = 9; channels < 16; channels++) {
+        MaxPoolMicrokernelTester()
+          .pooling_elements(pooling_elements)
+          .pooling_tile(9, 8)
+          .channels(channels)
+          .input_offset(17)
+          .Test(xnn_f16_maxpool_minmax_ukernel_9p8x__f16c_c8, xnn_init_f16_minmax_avx_params);
+      }
+    }
+  }
+
+  TEST(F16_MAXPOOL_MINMAX_9P8X__F16C_C8, channels_eq_8_twopass_fulltile) {
+    TEST_REQUIRES_X86_F16C;
+    MaxPoolMicrokernelTester()
+      .pooling_elements(17)
+      .pooling_tile(9, 8)
+      .channels(8)
+      .Test(xnn_f16_maxpool_minmax_ukernel_9p8x__f16c_c8, xnn_init_f16_minmax_avx_params);
+  }
+
+  TEST(F16_MAXPOOL_MINMAX_9P8X__F16C_C8, channels_eq_8_twopass_fulltile_with_input_offset) {
+    TEST_REQUIRES_X86_F16C;
+    MaxPoolMicrokernelTester()
+      .pooling_elements(17)
+      .pooling_tile(9, 8)
+      .channels(8)
+      .input_offset(11)
+      .Test(xnn_f16_maxpool_minmax_ukernel_9p8x__f16c_c8, xnn_init_f16_minmax_avx_params);
+  }
+
+  TEST(F16_MAXPOOL_MINMAX_9P8X__F16C_C8, channels_eq_8_twopass_fulltile_with_qmin) {
+    TEST_REQUIRES_X86_F16C;
+    MaxPoolMicrokernelTester()
+      .pooling_elements(17)
+      .pooling_tile(9, 8)
+      .channels(8)
+      .qmin(192)
+      .Test(xnn_f16_maxpool_minmax_ukernel_9p8x__f16c_c8, xnn_init_f16_minmax_avx_params);
+  }
+
+  TEST(F16_MAXPOOL_MINMAX_9P8X__F16C_C8, channels_eq_8_twopass_fulltile_with_qmax) {
+    TEST_REQUIRES_X86_F16C;
+    MaxPoolMicrokernelTester()
+      .pooling_elements(17)
+      .pooling_tile(9, 8)
+      .channels(8)
+      .qmax(192)
+      .Test(xnn_f16_maxpool_minmax_ukernel_9p8x__f16c_c8, xnn_init_f16_minmax_avx_params);
+  }
+
+  TEST(F16_MAXPOOL_MINMAX_9P8X__F16C_C8, channels_eq_8_twopass_subtile) {
+    TEST_REQUIRES_X86_F16C;
+    for (size_t pooling_elements = 10; pooling_elements < 17; pooling_elements++) {
+      MaxPoolMicrokernelTester()
+        .pooling_elements(pooling_elements)
+        .pooling_tile(9, 8)
+        .channels(8)
+        .Test(xnn_f16_maxpool_minmax_ukernel_9p8x__f16c_c8, xnn_init_f16_minmax_avx_params);
+    }
+  }
+
+  TEST(F16_MAXPOOL_MINMAX_9P8X__F16C_C8, channels_eq_8_twopass_subtile_with_input_offset) {
+    TEST_REQUIRES_X86_F16C;
+    for (size_t pooling_elements = 10; pooling_elements < 17; pooling_elements++) {
+      MaxPoolMicrokernelTester()
+        .pooling_elements(pooling_elements)
+        .pooling_tile(9, 8)
+        .channels(8)
+        .input_offset(11)
+        .Test(xnn_f16_maxpool_minmax_ukernel_9p8x__f16c_c8, xnn_init_f16_minmax_avx_params);
+    }
+  }
+
+  TEST(F16_MAXPOOL_MINMAX_9P8X__F16C_C8, channels_div_8_twopass_fulltile) {
+    TEST_REQUIRES_X86_F16C;
+    for (size_t channels = 16; channels < 64; channels += 8) {
+      MaxPoolMicrokernelTester()
+        .pooling_elements(17)
+        .pooling_tile(9, 8)
+        .channels(channels)
+        .Test(xnn_f16_maxpool_minmax_ukernel_9p8x__f16c_c8, xnn_init_f16_minmax_avx_params);
+    }
+  }
+
+  TEST(F16_MAXPOOL_MINMAX_9P8X__F16C_C8, channels_div_8_twopass_fulltile_with_input_offset) {
+    TEST_REQUIRES_X86_F16C;
+    for (size_t channels = 16; channels < 64; channels += 8) {
+      MaxPoolMicrokernelTester()
+        .pooling_elements(17)
+        .pooling_tile(9, 8)
+        .channels(channels)
+        .input_offset(41)
+        .Test(xnn_f16_maxpool_minmax_ukernel_9p8x__f16c_c8, xnn_init_f16_minmax_avx_params);
+    }
+  }
+
+  TEST(F16_MAXPOOL_MINMAX_9P8X__F16C_C8, channels_div_8_twopass_fulltile_with_qmin) {
+    TEST_REQUIRES_X86_F16C;
+    for (size_t channels = 16; channels < 64; channels += 8) {
+      MaxPoolMicrokernelTester()
+        .pooling_elements(17)
+        .pooling_tile(9, 8)
+        .channels(channels)
+        .qmin(192)
+        .Test(xnn_f16_maxpool_minmax_ukernel_9p8x__f16c_c8, xnn_init_f16_minmax_avx_params);
+    }
+  }
+
+  TEST(F16_MAXPOOL_MINMAX_9P8X__F16C_C8, channels_div_8_twopass_fulltile_with_qmax) {
+    TEST_REQUIRES_X86_F16C;
+    for (size_t channels = 16; channels < 64; channels += 8) {
+      MaxPoolMicrokernelTester()
+        .pooling_elements(17)
+        .pooling_tile(9, 8)
+        .channels(channels)
+        .qmax(192)
+        .Test(xnn_f16_maxpool_minmax_ukernel_9p8x__f16c_c8, xnn_init_f16_minmax_avx_params);
+    }
+  }
+
+  TEST(F16_MAXPOOL_MINMAX_9P8X__F16C_C8, channels_div_8_twopass_subtile) {
+    TEST_REQUIRES_X86_F16C;
+    for (size_t pooling_elements = 10; pooling_elements < 17; pooling_elements++) {
+      for (size_t channels = 16; channels < 64; channels += 8) {
+        MaxPoolMicrokernelTester()
+          .pooling_elements(pooling_elements)
+          .pooling_tile(9, 8)
+          .channels(channels)
+          .Test(xnn_f16_maxpool_minmax_ukernel_9p8x__f16c_c8, xnn_init_f16_minmax_avx_params);
+      }
+    }
+  }
+
+  TEST(F16_MAXPOOL_MINMAX_9P8X__F16C_C8, channels_div_8_twopass_subtile_with_input_offset) {
+    TEST_REQUIRES_X86_F16C;
+    for (size_t pooling_elements = 10; pooling_elements < 17; pooling_elements++) {
+      for (size_t channels = 16; channels < 64; channels += 8) {
+        MaxPoolMicrokernelTester()
+          .pooling_elements(pooling_elements)
+          .pooling_tile(9, 8)
+          .channels(channels)
+          .input_offset(67)
+          .Test(xnn_f16_maxpool_minmax_ukernel_9p8x__f16c_c8, xnn_init_f16_minmax_avx_params);
+      }
+    }
+  }
+
+  TEST(F16_MAXPOOL_MINMAX_9P8X__F16C_C8, channels_lt_8_twopass_fulltile) {
+    TEST_REQUIRES_X86_F16C;
+    for (size_t channels = 1; channels < 8; channels++) {
+      MaxPoolMicrokernelTester()
+        .pooling_elements(17)
+        .pooling_tile(9, 8)
+        .channels(channels)
+        .Test(xnn_f16_maxpool_minmax_ukernel_9p8x__f16c_c8, xnn_init_f16_minmax_avx_params);
+    }
+  }
+
+  TEST(F16_MAXPOOL_MINMAX_9P8X__F16C_C8, channels_lt_8_twopass_fulltile_with_input_offset) {
+    TEST_REQUIRES_X86_F16C;
+    for (size_t channels = 1; channels < 8; channels++) {
+      MaxPoolMicrokernelTester()
+        .pooling_elements(17)
+        .pooling_tile(9, 8)
+        .channels(channels)
+        .input_offset(11)
+        .Test(xnn_f16_maxpool_minmax_ukernel_9p8x__f16c_c8, xnn_init_f16_minmax_avx_params);
+    }
+  }
+
+  TEST(F16_MAXPOOL_MINMAX_9P8X__F16C_C8, channels_lt_8_twopass_fulltile_with_qmin) {
+    TEST_REQUIRES_X86_F16C;
+    for (size_t channels = 1; channels < 8; channels++) {
+      MaxPoolMicrokernelTester()
+        .pooling_elements(17)
+        .pooling_tile(9, 8)
+        .channels(channels)
+        .qmin(192)
+        .Test(xnn_f16_maxpool_minmax_ukernel_9p8x__f16c_c8, xnn_init_f16_minmax_avx_params);
+    }
+  }
+
+  TEST(F16_MAXPOOL_MINMAX_9P8X__F16C_C8, channels_lt_8_twopass_fulltile_with_qmax) {
+    TEST_REQUIRES_X86_F16C;
+    for (size_t channels = 1; channels < 8; channels++) {
+      MaxPoolMicrokernelTester()
+        .pooling_elements(17)
+        .pooling_tile(9, 8)
+        .channels(channels)
+        .qmax(192)
+        .Test(xnn_f16_maxpool_minmax_ukernel_9p8x__f16c_c8, xnn_init_f16_minmax_avx_params);
+    }
+  }
+
+  TEST(F16_MAXPOOL_MINMAX_9P8X__F16C_C8, channels_lt_8_twopass_subtile) {
+    TEST_REQUIRES_X86_F16C;
+    for (size_t pooling_elements = 10; pooling_elements < 17; pooling_elements++) {
+      for (size_t channels = 1; channels < 8; channels++) {
+        MaxPoolMicrokernelTester()
+          .pooling_elements(pooling_elements)
+          .pooling_tile(9, 8)
+          .channels(channels)
+          .Test(xnn_f16_maxpool_minmax_ukernel_9p8x__f16c_c8, xnn_init_f16_minmax_avx_params);
+      }
+    }
+  }
+
+  TEST(F16_MAXPOOL_MINMAX_9P8X__F16C_C8, channels_lt_8_twopass_subtile_with_input_offset) {
+    TEST_REQUIRES_X86_F16C;
+    for (size_t pooling_elements = 10; pooling_elements < 17; pooling_elements++) {
+      for (size_t channels = 1; channels < 8; channels++) {
+        MaxPoolMicrokernelTester()
+          .pooling_elements(pooling_elements)
+          .pooling_tile(9, 8)
+          .channels(channels)
+          .input_offset(11)
+          .Test(xnn_f16_maxpool_minmax_ukernel_9p8x__f16c_c8, xnn_init_f16_minmax_avx_params);
+      }
+    }
+  }
+
+  TEST(F16_MAXPOOL_MINMAX_9P8X__F16C_C8, channels_gt_8_twopass_fulltile) {
+    TEST_REQUIRES_X86_F16C;
+    for (size_t channels = 9; channels < 16; channels++) {
+      MaxPoolMicrokernelTester()
+        .pooling_elements(17)
+        .pooling_tile(9, 8)
+        .channels(channels)
+        .Test(xnn_f16_maxpool_minmax_ukernel_9p8x__f16c_c8, xnn_init_f16_minmax_avx_params);
+    }
+  }
+
+  TEST(F16_MAXPOOL_MINMAX_9P8X__F16C_C8, channels_gt_8_twopass_fulltile_with_input_offset) {
+    TEST_REQUIRES_X86_F16C;
+    for (size_t channels = 9; channels < 16; channels++) {
+      MaxPoolMicrokernelTester()
+        .pooling_elements(17)
+        .pooling_tile(9, 8)
+        .channels(channels)
+        .input_offset(17)
+        .Test(xnn_f16_maxpool_minmax_ukernel_9p8x__f16c_c8, xnn_init_f16_minmax_avx_params);
+    }
+  }
+
+  TEST(F16_MAXPOOL_MINMAX_9P8X__F16C_C8, channels_gt_8_twopass_fulltile_with_qmin) {
+    TEST_REQUIRES_X86_F16C;
+    for (size_t channels = 9; channels < 16; channels++) {
+      MaxPoolMicrokernelTester()
+        .pooling_elements(17)
+        .pooling_tile(9, 8)
+        .channels(channels)
+        .qmin(192)
+        .Test(xnn_f16_maxpool_minmax_ukernel_9p8x__f16c_c8, xnn_init_f16_minmax_avx_params);
+    }
+  }
+
+  TEST(F16_MAXPOOL_MINMAX_9P8X__F16C_C8, channels_gt_8_twopass_fulltile_with_qmax) {
+    TEST_REQUIRES_X86_F16C;
+    for (size_t channels = 9; channels < 16; channels++) {
+      MaxPoolMicrokernelTester()
+        .pooling_elements(17)
+        .pooling_tile(9, 8)
+        .channels(channels)
+        .qmax(192)
+        .Test(xnn_f16_maxpool_minmax_ukernel_9p8x__f16c_c8, xnn_init_f16_minmax_avx_params);
+    }
+  }
+
+  TEST(F16_MAXPOOL_MINMAX_9P8X__F16C_C8, channels_gt_8_twopass_subtile) {
+    TEST_REQUIRES_X86_F16C;
+    for (size_t pooling_elements = 10; pooling_elements < 17; pooling_elements++) {
+      for (size_t channels = 9; channels < 16; channels++) {
+        MaxPoolMicrokernelTester()
+          .pooling_elements(pooling_elements)
+          .pooling_tile(9, 8)
+          .channels(channels)
+          .Test(xnn_f16_maxpool_minmax_ukernel_9p8x__f16c_c8, xnn_init_f16_minmax_avx_params);
+      }
+    }
+  }
+
+  TEST(F16_MAXPOOL_MINMAX_9P8X__F16C_C8, channels_gt_8_twopass_subtile_with_input_offset) {
+    TEST_REQUIRES_X86_F16C;
+    for (size_t pooling_elements = 10; pooling_elements < 17; pooling_elements++) {
+      for (size_t channels = 9; channels < 16; channels++) {
+        MaxPoolMicrokernelTester()
+          .pooling_elements(pooling_elements)
+          .pooling_tile(9, 8)
+          .channels(channels)
+          .input_offset(17)
+          .Test(xnn_f16_maxpool_minmax_ukernel_9p8x__f16c_c8, xnn_init_f16_minmax_avx_params);
+      }
+    }
+  }
+
+  TEST(F16_MAXPOOL_MINMAX_9P8X__F16C_C8, channels_eq_8_multipass) {
+    TEST_REQUIRES_X86_F16C;
+    for (size_t pooling_elements = 18; pooling_elements <= 33; pooling_elements += 3) {
+      MaxPoolMicrokernelTester()
+        .pooling_elements(pooling_elements)
+        .pooling_tile(9, 8)
+        .channels(8)
+        .Test(xnn_f16_maxpool_minmax_ukernel_9p8x__f16c_c8, xnn_init_f16_minmax_avx_params);
+    }
+  }
+
+  TEST(F16_MAXPOOL_MINMAX_9P8X__F16C_C8, channels_eq_8_multipass_with_input_offset) {
+    TEST_REQUIRES_X86_F16C;
+    for (size_t pooling_elements = 18; pooling_elements <= 33; pooling_elements += 3) {
+      MaxPoolMicrokernelTester()
+        .pooling_elements(pooling_elements)
+        .pooling_tile(9, 8)
+        .channels(8)
+        .input_offset(11)
+        .Test(xnn_f16_maxpool_minmax_ukernel_9p8x__f16c_c8, xnn_init_f16_minmax_avx_params);
+    }
+  }
+
+  TEST(F16_MAXPOOL_MINMAX_9P8X__F16C_C8, channels_eq_8_multipass_with_qmin) {
+    TEST_REQUIRES_X86_F16C;
+    for (size_t pooling_elements = 18; pooling_elements <= 33; pooling_elements += 3) {
+      MaxPoolMicrokernelTester()
+        .pooling_elements(pooling_elements)
+        .pooling_tile(9, 8)
+        .channels(8)
+        .qmin(192)
+        .Test(xnn_f16_maxpool_minmax_ukernel_9p8x__f16c_c8, xnn_init_f16_minmax_avx_params);
+    }
+  }
+
+  TEST(F16_MAXPOOL_MINMAX_9P8X__F16C_C8, channels_eq_8_multipass_with_qmax) {
+    TEST_REQUIRES_X86_F16C;
+    for (size_t pooling_elements = 18; pooling_elements <= 33; pooling_elements += 3) {
+      MaxPoolMicrokernelTester()
+        .pooling_elements(pooling_elements)
+        .pooling_tile(9, 8)
+        .channels(8)
+        .qmax(192)
+        .Test(xnn_f16_maxpool_minmax_ukernel_9p8x__f16c_c8, xnn_init_f16_minmax_avx_params);
+    }
+  }
+
+  TEST(F16_MAXPOOL_MINMAX_9P8X__F16C_C8, channels_div_8_multipass) {
+    TEST_REQUIRES_X86_F16C;
+    for (size_t pooling_elements = 18; pooling_elements <= 33; pooling_elements += 3) {
+      for (size_t channels = 16; channels < 64; channels += 8) {
+        MaxPoolMicrokernelTester()
+          .pooling_elements(pooling_elements)
+          .pooling_tile(9, 8)
+          .channels(channels)
+          .Test(xnn_f16_maxpool_minmax_ukernel_9p8x__f16c_c8, xnn_init_f16_minmax_avx_params);
+      }
+    }
+  }
+
+  TEST(F16_MAXPOOL_MINMAX_9P8X__F16C_C8, channels_div_8_multipass_with_input_offset) {
+    TEST_REQUIRES_X86_F16C;
+    for (size_t pooling_elements = 18; pooling_elements <= 33; pooling_elements += 3) {
+      for (size_t channels = 16; channels < 64; channels += 8) {
+        MaxPoolMicrokernelTester()
+          .pooling_elements(pooling_elements)
+          .pooling_tile(9, 8)
+          .channels(channels)
+          .input_offset(67)
+          .Test(xnn_f16_maxpool_minmax_ukernel_9p8x__f16c_c8, xnn_init_f16_minmax_avx_params);
+      }
+    }
+  }
+
+  TEST(F16_MAXPOOL_MINMAX_9P8X__F16C_C8, channels_div_8_multipass_with_qmin) {
+    TEST_REQUIRES_X86_F16C;
+    for (size_t pooling_elements = 18; pooling_elements <= 33; pooling_elements += 3) {
+      for (size_t channels = 16; channels < 64; channels += 8) {
+        MaxPoolMicrokernelTester()
+          .pooling_elements(pooling_elements)
+          .pooling_tile(9, 8)
+          .channels(channels)
+          .qmin(192)
+          .Test(xnn_f16_maxpool_minmax_ukernel_9p8x__f16c_c8, xnn_init_f16_minmax_avx_params);
+      }
+    }
+  }
+
+  TEST(F16_MAXPOOL_MINMAX_9P8X__F16C_C8, channels_div_8_multipass_with_qmax) {
+    TEST_REQUIRES_X86_F16C;
+    for (size_t pooling_elements = 18; pooling_elements <= 33; pooling_elements += 3) {
+      for (size_t channels = 16; channels < 64; channels += 8) {
+        MaxPoolMicrokernelTester()
+          .pooling_elements(pooling_elements)
+          .pooling_tile(9, 8)
+          .channels(channels)
+          .qmax(192)
+          .Test(xnn_f16_maxpool_minmax_ukernel_9p8x__f16c_c8, xnn_init_f16_minmax_avx_params);
+      }
+    }
+  }
+
+  TEST(F16_MAXPOOL_MINMAX_9P8X__F16C_C8, channels_lt_8_multipass) {
+    TEST_REQUIRES_X86_F16C;
+    for (size_t pooling_elements = 18; pooling_elements <= 33; pooling_elements += 3) {
+      for (size_t channels = 1; channels < 8; channels++) {
+        MaxPoolMicrokernelTester()
+          .pooling_elements(pooling_elements)
+          .pooling_tile(9, 8)
+          .channels(channels)
+          .Test(xnn_f16_maxpool_minmax_ukernel_9p8x__f16c_c8, xnn_init_f16_minmax_avx_params);
+      }
+    }
+  }
+
+  TEST(F16_MAXPOOL_MINMAX_9P8X__F16C_C8, channels_lt_8_multipass_with_input_offset) {
+    TEST_REQUIRES_X86_F16C;
+    for (size_t pooling_elements = 18; pooling_elements <= 33; pooling_elements += 3) {
+      for (size_t channels = 1; channels < 8; channels++) {
+        MaxPoolMicrokernelTester()
+          .pooling_elements(pooling_elements)
+          .pooling_tile(9, 8)
+          .channels(channels)
+          .input_offset(8)
+          .Test(xnn_f16_maxpool_minmax_ukernel_9p8x__f16c_c8, xnn_init_f16_minmax_avx_params);
+      }
+    }
+  }
+
+  TEST(F16_MAXPOOL_MINMAX_9P8X__F16C_C8, channels_lt_8_multipass_with_qmin) {
+    TEST_REQUIRES_X86_F16C;
+    for (size_t pooling_elements = 18; pooling_elements <= 33; pooling_elements += 3) {
+      for (size_t channels = 1; channels < 8; channels++) {
+        MaxPoolMicrokernelTester()
+          .pooling_elements(pooling_elements)
+          .pooling_tile(9, 8)
+          .channels(channels)
+          .qmin(192)
+          .Test(xnn_f16_maxpool_minmax_ukernel_9p8x__f16c_c8, xnn_init_f16_minmax_avx_params);
+      }
+    }
+  }
+
+  TEST(F16_MAXPOOL_MINMAX_9P8X__F16C_C8, channels_lt_8_multipass_with_qmax) {
+    TEST_REQUIRES_X86_F16C;
+    for (size_t pooling_elements = 18; pooling_elements <= 33; pooling_elements += 3) {
+      for (size_t channels = 1; channels < 8; channels++) {
+        MaxPoolMicrokernelTester()
+          .pooling_elements(pooling_elements)
+          .pooling_tile(9, 8)
+          .channels(channels)
+          .qmax(192)
+          .Test(xnn_f16_maxpool_minmax_ukernel_9p8x__f16c_c8, xnn_init_f16_minmax_avx_params);
+      }
+    }
+  }
+
+  TEST(F16_MAXPOOL_MINMAX_9P8X__F16C_C8, channels_gt_8_multipass) {
+    TEST_REQUIRES_X86_F16C;
+    for (size_t pooling_elements = 18; pooling_elements <= 33; pooling_elements += 3) {
+      for (size_t channels = 9; channels < 16; channels++) {
+        MaxPoolMicrokernelTester()
+          .pooling_elements(pooling_elements)
+          .pooling_tile(9, 8)
+          .channels(channels)
+          .Test(xnn_f16_maxpool_minmax_ukernel_9p8x__f16c_c8, xnn_init_f16_minmax_avx_params);
+      }
+    }
+  }
+
+  TEST(F16_MAXPOOL_MINMAX_9P8X__F16C_C8, channels_gt_8_multipass_with_input_offset) {
+    TEST_REQUIRES_X86_F16C;
+    for (size_t pooling_elements = 18; pooling_elements <= 33; pooling_elements += 3) {
+      for (size_t channels = 9; channels < 16; channels++) {
+        MaxPoolMicrokernelTester()
+          .pooling_elements(pooling_elements)
+          .pooling_tile(9, 8)
+          .channels(channels)
+          .input_offset(17)
+          .Test(xnn_f16_maxpool_minmax_ukernel_9p8x__f16c_c8, xnn_init_f16_minmax_avx_params);
+      }
+    }
+  }
+
+  TEST(F16_MAXPOOL_MINMAX_9P8X__F16C_C8, channels_gt_8_multipass_with_qmin) {
+    TEST_REQUIRES_X86_F16C;
+    for (size_t pooling_elements = 18; pooling_elements <= 33; pooling_elements += 3) {
+      for (size_t channels = 9; channels < 16; channels++) {
+        MaxPoolMicrokernelTester()
+          .pooling_elements(pooling_elements)
+          .pooling_tile(9, 8)
+          .channels(channels)
+          .qmin(192)
+          .Test(xnn_f16_maxpool_minmax_ukernel_9p8x__f16c_c8, xnn_init_f16_minmax_avx_params);
+      }
+    }
+  }
+
+  TEST(F16_MAXPOOL_MINMAX_9P8X__F16C_C8, channels_gt_8_multipass_with_qmax) {
+    TEST_REQUIRES_X86_F16C;
+    for (size_t pooling_elements = 18; pooling_elements <= 33; pooling_elements += 3) {
+      for (size_t channels = 9; channels < 16; channels++) {
+        MaxPoolMicrokernelTester()
+          .pooling_elements(pooling_elements)
+          .pooling_tile(9, 8)
+          .channels(channels)
+          .qmax(192)
+          .Test(xnn_f16_maxpool_minmax_ukernel_9p8x__f16c_c8, xnn_init_f16_minmax_avx_params);
+      }
+    }
+  }
+
+  TEST(F16_MAXPOOL_MINMAX_9P8X__F16C_C8, few_output_pixels) {
+    TEST_REQUIRES_X86_F16C;
+    for (size_t output_pixels = 2; output_pixels <= 5; output_pixels++) {
+      for (size_t pooling_elements : std::vector<size_t>{{2, 9, 16}}) {
+        for (size_t channels = 1; channels <= 40; channels += 7) {
+          MaxPoolMicrokernelTester()
+            .output_pixels(output_pixels)
+            .pooling_elements(pooling_elements)
+            .pooling_tile(9, 8)
+            .channels(channels)
+            .Test(xnn_f16_maxpool_minmax_ukernel_9p8x__f16c_c8, xnn_init_f16_minmax_avx_params);
+        }
+      }
+    }
+  }
+
+  TEST(F16_MAXPOOL_MINMAX_9P8X__F16C_C8, few_output_pixels_with_input_offset) {
+    TEST_REQUIRES_X86_F16C;
+    for (size_t output_pixels = 2; output_pixels <= 5; output_pixels++) {
+      for (size_t pooling_elements : std::vector<size_t>{{2, 9, 16}}) {
+        for (size_t channels = 1; channels <= 40; channels += 7) {
+          MaxPoolMicrokernelTester()
+            .output_pixels(output_pixels)
+            .pooling_elements(pooling_elements)
+            .pooling_tile(9, 8)
+            .channels(channels)
+            .input_offset(43)
+            .Test(xnn_f16_maxpool_minmax_ukernel_9p8x__f16c_c8, xnn_init_f16_minmax_avx_params);
+        }
+      }
+    }
+  }
+
+  TEST(F16_MAXPOOL_MINMAX_9P8X__F16C_C8, few_output_pixels_with_qmin) {
+    TEST_REQUIRES_X86_F16C;
+    for (size_t output_pixels = 2; output_pixels <= 5; output_pixels++) {
+      for (size_t pooling_elements : std::vector<size_t>{{2, 9, 16}}) {
+        for (size_t channels = 1; channels <= 40; channels += 7) {
+          MaxPoolMicrokernelTester()
+            .output_pixels(output_pixels)
+            .pooling_elements(pooling_elements)
+            .pooling_tile(9, 8)
+            .channels(channels)
+            .qmin(192)
+            .Test(xnn_f16_maxpool_minmax_ukernel_9p8x__f16c_c8, xnn_init_f16_minmax_avx_params);
+        }
+      }
+    }
+  }
+
+  TEST(F16_MAXPOOL_MINMAX_9P8X__F16C_C8, few_output_pixels_with_qmax) {
+    TEST_REQUIRES_X86_F16C;
+    for (size_t output_pixels = 2; output_pixels <= 5; output_pixels++) {
+      for (size_t pooling_elements : std::vector<size_t>{{2, 9, 16}}) {
+        for (size_t channels = 1; channels <= 40; channels += 7) {
+          MaxPoolMicrokernelTester()
+            .output_pixels(output_pixels)
+            .pooling_elements(pooling_elements)
+            .pooling_tile(9, 8)
+            .channels(channels)
+            .qmax(192)
+            .Test(xnn_f16_maxpool_minmax_ukernel_9p8x__f16c_c8, xnn_init_f16_minmax_avx_params);
+        }
+      }
+    }
+  }
+
+  TEST(F16_MAXPOOL_MINMAX_9P8X__F16C_C8, few_output_pixels_with_output_stride) {
+    TEST_REQUIRES_X86_F16C;
+    for (size_t output_pixels = 2; output_pixels <= 5; output_pixels++) {
+      for (size_t pooling_elements : std::vector<size_t>{{2, 9, 16}}) {
+        for (size_t channels = 1; channels <= 40; channels += 7) {
+          MaxPoolMicrokernelTester()
+            .output_pixels(output_pixels)
+            .pooling_elements(pooling_elements)
+            .pooling_tile(9, 8)
+            .channels(channels)
+            .output_stride(43)
+            .Test(xnn_f16_maxpool_minmax_ukernel_9p8x__f16c_c8, xnn_init_f16_minmax_avx_params);
+        }
+      }
+    }
+  }
+
+  TEST(F16_MAXPOOL_MINMAX_9P8X__F16C_C8, few_output_pixels_with_step) {
+    TEST_REQUIRES_X86_F16C;
+    for (size_t output_pixels = 2; output_pixels <= 5; output_pixels++) {
+      for (size_t pooling_elements : std::vector<size_t>{{2, 9, 16}}) {
+        for (size_t channels = 1; channels <= 40; channels += 7) {
+          for (size_t step = 2; step <= pooling_elements; step++) {
+            MaxPoolMicrokernelTester()
+              .output_pixels(output_pixels)
+              .pooling_elements(pooling_elements)
+              .pooling_tile(9, 8)
+              .step(step)
+              .channels(channels)
+              .output_stride(43)
+              .Test(xnn_f16_maxpool_minmax_ukernel_9p8x__f16c_c8, xnn_init_f16_minmax_avx_params);
+          }
+        }
+      }
+    }
+  }
+#endif  // XNN_ARCH_X86 || XNN_ARCH_X86_64
diff --git a/test/f16-maxpool-minmax.yaml b/test/f16-maxpool-minmax.yaml
index f503ed534..d11bf7e45 100644
--- a/test/f16-maxpool-minmax.yaml
+++ b/test/f16-maxpool-minmax.yaml
@@ -7,3 +7,5 @@
   init: xnn_init_f16_minmax_neon_params
   arch:
   - aarch64
+- name: xnn_f16_maxpool_minmax_ukernel_9p8x__f16c_c8
+  init: xnn_init_f16_minmax_avx_params