F16 MAXPOOL microkernel for NEON FP16ARITH

PiperOrigin-RevId: 426288227

10 files changed, 1320 insertions, 65 deletions

diff --git a/BUILD.bazel b/BUILD.bazel
index 36d237c70..b27844dd8 100644
--- a/BUILD.bazel
+++ b/BUILD.bazel
@@ -4484,6 +4484,7 @@ ALL_AARCH64_NEONFP16ARITH_MICROKERNEL_SRCS = [
     "src/f16-igemm/gen/6x16-minmax-neonfp16arith-ld64.c",
     "src/f16-igemm/gen/8x8-minmax-neonfp16arith-ld64.c",
     "src/f16-igemm/gen/8x16-minmax-neonfp16arith-ld64.c",
+    "src/f16-maxpool/9p8x-minmax-neonfp16arith-c8.c",
     "src/f16-prelu/gen/neonfp16arith-2x8.c",
     "src/f16-prelu/gen/neonfp16arith-2x16.c",
     "src/f16-spmm/gen/8x1-minmax-neonfp16arith-x2.c",
@@ -10814,6 +10815,15 @@ xnnpack_unit_test(
 )
 
 xnnpack_unit_test(
+    name = "f16_maxpool_minmax_test",
+    srcs = [
+        "test/f16-maxpool-minmax.cc",
+        "test/maxpool-microkernel-tester.h",
+    ] + MICROKERNEL_TEST_HDRS,
+    deps = MICROKERNEL_TEST_DEPS,
+)
+
+xnnpack_unit_test(
     name = "f16_spmm_minmax_test",
     srcs = [
         "test/f16-spmm-minmax.cc",
diff --git a/CMakeLists.txt b/CMakeLists.txt
index 0422bd419..56f02c6b9 100755
--- a/CMakeLists.txt
+++ b/CMakeLists.txt
@@ -3239,6 +3239,7 @@ SET(ALL_AARCH64_NEONFP16ARITH_MICROKERNEL_SRCS
   src/f16-igemm/gen/6x16-minmax-neonfp16arith-ld64.c
   src/f16-igemm/gen/8x8-minmax-neonfp16arith-ld64.c
   src/f16-igemm/gen/8x16-minmax-neonfp16arith-ld64.c
+  src/f16-maxpool/9p8x-minmax-neonfp16arith-c8.c
   src/f16-prelu/gen/neonfp16arith-2x8.c
   src/f16-prelu/gen/neonfp16arith-2x16.c
   src/f16-spmm/gen/8x1-minmax-neonfp16arith-x2.c
@@ -6871,6 +6872,15 @@ IF(XNNPACK_BUILD_TESTS)
   TARGET_LINK_LIBRARIES(f16-igemm-minmax-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main gemm-microkernel-tester)
   ADD_TEST(f16-igemm-minmax-test f16-igemm-minmax-test)
 
+  ADD_EXECUTABLE(f16-maxpool-minmax-test test/f16-maxpool-minmax.cc $<TARGET_OBJECTS:all_microkernels>)
+  SET_TARGET_PROPERTIES(f16-maxpool-minmax-test PROPERTIES
+    CXX_STANDARD 11
+    CXX_STANDARD_REQUIRED YES
+    CXX_EXTENSIONS YES)
+  TARGET_INCLUDE_DIRECTORIES(f16-maxpool-minmax-test PRIVATE include src test)
+  TARGET_LINK_LIBRARIES(f16-maxpool-minmax-test PRIVATE cpuinfo fp16 pthreadpool gtest gtest_main)
+  ADD_TEST(f16-maxpool-minmax-test f16-maxpool-minmax-test)
+
   ADD_EXECUTABLE(f16-spmm-minmax-test test/f16-spmm-minmax.cc $<TARGET_OBJECTS:all_microkernels>)
   SET_TARGET_PROPERTIES(f16-spmm-minmax-test PROPERTIES
     CXX_STANDARD 11
diff --git a/scripts/generate-tests.sh b/scripts/generate-tests.sh
index 2b89c0b75..12a52d492 100755
--- a/scripts/generate-tests.sh
+++ b/scripts/generate-tests.sh
@@ -13,6 +13,7 @@ tools/generate-pack-test.py --spec test/x32-packx.yaml --output test/x32-packx.c
 
 ### Tests for MaxPool micro-kernels
 tools/generate-maxpool-test.py --spec test/f32-maxpool-minmax.yaml --output test/f32-maxpool-minmax.cc &
+tools/generate-maxpool-test.py --spec test/f16-maxpool-minmax.yaml --output test/f16-maxpool-minmax.cc &
 tools/generate-maxpool-test.py --spec test/s8-maxpool-minmax.yaml --output test/s8-maxpool-minmax.cc &
 tools/generate-maxpool-test.py --spec test/u8-maxpool-minmax.yaml --output test/u8-maxpool-minmax.cc &
 
diff --git a/src/f16-maxpool/9p8x-minmax-neonfp16arith-c8.c b/src/f16-maxpool/9p8x-minmax-neonfp16arith-c8.c
new file mode 100644
index 000000000..f9d73511b
--- /dev/null
+++ b/src/f16-maxpool/9p8x-minmax-neonfp16arith-c8.c
@@ -0,0 +1,238 @@
+// Copyright 2022 Google LLC
+//
+// This source code is licensed under the BSD-style license found in the
+// LICENSE file in the root directory of this source tree.
+
+#include <assert.h>
+
+#include <arm_neon.h>
+
+#include <xnnpack/maxpool.h>
+
+
+void xnn_f16_maxpool_minmax_ukernel_9p8x__neonfp16arith_c8(
+    size_t output_pixels,
+    size_t kernel_elements,
+    size_t channels,
+    const void** input,
+    size_t input_offset,
+    void* output,
+    size_t input_increment,
+    size_t output_increment,
+    const union xnn_f16_minmax_params params[restrict XNN_MIN_ELEMENTS(1)]) XNN_OOB_READS
+{
+  assert(output_pixels != 0);
+  assert(kernel_elements != 0);
+  assert(channels != 0);
+
+  const float16x8_t voutput_min = vreinterpretq_f16_u16(vld1q_dup_u16(&params->neon.min));
+  const float16x8_t voutput_max = vreinterpretq_f16_u16(vld1q_dup_u16(&params->neon.max));
+  do {
+    __fp16* o = output;
+    {
+      const __fp16* i0 = *input++;
+      const __fp16* i1 = *input++;
+      const __fp16* i2 = *input++;
+      const __fp16* i3 = *input++;
+      const __fp16* i4 = *input++;
+      const __fp16* i5 = *input++;
+      const __fp16* i6 = *input++;
+      const __fp16* i7 = *input++;
+      const __fp16* i8 = *input++;
+      i0 = (const __fp16*) ((uintptr_t) i0 + input_offset);
+      i1 = (const __fp16*) ((uintptr_t) i1 + input_offset);
+      i2 = (const __fp16*) ((uintptr_t) i2 + input_offset);
+      i3 = (const __fp16*) ((uintptr_t) i3 + input_offset);
+      i4 = (const __fp16*) ((uintptr_t) i4 + input_offset);
+      i5 = (const __fp16*) ((uintptr_t) i5 + input_offset);
+      i6 = (const __fp16*) ((uintptr_t) i6 + input_offset);
+      i7 = (const __fp16*) ((uintptr_t) i7 + input_offset);
+      i8 = (const __fp16*) ((uintptr_t) i8 + input_offset);
+      if (kernel_elements < 2) {
+        i1 = i0;
+      }
+      if (kernel_elements <= 2) {
+        i2 = i0;
+      }
+      if (kernel_elements < 4) {
+        i3 = i0;
+      }
+      if (kernel_elements <= 4) {
+        i4 = i0;
+      }
+      if (kernel_elements < 6) {
+        i5 = i0;
+      }
+      if (kernel_elements <= 6) {
+        i6 = i0;
+      }
+      if (kernel_elements < 8) {
+        i7 = i0;
+      }
+      if (kernel_elements <= 8) {
+        i8 = i0;
+      }
+
+      size_t c = channels;
+      for (; c >= 8; c -= 8) {
+        const float16x8_t vi0 = vld1q_f16(i0); i0 += 8;
+        const float16x8_t vi1 = vld1q_f16(i1); i1 += 8;
+        const float16x8_t vi2 = vld1q_f16(i2); i2 += 8;
+        const float16x8_t vi3 = vld1q_f16(i3); i3 += 8;
+        const float16x8_t vi4 = vld1q_f16(i4); i4 += 8;
+        const float16x8_t vi5 = vld1q_f16(i5); i5 += 8;
+        const float16x8_t vi6 = vld1q_f16(i6); i6 += 8;
+        const float16x8_t vi7 = vld1q_f16(i7); i7 += 8;
+        const float16x8_t vi8 = vld1q_f16(i8); i8 += 8;
+
+        const float16x8_t vmax018 = vmaxq_f16(vmaxq_f16(vi0, vi1), vi8);
+        const float16x8_t vmax23 = vmaxq_f16(vi2, vi3);
+        const float16x8_t vmax45 = vmaxq_f16(vi4, vi5);
+        const float16x8_t vmax67 = vmaxq_f16(vi6, vi7);
+
+        const float16x8_t vmax2345 = vmaxq_f16(vmax23, vmax45);
+        const float16x8_t vmax01678 = vmaxq_f16(vmax018, vmax67);
+        const float16x8_t vmax = vmaxq_f16(vmax2345, vmax01678);
+        const float16x8_t vout = vmaxq_f16(vminq_f16(vmax, voutput_max), voutput_min);
+
+        vst1q_f16(o, vout); o += 8;
+      }
+      if (c != 0) {
+        const float16x8_t vi0 = vld1q_f16(i0); i0 += 8;
+        const float16x8_t vi1 = vld1q_f16(i1); i1 += 8;
+        const float16x8_t vi2 = vld1q_f16(i2); i2 += 8;
+        const float16x8_t vi3 = vld1q_f16(i3); i3 += 8;
+        const float16x8_t vi4 = vld1q_f16(i4); i4 += 8;
+        const float16x8_t vi5 = vld1q_f16(i5); i5 += 8;
+        const float16x8_t vi6 = vld1q_f16(i6); i6 += 8;
+        const float16x8_t vi7 = vld1q_f16(i7); i7 += 8;
+        const float16x8_t vi8 = vld1q_f16(i8); i8 += 8;
+
+        const float16x8_t vmax018 = vmaxq_f16(vmaxq_f16(vi0, vi1), vi8);
+        const float16x8_t vmax23 = vmaxq_f16(vi2, vi3);
+        const float16x8_t vmax45 = vmaxq_f16(vi4, vi5);
+        const float16x8_t vmax67 = vmaxq_f16(vi6, vi7);
+
+        const float16x8_t vmax2345 = vmaxq_f16(vmax23, vmax45);
+        const float16x8_t vmax01678 = vmaxq_f16(vmax018, vmax67);
+        const float16x8_t vmax = vmaxq_f16(vmax2345, vmax01678);
+        float16x8_t vout = vmaxq_f16(vminq_f16(vmax, voutput_max), voutput_min);
+
+        float16x4_t vout_lo = vget_low_f16(vout);
+        if (c & 4) {
+          vst1_f16(o, vout_lo); o += 4;
+          vout_lo = vget_high_f16(vout);
+        }
+        if (c & 2) {
+          vst1_lane_u32((void*) o, vreinterpret_u32_f16(vout_lo), 0); o += 2;
+          vout_lo = vext_f16(vout_lo, vout_lo, 2);
+        }
+        if (c & 1) {
+          vst1_lane_f16(o, vout_lo, 0); o += 1;
+        }
+      }
+    }
+
+    for (ptrdiff_t k = (ptrdiff_t) kernel_elements - 9; k > 0; k -= 8) {
+      const __fp16* i0 = *input++;
+      const __fp16* i1 = *input++;
+      const __fp16* i2 = *input++;
+      const __fp16* i3 = *input++;
+      const __fp16* i4 = *input++;
+      const __fp16* i5 = *input++;
+      const __fp16* i6 = *input++;
+      const __fp16* i7 = *input++;
+      i0 = (const __fp16*) ((uintptr_t) i0 + input_offset);
+      i1 = (const __fp16*) ((uintptr_t) i1 + input_offset);
+      i2 = (const __fp16*) ((uintptr_t) i2 + input_offset);
+      i3 = (const __fp16*) ((uintptr_t) i3 + input_offset);
+      i4 = (const __fp16*) ((uintptr_t) i4 + input_offset);
+      i5 = (const __fp16*) ((uintptr_t) i5 + input_offset);
+      i6 = (const __fp16*) ((uintptr_t) i6 + input_offset);
+      i7 = (const __fp16*) ((uintptr_t) i7 + input_offset);
+      if (k < 2) {
+        i1 = i0;
+      }
+      if (k <= 2) {
+        i2 = i0;
+      }
+      if (k < 4) {
+        i3 = i0;
+      }
+      if (k <= 4) {
+        i4 = i0;
+      }
+      if (k < 6) {
+        i5 = i0;
+      }
+      if (k <= 6) {
+        i6 = i0;
+      }
+      if (k < 8) {
+        i7 = i0;
+      }
+
+      o = output;
+      size_t c = channels;
+      for (; c >= 8; c -= 8) {
+        const float16x8_t vi0 = vld1q_f16(i0); i0 += 8;
+        const float16x8_t vi1 = vld1q_f16(i1); i1 += 8;
+        const float16x8_t vi2 = vld1q_f16(i2); i2 += 8;
+        const float16x8_t vi3 = vld1q_f16(i3); i3 += 8;
+        const float16x8_t vi4 = vld1q_f16(i4); i4 += 8;
+        const float16x8_t vi5 = vld1q_f16(i5); i5 += 8;
+        const float16x8_t vi6 = vld1q_f16(i6); i6 += 8;
+        const float16x8_t vi7 = vld1q_f16(i7); i7 += 8;
+        const float16x8_t vo = vld1q_f16(o);
+
+        const float16x8_t vmax01 = vmaxq_f16(vmaxq_f16(vi0, vi1), vo);
+        const float16x8_t vmax23 = vmaxq_f16(vi2, vi3);
+        const float16x8_t vmax45 = vmaxq_f16(vi4, vi5);
+        const float16x8_t vmax67 = vmaxq_f16(vi6, vi7);
+
+        const float16x8_t vmax2345 = vmaxq_f16(vmax23, vmax45);
+        const float16x8_t vmax0167 = vmaxq_f16(vmax01, vmax67);
+        const float16x8_t vmax = vmaxq_f16(vmax2345, vmax0167);
+        const float16x8_t vout = vmaxq_f16(vminq_f16(vmax, voutput_max), voutput_min);
+
+        vst1q_f16(o, vout); o += 8;
+      }
+      if (c != 0) {
+        const float16x8_t vi0 = vld1q_f16(i0);
+        const float16x8_t vi1 = vld1q_f16(i1);
+        const float16x8_t vi2 = vld1q_f16(i2);
+        const float16x8_t vi3 = vld1q_f16(i3);
+        const float16x8_t vi4 = vld1q_f16(i4);
+        const float16x8_t vi5 = vld1q_f16(i5);
+        const float16x8_t vi6 = vld1q_f16(i6);
+        const float16x8_t vi7 = vld1q_f16(i7);
+        const float16x8_t vo = vld1q_f16(o);
+
+        const float16x8_t vmax01 = vmaxq_f16(vmaxq_f16(vi0, vi1), vo);
+        const float16x8_t vmax23 = vmaxq_f16(vi2, vi3);
+        const float16x8_t vmax45 = vmaxq_f16(vi4, vi5);
+        const float16x8_t vmax67 = vmaxq_f16(vi6, vi7);
+
+        const float16x8_t vmax2345 = vmaxq_f16(vmax23, vmax45);
+        const float16x8_t vmax0167 = vmaxq_f16(vmax01, vmax67);
+        const float16x8_t vmax = vmaxq_f16(vmax2345, vmax0167);
+        float16x8_t vout = vmaxq_f16(vminq_f16(vmax, voutput_max), voutput_min);
+
+        float16x4_t vout_lo = vget_low_f16(vout);
+        if (c & 4) {
+          vst1_f16(o, vout_lo); o += 4;
+          vout_lo = vget_high_f16(vout);
+        }
+        if (c & 2) {
+          vst1_lane_u32((void*) o, vreinterpret_u32_f16(vout_lo), 0); o += 2;
+          vout_lo = vext_f16(vout_lo, vout_lo, 2);
+        }
+        if (c & 1) {
+          vst1_lane_f16(o, vout_lo, 0); o += 1;
+        }
+      }
+    }
+    input = (const void**) ((uintptr_t) input + input_increment);
+    output = (__fp16*) ((uintptr_t) o + output_increment);
+  } while (--output_pixels != 0);
+}
diff --git a/src/f32-maxpool/9p8x-minmax-neon-c4.c b/src/f32-maxpool/9p8x-minmax-neon-c4.c
index 5eb62fd94..686e4cadf 100644
--- a/src/f32-maxpool/9p8x-minmax-neon-c4.c
+++ b/src/f32-maxpool/9p8x-minmax-neon-c4.c
@@ -75,24 +75,15 @@ void xnn_f32_maxpool_minmax_ukernel_9p8x__neon_c4(
 
       size_t c = channels;
       for (; c >= 4; c -= 4) {
-        const float32x4_t vi0 = vld1q_f32(i0);
-        i0 += 4;
-        const float32x4_t vi1 = vld1q_f32(i1);
-        i1 += 4;
-        const float32x4_t vi2 = vld1q_f32(i2);
-        i2 += 4;
-        const float32x4_t vi3 = vld1q_f32(i3);
-        i3 += 4;
-        const float32x4_t vi4 = vld1q_f32(i4);
-        i4 += 4;
-        const float32x4_t vi5 = vld1q_f32(i5);
-        i5 += 4;
-        const float32x4_t vi6 = vld1q_f32(i6);
-        i6 += 4;
-        const float32x4_t vi7 = vld1q_f32(i7);
-        i7 += 4;
-        const float32x4_t vi8 = vld1q_f32(i8);
-        i8 += 4;
+        const float32x4_t vi0 = vld1q_f32(i0); i0 += 4;
+        const float32x4_t vi1 = vld1q_f32(i1); i1 += 4;
+        const float32x4_t vi2 = vld1q_f32(i2); i2 += 4;
+        const float32x4_t vi3 = vld1q_f32(i3); i3 += 4;
+        const float32x4_t vi4 = vld1q_f32(i4); i4 += 4;
+        const float32x4_t vi5 = vld1q_f32(i5); i5 += 4;
+        const float32x4_t vi6 = vld1q_f32(i6); i6 += 4;
+        const float32x4_t vi7 = vld1q_f32(i7); i7 += 4;
+        const float32x4_t vi8 = vld1q_f32(i8); i8 += 4;
 
         const float32x4_t vmax018 = vmaxq_f32(vmaxq_f32(vi0, vi1), vi8);
         const float32x4_t vmax23 = vmaxq_f32(vi2, vi3);
@@ -104,28 +95,18 @@ void xnn_f32_maxpool_minmax_ukernel_9p8x__neon_c4(
         const float32x4_t vmax = vmaxq_f32(vmax2345, vmax01678);
         const float32x4_t vout = vmaxq_f32(vminq_f32(vmax, voutput_max), voutput_min);
 
-        vst1q_f32(o, vout);
-        o += 4;
+        vst1q_f32(o, vout); o += 4;
       }
       if (c != 0) {
-        const float32x4_t vi0 = vld1q_f32(i0);
-        i0 += 4;
-        const float32x4_t vi1 = vld1q_f32(i1);
-        i1 += 4;
-        const float32x4_t vi2 = vld1q_f32(i2);
-        i2 += 4;
-        const float32x4_t vi3 = vld1q_f32(i3);
-        i3 += 4;
-        const float32x4_t vi4 = vld1q_f32(i4);
-        i4 += 4;
-        const float32x4_t vi5 = vld1q_f32(i5);
-        i5 += 4;
-        const float32x4_t vi6 = vld1q_f32(i6);
-        i6 += 4;
-        const float32x4_t vi7 = vld1q_f32(i7);
-        i7 += 4;
-        const float32x4_t vi8 = vld1q_f32(i8);
-        i8 += 4;
+        const float32x4_t vi0 = vld1q_f32(i0); i0 += 4;
+        const float32x4_t vi1 = vld1q_f32(i1); i1 += 4;
+        const float32x4_t vi2 = vld1q_f32(i2); i2 += 4;
+        const float32x4_t vi3 = vld1q_f32(i3); i3 += 4;
+        const float32x4_t vi4 = vld1q_f32(i4); i4 += 4;
+        const float32x4_t vi5 = vld1q_f32(i5); i5 += 4;
+        const float32x4_t vi6 = vld1q_f32(i6); i6 += 4;
+        const float32x4_t vi7 = vld1q_f32(i7); i7 += 4;
+        const float32x4_t vi8 = vld1q_f32(i8); i8 += 4;
 
         const float32x4_t vmax018 = vmaxq_f32(vmaxq_f32(vi0, vi1), vi8);
         const float32x4_t vmax23 = vmaxq_f32(vi2, vi3);
@@ -139,13 +120,11 @@ void xnn_f32_maxpool_minmax_ukernel_9p8x__neon_c4(
 
         float32x2_t vout_lo = vget_low_f32(vout);
         if (c & 2) {
-          vst1_f32(o, vout_lo);
+          vst1_f32(o, vout_lo); o += 2;
           vout_lo = vget_high_f32(vout);
-          o += 2;
         }
         if (c & 1) {
-          vst1_lane_f32(o, vout_lo, 0);
-          o += 1;
+          vst1_lane_f32(o, vout_lo, 0); o += 1;
         }
       }
     }
@@ -192,22 +171,14 @@ void xnn_f32_maxpool_minmax_ukernel_9p8x__neon_c4(
       o = output;
       size_t c = channels;
       for (; c >= 4; c -= 4) {
-        const float32x4_t vi0 = vld1q_f32(i0);
-        i0 += 4;
-        const float32x4_t vi1 = vld1q_f32(i1);
-        i1 += 4;
-        const float32x4_t vi2 = vld1q_f32(i2);
-        i2 += 4;
-        const float32x4_t vi3 = vld1q_f32(i3);
-        i3 += 4;
-        const float32x4_t vi4 = vld1q_f32(i4);
-        i4 += 4;
-        const float32x4_t vi5 = vld1q_f32(i5);
-        i5 += 4;
-        const float32x4_t vi6 = vld1q_f32(i6);
-        i6 += 4;
-        const float32x4_t vi7 = vld1q_f32(i7);
-        i7 += 4;
+        const float32x4_t vi0 = vld1q_f32(i0); i0 += 4;
+        const float32x4_t vi1 = vld1q_f32(i1); i1 += 4;
+        const float32x4_t vi2 = vld1q_f32(i2); i2 += 4;
+        const float32x4_t vi3 = vld1q_f32(i3); i3 += 4;
+        const float32x4_t vi4 = vld1q_f32(i4); i4 += 4;
+        const float32x4_t vi5 = vld1q_f32(i5); i5 += 4;
+        const float32x4_t vi6 = vld1q_f32(i6); i6 += 4;
+        const float32x4_t vi7 = vld1q_f32(i7); i7 += 4;
         const float32x4_t vo = vld1q_f32(o);
 
         const float32x4_t vmax01 = vmaxq_f32(vmaxq_f32(vi0, vi1), vo);
@@ -220,8 +191,7 @@ void xnn_f32_maxpool_minmax_ukernel_9p8x__neon_c4(
         const float32x4_t vmax = vmaxq_f32(vmax2345, vmax0167);
         const float32x4_t vout = vmaxq_f32(vminq_f32(vmax, voutput_max), voutput_min);
 
-        vst1q_f32(o, vout);
-        o += 4;
+        vst1q_f32(o, vout); o += 4;
       }
       if (c != 0) {
         const float32x4_t vi0 = vld1q_f32(i0);
@@ -246,13 +216,11 @@ void xnn_f32_maxpool_minmax_ukernel_9p8x__neon_c4(
 
         float32x2_t vout_lo = vget_low_f32(vout);
         if (c & 2) {
-          vst1_f32(o, vout_lo);
+          vst1_f32(o, vout_lo); o += 2;
           vout_lo = vget_high_f32(vout);
-          o += 2;
         }
         if (c & 1) {
-          vst1_lane_f32(o, vout_lo, 0);
-          o += 1;
+          vst1_lane_f32(o, vout_lo, 0); o += 1;
         }
       }
     }
diff --git a/src/xnnpack/maxpool.h b/src/xnnpack/maxpool.h
index fc92166ad..3471b439b 100644
--- a/src/xnnpack/maxpool.h
+++ b/src/xnnpack/maxpool.h
@@ -19,6 +19,21 @@ extern "C" {
 #endif
 
 
+#define DECLARE_F16_MAXPOOL_MINMAX_UKERNEL_FUNCTION(fn_name) \
+  XNN_INTERNAL void fn_name(                                 \
+      size_t output_pixels,                                  \
+      size_t kernel_size,                                    \
+      size_t channels,                                       \
+      const void** input,                                    \
+      size_t input_offset,                                   \
+      void* output,                                          \
+      size_t input_increment,                                \
+      size_t output_increment,                               \
+      const union xnn_f16_minmax_params* params);
+
+DECLARE_F16_MAXPOOL_MINMAX_UKERNEL_FUNCTION(xnn_f16_maxpool_minmax_ukernel_9p8x__neonfp16arith_c8)
+
+
 #define DECLARE_F32_MAXPOOL_MINMAX_UKERNEL_FUNCTION(fn_name) \
   XNN_INTERNAL void fn_name(                                 \
       size_t output_pixels,                                  \
diff --git a/src/xnnpack/params.h b/src/xnnpack/params.h
index b44195f79..70d462360 100644
--- a/src/xnnpack/params.h
+++ b/src/xnnpack/params.h
@@ -2947,6 +2947,17 @@ typedef void (*xnn_maxpool_ukernel_function)(
     size_t output_increment,
     const void* params);
 
+typedef void (*xnn_f16_maxpool_ukernel_function)(
+    size_t output_pixels,
+    size_t kernel_elements,
+    size_t channels,
+    const void** input,
+    size_t input_offset,
+    void* output,
+    size_t input_increment,
+    size_t output_increment,
+    const union xnn_f16_minmax_params* params);
+
 typedef void (*xnn_f32_maxpool_ukernel_function)(
     size_t output_pixels,
     size_t kernel_elements,
diff --git a/test/f16-maxpool-minmax.cc b/test/f16-maxpool-minmax.cc
new file mode 100644
index 000000000..90771c038
--- /dev/null
+++ b/test/f16-maxpool-minmax.cc
@@ -0,0 +1,907 @@
+// Copyright (c) Facebook, Inc. and its affiliates.
+// All rights reserved.
+//
+// Copyright 2019 Google LLC
+//
+// This source code is licensed under the BSD-style license found in the
+// LICENSE file in the root directory of this source tree.
+//
+// Auto-generated file. Do not edit!
+//   Specification: test/f16-maxpool-minmax.yaml
+//   Generator: tools/generate-maxpool-test.py
+
+
+#include <gtest/gtest.h>
+
+#include <xnnpack/common.h>
+#include <xnnpack/isa-checks.h>
+
+#include <xnnpack/maxpool.h>
+#include "maxpool-microkernel-tester.h"
+
+
+#if XNN_ARCH_ARM64
+  TEST(F16_MAXPOOL_MINMAX_9P8X__NEONFP16ARITH_C8, channels_eq_8_unipass_fulltile) {
+    TEST_REQUIRES_ARM_NEON_FP16_ARITH;
+    MaxPoolMicrokernelTester()
+      .pooling_elements(9)
+      .pooling_tile(9, 8)
+      .channels(8)
+      .Test(xnn_f16_maxpool_minmax_ukernel_9p8x__neonfp16arith_c8, xnn_init_f16_minmax_neon_params);
+  }
+
+  TEST(F16_MAXPOOL_MINMAX_9P8X__NEONFP16ARITH_C8, channels_eq_8_unipass_fulltile_with_input_offset) {
+    TEST_REQUIRES_ARM_NEON_FP16_ARITH;
+    MaxPoolMicrokernelTester()
+      .pooling_elements(9)
+      .pooling_tile(9, 8)
+      .channels(8)
+      .input_offset(11)
+      .Test(xnn_f16_maxpool_minmax_ukernel_9p8x__neonfp16arith_c8, xnn_init_f16_minmax_neon_params);
+  }
+
+  TEST(F16_MAXPOOL_MINMAX_9P8X__NEONFP16ARITH_C8, channels_eq_8_unipass_fulltile_with_qmin) {
+    TEST_REQUIRES_ARM_NEON_FP16_ARITH;
+    MaxPoolMicrokernelTester()
+      .pooling_elements(9)
+      .pooling_tile(9, 8)
+      .channels(8)
+      .qmin(192)
+      .Test(xnn_f16_maxpool_minmax_ukernel_9p8x__neonfp16arith_c8, xnn_init_f16_minmax_neon_params);
+  }
+
+  TEST(F16_MAXPOOL_MINMAX_9P8X__NEONFP16ARITH_C8, channels_eq_8_unipass_fulltile_with_qmax) {
+    TEST_REQUIRES_ARM_NEON_FP16_ARITH;
+    MaxPoolMicrokernelTester()
+      .pooling_elements(9)
+      .pooling_tile(9, 8)
+      .channels(8)
+      .qmax(192)
+      .Test(xnn_f16_maxpool_minmax_ukernel_9p8x__neonfp16arith_c8, xnn_init_f16_minmax_neon_params);
+  }
+
+  TEST(F16_MAXPOOL_MINMAX_9P8X__NEONFP16ARITH_C8, channels_eq_8_unipass_subtile) {
+    TEST_REQUIRES_ARM_NEON_FP16_ARITH;
+    for (size_t pooling_elements = 2; pooling_elements < 9; pooling_elements++) {
+      MaxPoolMicrokernelTester()
+        .pooling_elements(pooling_elements)
+        .pooling_tile(9, 8)
+        .channels(8)
+        .Test(xnn_f16_maxpool_minmax_ukernel_9p8x__neonfp16arith_c8, xnn_init_f16_minmax_neon_params);
+    }
+  }
+
+  TEST(F16_MAXPOOL_MINMAX_9P8X__NEONFP16ARITH_C8, channels_eq_8_unipass_subtile_with_input_offset) {
+    TEST_REQUIRES_ARM_NEON_FP16_ARITH;
+    for (size_t pooling_elements = 2; pooling_elements < 9; pooling_elements++) {
+      MaxPoolMicrokernelTester()
+        .pooling_elements(pooling_elements)
+        .pooling_tile(9, 8)
+        .channels(8)
+        .input_offset(11)
+        .Test(xnn_f16_maxpool_minmax_ukernel_9p8x__neonfp16arith_c8, xnn_init_f16_minmax_neon_params);
+    }
+  }
+
+  TEST(F16_MAXPOOL_MINMAX_9P8X__NEONFP16ARITH_C8, channels_div_8_unipass_fulltile) {
+    TEST_REQUIRES_ARM_NEON_FP16_ARITH;
+    for (size_t channels = 16; channels < 64; channels += 8) {
+      MaxPoolMicrokernelTester()
+        .pooling_elements(9)
+        .pooling_tile(9, 8)
+        .channels(channels)
+        .Test(xnn_f16_maxpool_minmax_ukernel_9p8x__neonfp16arith_c8, xnn_init_f16_minmax_neon_params);
+    }
+  }
+
+  TEST(F16_MAXPOOL_MINMAX_9P8X__NEONFP16ARITH_C8, channels_div_8_unipass_fulltile_with_input_offset) {
+    TEST_REQUIRES_ARM_NEON_FP16_ARITH;
+    for (size_t channels = 16; channels < 64; channels += 8) {
+      MaxPoolMicrokernelTester()
+        .pooling_elements(9)
+        .pooling_tile(9, 8)
+        .channels(channels)
+        .input_offset(67)
+        .Test(xnn_f16_maxpool_minmax_ukernel_9p8x__neonfp16arith_c8, xnn_init_f16_minmax_neon_params);
+    }
+  }
+
+  TEST(F16_MAXPOOL_MINMAX_9P8X__NEONFP16ARITH_C8, channels_div_8_unipass_fulltile_with_qmin) {
+    TEST_REQUIRES_ARM_NEON_FP16_ARITH;
+    for (size_t channels = 16; channels < 64; channels += 8) {
+      MaxPoolMicrokernelTester()
+        .pooling_elements(9)
+        .pooling_tile(9, 8)
+        .channels(channels)
+        .qmin(192)
+        .Test(xnn_f16_maxpool_minmax_ukernel_9p8x__neonfp16arith_c8, xnn_init_f16_minmax_neon_params);
+    }
+  }
+
+  TEST(F16_MAXPOOL_MINMAX_9P8X__NEONFP16ARITH_C8, channels_div_8_unipass_fulltile_with_qmax) {
+    TEST_REQUIRES_ARM_NEON_FP16_ARITH;
+    for (size_t channels = 16; channels < 64; channels += 8) {
+      MaxPoolMicrokernelTester()
+        .pooling_elements(9)
+        .pooling_tile(9, 8)
+        .channels(channels)
+        .qmax(192)
+        .Test(xnn_f16_maxpool_minmax_ukernel_9p8x__neonfp16arith_c8, xnn_init_f16_minmax_neon_params);
+    }
+  }
+
+  TEST(F16_MAXPOOL_MINMAX_9P8X__NEONFP16ARITH_C8, channels_div_8_unipass_subtile) {
+    TEST_REQUIRES_ARM_NEON_FP16_ARITH;
+    for (size_t pooling_elements = 2; pooling_elements < 9; pooling_elements++) {
+      for (size_t channels = 16; channels < 64; channels += 8) {
+        MaxPoolMicrokernelTester()
+          .pooling_elements(pooling_elements)
+          .pooling_tile(9, 8)
+          .channels(channels)
+          .Test(xnn_f16_maxpool_minmax_ukernel_9p8x__neonfp16arith_c8, xnn_init_f16_minmax_neon_params);
+      }
+    }
+  }
+
+  TEST(F16_MAXPOOL_MINMAX_9P8X__NEONFP16ARITH_C8, channels_div_8_unipass_subtile_with_input_offset) {
+    TEST_REQUIRES_ARM_NEON_FP16_ARITH;
+    for (size_t pooling_elements = 2; pooling_elements < 9; pooling_elements++) {
+      for (size_t channels = 16; channels < 64; channels += 8) {
+        MaxPoolMicrokernelTester()
+          .pooling_elements(pooling_elements)
+          .pooling_tile(9, 8)
+          .channels(channels)
+          .input_offset(67)
+          .Test(xnn_f16_maxpool_minmax_ukernel_9p8x__neonfp16arith_c8, xnn_init_f16_minmax_neon_params);
+      }
+    }
+  }
+
+  TEST(F16_MAXPOOL_MINMAX_9P8X__NEONFP16ARITH_C8, channels_lt_8_unipass_fulltile) {
+    TEST_REQUIRES_ARM_NEON_FP16_ARITH;
+    for (size_t channels = 1; channels < 8; channels++) {
+      MaxPoolMicrokernelTester()
+        .pooling_elements(9)
+        .pooling_tile(9, 8)
+        .channels(channels)
+        .Test(xnn_f16_maxpool_minmax_ukernel_9p8x__neonfp16arith_c8, xnn_init_f16_minmax_neon_params);
+    }
+  }
+
+  TEST(F16_MAXPOOL_MINMAX_9P8X__NEONFP16ARITH_C8, channels_lt_8_unipass_fulltile_with_input_offset) {
+    TEST_REQUIRES_ARM_NEON_FP16_ARITH;
+    for (size_t channels = 1; channels < 8; channels++) {
+      MaxPoolMicrokernelTester()
+        .pooling_elements(9)
+        .pooling_tile(9, 8)
+        .channels(channels)
+        .input_offset(11)
+        .Test(xnn_f16_maxpool_minmax_ukernel_9p8x__neonfp16arith_c8, xnn_init_f16_minmax_neon_params);
+    }
+  }
+
+  TEST(F16_MAXPOOL_MINMAX_9P8X__NEONFP16ARITH_C8, channels_lt_8_unipass_fulltile_with_qmin) {
+    TEST_REQUIRES_ARM_NEON_FP16_ARITH;
+    for (size_t channels = 1; channels < 8; channels++) {
+      MaxPoolMicrokernelTester()
+        .pooling_elements(9)
+        .pooling_tile(9, 8)
+        .channels(channels)
+        .qmin(192)
+        .Test(xnn_f16_maxpool_minmax_ukernel_9p8x__neonfp16arith_c8, xnn_init_f16_minmax_neon_params);
+    }
+  }
+
+  TEST(F16_MAXPOOL_MINMAX_9P8X__NEONFP16ARITH_C8, channels_lt_8_unipass_fulltile_with_qmax) {
+    TEST_REQUIRES_ARM_NEON_FP16_ARITH;
+    for (size_t channels = 1; channels < 8; channels++) {
+      MaxPoolMicrokernelTester()
+        .pooling_elements(9)
+        .pooling_tile(9, 8)
+        .channels(channels)
+        .qmax(192)
+        .Test(xnn_f16_maxpool_minmax_ukernel_9p8x__neonfp16arith_c8, xnn_init_f16_minmax_neon_params);
+    }
+  }
+
+  TEST(F16_MAXPOOL_MINMAX_9P8X__NEONFP16ARITH_C8, channels_lt_8_unipass_subtile) {
+    TEST_REQUIRES_ARM_NEON_FP16_ARITH;
+    for (size_t pooling_elements = 2; pooling_elements < 9; pooling_elements++) {
+      for (size_t channels = 1; channels < 8; channels++) {
+        MaxPoolMicrokernelTester()
+          .pooling_elements(pooling_elements)
+          .pooling_tile(9, 8)
+          .channels(channels)
+          .Test(xnn_f16_maxpool_minmax_ukernel_9p8x__neonfp16arith_c8, xnn_init_f16_minmax_neon_params);
+      }
+    }
+  }
+
+  TEST(F16_MAXPOOL_MINMAX_9P8X__NEONFP16ARITH_C8, channels_lt_8_unipass_subtile_with_input_offset) {
+    TEST_REQUIRES_ARM_NEON_FP16_ARITH;
+    for (size_t pooling_elements = 2; pooling_elements < 9; pooling_elements++) {
+      for (size_t channels = 1; channels < 8; channels++) {
+        MaxPoolMicrokernelTester()
+          .pooling_elements(pooling_elements)
+          .pooling_tile(9, 8)
+          .channels(channels)
+          .input_offset(11)
+          .Test(xnn_f16_maxpool_minmax_ukernel_9p8x__neonfp16arith_c8, xnn_init_f16_minmax_neon_params);
+      }
+    }
+  }
+
+  TEST(F16_MAXPOOL_MINMAX_9P8X__NEONFP16ARITH_C8, channels_gt_8_unipass_fulltile) {
+    TEST_REQUIRES_ARM_NEON_FP16_ARITH;
+    for (size_t channels = 9; channels < 16; channels++) {
+      MaxPoolMicrokernelTester()
+        .pooling_elements(9)
+        .pooling_tile(9, 8)
+        .channels(channels)
+        .Test(xnn_f16_maxpool_minmax_ukernel_9p8x__neonfp16arith_c8, xnn_init_f16_minmax_neon_params);
+    }
+  }
+
+  TEST(F16_MAXPOOL_MINMAX_9P8X__NEONFP16ARITH_C8, channels_gt_8_unipass_fulltile_with_input_offset) {
+    TEST_REQUIRES_ARM_NEON_FP16_ARITH;
+    for (size_t channels = 9; channels < 16; channels++) {
+      MaxPoolMicrokernelTester()
+        .pooling_elements(9)
+        .pooling_tile(9, 8)
+        .channels(channels)
+        .input_offset(17)
+        .Test(xnn_f16_maxpool_minmax_ukernel_9p8x__neonfp16arith_c8, xnn_init_f16_minmax_neon_params);
+    }
+  }
+
+  TEST(F16_MAXPOOL_MINMAX_9P8X__NEONFP16ARITH_C8, channels_gt_8_unipass_fulltile_with_qmin) {
+    TEST_REQUIRES_ARM_NEON_FP16_ARITH;
+    for (size_t channels = 9; channels < 16; channels++) {
+      MaxPoolMicrokernelTester()
+        .pooling_elements(9)
+        .pooling_tile(9, 8)
+        .channels(channels)
+        .qmin(192)
+        .Test(xnn_f16_maxpool_minmax_ukernel_9p8x__neonfp16arith_c8, xnn_init_f16_minmax_neon_params);
+    }
+  }
+
+  TEST(F16_MAXPOOL_MINMAX_9P8X__NEONFP16ARITH_C8, channels_gt_8_unipass_fulltile_with_qmax) {
+    TEST_REQUIRES_ARM_NEON_FP16_ARITH;
+    for (size_t channels = 9; channels < 16; channels++) {
+      MaxPoolMicrokernelTester()
+        .pooling_elements(9)
+        .pooling_tile(9, 8)
+        .channels(channels)
+        .qmax(192)
+        .Test(xnn_f16_maxpool_minmax_ukernel_9p8x__neonfp16arith_c8, xnn_init_f16_minmax_neon_params);
+    }
+  }
+
+  TEST(F16_MAXPOOL_MINMAX_9P8X__NEONFP16ARITH_C8, channels_gt_8_unipass_subtile) {
+    TEST_REQUIRES_ARM_NEON_FP16_ARITH;
+    for (size_t pooling_elements = 2; pooling_elements < 9; pooling_elements++) {
+      for (size_t channels = 9; channels < 16; channels++) {
+        MaxPoolMicrokernelTester()
+          .pooling_elements(pooling_elements)
+          .pooling_tile(9, 8)
+          .channels(channels)
+          .Test(xnn_f16_maxpool_minmax_ukernel_9p8x__neonfp16arith_c8, xnn_init_f16_minmax_neon_params);
+      }
+    }
+  }
+
+  TEST(F16_MAXPOOL_MINMAX_9P8X__NEONFP16ARITH_C8, channels_gt_8_unipass_subtile_with_input_offset) {
+    TEST_REQUIRES_ARM_NEON_FP16_ARITH;
+    for (size_t pooling_elements = 2; pooling_elements < 9; pooling_elements++) {
+      for (size_t channels = 9; channels < 16; channels++) {
+        MaxPoolMicrokernelTester()
+          .pooling_elements(pooling_elements)
+          .pooling_tile(9, 8)
+          .channels(channels)
+          .input_offset(17)
+          .Test(xnn_f16_maxpool_minmax_ukernel_9p8x__neonfp16arith_c8, xnn_init_f16_minmax_neon_params);
+      }
+    }
+  }
+
+  TEST(F16_MAXPOOL_MINMAX_9P8X__NEONFP16ARITH_C8, channels_eq_8_twopass_fulltile) {
+    TEST_REQUIRES_ARM_NEON_FP16_ARITH;
+    MaxPoolMicrokernelTester()
+      .pooling_elements(17)
+      .pooling_tile(9, 8)
+      .channels(8)
+      .Test(xnn_f16_maxpool_minmax_ukernel_9p8x__neonfp16arith_c8, xnn_init_f16_minmax_neon_params);
+  }
+
+  TEST(F16_MAXPOOL_MINMAX_9P8X__NEONFP16ARITH_C8, channels_eq_8_twopass_fulltile_with_input_offset) {
+    TEST_REQUIRES_ARM_NEON_FP16_ARITH;
+    MaxPoolMicrokernelTester()
+      .pooling_elements(17)
+      .pooling_tile(9, 8)
+      .channels(8)
+      .input_offset(11)
+      .Test(xnn_f16_maxpool_minmax_ukernel_9p8x__neonfp16arith_c8, xnn_init_f16_minmax_neon_params);
+  }
+
+  TEST(F16_MAXPOOL_MINMAX_9P8X__NEONFP16ARITH_C8, channels_eq_8_twopass_fulltile_with_qmin) {
+    TEST_REQUIRES_ARM_NEON_FP16_ARITH;
+    MaxPoolMicrokernelTester()
+      .pooling_elements(17)
+      .pooling_tile(9, 8)
+      .channels(8)
+      .qmin(192)
+      .Test(xnn_f16_maxpool_minmax_ukernel_9p8x__neonfp16arith_c8, xnn_init_f16_minmax_neon_params);
+  }
+
+  TEST(F16_MAXPOOL_MINMAX_9P8X__NEONFP16ARITH_C8, channels_eq_8_twopass_fulltile_with_qmax) {
+    TEST_REQUIRES_ARM_NEON_FP16_ARITH;
+    MaxPoolMicrokernelTester()
+      .pooling_elements(17)
+      .pooling_tile(9, 8)
+      .channels(8)
+      .qmax(192)
+      .Test(xnn_f16_maxpool_minmax_ukernel_9p8x__neonfp16arith_c8, xnn_init_f16_minmax_neon_params);
+  }
+
+  TEST(F16_MAXPOOL_MINMAX_9P8X__NEONFP16ARITH_C8, channels_eq_8_twopass_subtile) {
+    TEST_REQUIRES_ARM_NEON_FP16_ARITH;
+    for (size_t pooling_elements = 10; pooling_elements < 17; pooling_elements++) {
+      MaxPoolMicrokernelTester()
+        .pooling_elements(pooling_elements)
+        .pooling_tile(9, 8)
+        .channels(8)
+        .Test(xnn_f16_maxpool_minmax_ukernel_9p8x__neonfp16arith_c8, xnn_init_f16_minmax_neon_params);
+    }
+  }
+
+  TEST(F16_MAXPOOL_MINMAX_9P8X__NEONFP16ARITH_C8, channels_eq_8_twopass_subtile_with_input_offset) {
+    TEST_REQUIRES_ARM_NEON_FP16_ARITH;
+    for (size_t pooling_elements = 10; pooling_elements < 17; pooling_elements++) {
+      MaxPoolMicrokernelTester()
+        .pooling_elements(pooling_elements)
+        .pooling_tile(9, 8)
+        .channels(8)
+        .input_offset(11)
+        .Test(xnn_f16_maxpool_minmax_ukernel_9p8x__neonfp16arith_c8, xnn_init_f16_minmax_neon_params);
+    }
+  }
+
+  TEST(F16_MAXPOOL_MINMAX_9P8X__NEONFP16ARITH_C8, channels_div_8_twopass_fulltile) {
+    TEST_REQUIRES_ARM_NEON_FP16_ARITH;
+    for (size_t channels = 16; channels < 64; channels += 8) {
+      MaxPoolMicrokernelTester()
+        .pooling_elements(17)
+        .pooling_tile(9, 8)
+        .channels(channels)
+        .Test(xnn_f16_maxpool_minmax_ukernel_9p8x__neonfp16arith_c8, xnn_init_f16_minmax_neon_params);
+    }
+  }
+
+  TEST(F16_MAXPOOL_MINMAX_9P8X__NEONFP16ARITH_C8, channels_div_8_twopass_fulltile_with_input_offset) {
+    TEST_REQUIRES_ARM_NEON_FP16_ARITH;
+    for (size_t channels = 16; channels < 64; channels += 8) {
+      MaxPoolMicrokernelTester()
+        .pooling_elements(17)
+        .pooling_tile(9, 8)
+        .channels(channels)
+        .input_offset(41)
+        .Test(xnn_f16_maxpool_minmax_ukernel_9p8x__neonfp16arith_c8, xnn_init_f16_minmax_neon_params);
+    }
+  }
+
+  TEST(F16_MAXPOOL_MINMAX_9P8X__NEONFP16ARITH_C8, channels_div_8_twopass_fulltile_with_qmin) {
+    TEST_REQUIRES_ARM_NEON_FP16_ARITH;
+    for (size_t channels = 16; channels < 64; channels += 8) {
+      MaxPoolMicrokernelTester()
+        .pooling_elements(17)
+        .pooling_tile(9, 8)
+        .channels(channels)
+        .qmin(192)
+        .Test(xnn_f16_maxpool_minmax_ukernel_9p8x__neonfp16arith_c8, xnn_init_f16_minmax_neon_params);
+    }
+  }
+
+  TEST(F16_MAXPOOL_MINMAX_9P8X__NEONFP16ARITH_C8, channels_div_8_twopass_fulltile_with_qmax) {
+    TEST_REQUIRES_ARM_NEON_FP16_ARITH;
+    for (size_t channels = 16; channels < 64; channels += 8) {
+      MaxPoolMicrokernelTester()
+        .pooling_elements(17)
+        .pooling_tile(9, 8)
+        .channels(channels)
+        .qmax(192)
+        .Test(xnn_f16_maxpool_minmax_ukernel_9p8x__neonfp16arith_c8, xnn_init_f16_minmax_neon_params);
+    }
+  }
+
+  TEST(F16_MAXPOOL_MINMAX_9P8X__NEONFP16ARITH_C8, channels_div_8_twopass_subtile) {
+    TEST_REQUIRES_ARM_NEON_FP16_ARITH;
+    for (size_t pooling_elements = 10; pooling_elements < 17; pooling_elements++) {
+      for (size_t channels = 16; channels < 64; channels += 8) {
+        MaxPoolMicrokernelTester()
+          .pooling_elements(pooling_elements)
+          .pooling_tile(9, 8)
+          .channels(channels)
+          .Test(xnn_f16_maxpool_minmax_ukernel_9p8x__neonfp16arith_c8, xnn_init_f16_minmax_neon_params);
+      }
+    }
+  }
+
+  TEST(F16_MAXPOOL_MINMAX_9P8X__NEONFP16ARITH_C8, channels_div_8_twopass_subtile_with_input_offset) {
+    TEST_REQUIRES_ARM_NEON_FP16_ARITH;
+    for (size_t pooling_elements = 10; pooling_elements < 17; pooling_elements++) {
+      for (size_t channels = 16; channels < 64; channels += 8) {
+        MaxPoolMicrokernelTester()
+          .pooling_elements(pooling_elements)
+          .pooling_tile(9, 8)
+          .channels(channels)
+          .input_offset(67)
+          .Test(xnn_f16_maxpool_minmax_ukernel_9p8x__neonfp16arith_c8, xnn_init_f16_minmax_neon_params);
+      }
+    }
+  }
+
+  TEST(F16_MAXPOOL_MINMAX_9P8X__NEONFP16ARITH_C8, channels_lt_8_twopass_fulltile) {
+    TEST_REQUIRES_ARM_NEON_FP16_ARITH;
+    for (size_t channels = 1; channels < 8; channels++) {
+      MaxPoolMicrokernelTester()
+        .pooling_elements(17)
+        .pooling_tile(9, 8)
+        .channels(channels)
+        .Test(xnn_f16_maxpool_minmax_ukernel_9p8x__neonfp16arith_c8, xnn_init_f16_minmax_neon_params);
+    }
+  }
+
+  TEST(F16_MAXPOOL_MINMAX_9P8X__NEONFP16ARITH_C8, channels_lt_8_twopass_fulltile_with_input_offset) {
+    TEST_REQUIRES_ARM_NEON_FP16_ARITH;
+    for (size_t channels = 1; channels < 8; channels++) {
+      MaxPoolMicrokernelTester()
+        .pooling_elements(17)
+        .pooling_tile(9, 8)
+        .channels(channels)
+        .input_offset(11)
+        .Test(xnn_f16_maxpool_minmax_ukernel_9p8x__neonfp16arith_c8, xnn_init_f16_minmax_neon_params);
+    }
+  }
+
+  TEST(F16_MAXPOOL_MINMAX_9P8X__NEONFP16ARITH_C8, channels_lt_8_twopass_fulltile_with_qmin) {
+    TEST_REQUIRES_ARM_NEON_FP16_ARITH;
+    for (size_t channels = 1; channels < 8; channels++) {
+      MaxPoolMicrokernelTester()
+        .pooling_elements(17)
+        .pooling_tile(9, 8)
+        .channels(channels)
+        .qmin(192)
+        .Test(xnn_f16_maxpool_minmax_ukernel_9p8x__neonfp16arith_c8, xnn_init_f16_minmax_neon_params);
+    }
+  }
+
+  TEST(F16_MAXPOOL_MINMAX_9P8X__NEONFP16ARITH_C8, channels_lt_8_twopass_fulltile_with_qmax) {
+    TEST_REQUIRES_ARM_NEON_FP16_ARITH;
+    for (size_t channels = 1; channels < 8; channels++) {
+      MaxPoolMicrokernelTester()
+        .pooling_elements(17)
+        .pooling_tile(9, 8)
+        .channels(channels)
+        .qmax(192)
+        .Test(xnn_f16_maxpool_minmax_ukernel_9p8x__neonfp16arith_c8, xnn_init_f16_minmax_neon_params);
+    }
+  }
+
+  TEST(F16_MAXPOOL_MINMAX_9P8X__NEONFP16ARITH_C8, channels_lt_8_twopass_subtile) {
+    TEST_REQUIRES_ARM_NEON_FP16_ARITH;
+    for (size_t pooling_elements = 10; pooling_elements < 17; pooling_elements++) {
+      for (size_t channels = 1; channels < 8; channels++) {
+        MaxPoolMicrokernelTester()
+          .pooling_elements(pooling_elements)
+          .pooling_tile(9, 8)
+          .channels(channels)
+          .Test(xnn_f16_maxpool_minmax_ukernel_9p8x__neonfp16arith_c8, xnn_init_f16_minmax_neon_params);
+      }
+    }
+  }
+
+  TEST(F16_MAXPOOL_MINMAX_9P8X__NEONFP16ARITH_C8, channels_lt_8_twopass_subtile_with_input_offset) {
+    TEST_REQUIRES_ARM_NEON_FP16_ARITH;
+    for (size_t pooling_elements = 10; pooling_elements < 17; pooling_elements++) {
+      for (size_t channels = 1; channels < 8; channels++) {
+        MaxPoolMicrokernelTester()
+          .pooling_elements(pooling_elements)
+          .pooling_tile(9, 8)
+          .channels(channels)
+          .input_offset(11)
+          .Test(xnn_f16_maxpool_minmax_ukernel_9p8x__neonfp16arith_c8, xnn_init_f16_minmax_neon_params);
+      }
+    }
+  }
+
+  TEST(F16_MAXPOOL_MINMAX_9P8X__NEONFP16ARITH_C8, channels_gt_8_twopass_fulltile) {
+    TEST_REQUIRES_ARM_NEON_FP16_ARITH;
+    for (size_t channels = 9; channels < 16; channels++) {
+      MaxPoolMicrokernelTester()
+        .pooling_elements(17)
+        .pooling_tile(9, 8)
+        .channels(channels)
+        .Test(xnn_f16_maxpool_minmax_ukernel_9p8x__neonfp16arith_c8, xnn_init_f16_minmax_neon_params);
+    }
+  }
+
+  TEST(F16_MAXPOOL_MINMAX_9P8X__NEONFP16ARITH_C8, channels_gt_8_twopass_fulltile_with_input_offset) {
+    TEST_REQUIRES_ARM_NEON_FP16_ARITH;
+    for (size_t channels = 9; channels < 16; channels++) {
+      MaxPoolMicrokernelTester()
+        .pooling_elements(17)
+        .pooling_tile(9, 8)
+        .channels(channels)
+        .input_offset(17)
+        .Test(xnn_f16_maxpool_minmax_ukernel_9p8x__neonfp16arith_c8, xnn_init_f16_minmax_neon_params);
+    }
+  }
+
+  TEST(F16_MAXPOOL_MINMAX_9P8X__NEONFP16ARITH_C8, channels_gt_8_twopass_fulltile_with_qmin) {
+    TEST_REQUIRES_ARM_NEON_FP16_ARITH;
+    for (size_t channels = 9; channels < 16; channels++) {
+      MaxPoolMicrokernelTester()
+        .pooling_elements(17)
+        .pooling_tile(9, 8)
+        .channels(channels)
+        .qmin(192)
+        .Test(xnn_f16_maxpool_minmax_ukernel_9p8x__neonfp16arith_c8, xnn_init_f16_minmax_neon_params);
+    }
+  }
+
+  TEST(F16_MAXPOOL_MINMAX_9P8X__NEONFP16ARITH_C8, channels_gt_8_twopass_fulltile_with_qmax) {
+    TEST_REQUIRES_ARM_NEON_FP16_ARITH;
+    for (size_t channels = 9; channels < 16; channels++) {
+      MaxPoolMicrokernelTester()
+        .pooling_elements(17)
+        .pooling_tile(9, 8)
+        .channels(channels)
+        .qmax(192)
+        .Test(xnn_f16_maxpool_minmax_ukernel_9p8x__neonfp16arith_c8, xnn_init_f16_minmax_neon_params);
+    }
+  }
+
+  TEST(F16_MAXPOOL_MINMAX_9P8X__NEONFP16ARITH_C8, channels_gt_8_twopass_subtile) {
+    TEST_REQUIRES_ARM_NEON_FP16_ARITH;
+    for (size_t pooling_elements = 10; pooling_elements < 17; pooling_elements++) {
+      for (size_t channels = 9; channels < 16; channels++) {
+        MaxPoolMicrokernelTester()
+          .pooling_elements(pooling_elements)
+          .pooling_tile(9, 8)
+          .channels(channels)
+          .Test(xnn_f16_maxpool_minmax_ukernel_9p8x__neonfp16arith_c8, xnn_init_f16_minmax_neon_params);
+      }
+    }
+  }
+
+  TEST(F16_MAXPOOL_MINMAX_9P8X__NEONFP16ARITH_C8, channels_gt_8_twopass_subtile_with_input_offset) {
+    TEST_REQUIRES_ARM_NEON_FP16_ARITH;
+    for (size_t pooling_elements = 10; pooling_elements < 17; pooling_elements++) {
+      for (size_t channels = 9; channels < 16; channels++) {
+        MaxPoolMicrokernelTester()
+          .pooling_elements(pooling_elements)
+          .pooling_tile(9, 8)
+          .channels(channels)
+          .input_offset(17)
+          .Test(xnn_f16_maxpool_minmax_ukernel_9p8x__neonfp16arith_c8, xnn_init_f16_minmax_neon_params);
+      }
+    }
+  }
+
+  TEST(F16_MAXPOOL_MINMAX_9P8X__NEONFP16ARITH_C8, channels_eq_8_multipass) {
+    TEST_REQUIRES_ARM_NEON_FP16_ARITH;
+    for (size_t pooling_elements = 18; pooling_elements <= 33; pooling_elements += 3) {
+      MaxPoolMicrokernelTester()
+        .pooling_elements(pooling_elements)
+        .pooling_tile(9, 8)
+        .channels(8)
+        .Test(xnn_f16_maxpool_minmax_ukernel_9p8x__neonfp16arith_c8, xnn_init_f16_minmax_neon_params);
+    }
+  }
+
+  TEST(F16_MAXPOOL_MINMAX_9P8X__NEONFP16ARITH_C8, channels_eq_8_multipass_with_input_offset) {
+    TEST_REQUIRES_ARM_NEON_FP16_ARITH;
+    for (size_t pooling_elements = 18; pooling_elements <= 33; pooling_elements += 3) {
+      MaxPoolMicrokernelTester()
+        .pooling_elements(pooling_elements)
+        .pooling_tile(9, 8)
+        .channels(8)
+        .input_offset(11)
+        .Test(xnn_f16_maxpool_minmax_ukernel_9p8x__neonfp16arith_c8, xnn_init_f16_minmax_neon_params);
+    }
+  }
+
+  TEST(F16_MAXPOOL_MINMAX_9P8X__NEONFP16ARITH_C8, channels_eq_8_multipass_with_qmin) {
+    TEST_REQUIRES_ARM_NEON_FP16_ARITH;
+    for (size_t pooling_elements = 18; pooling_elements <= 33; pooling_elements += 3) {
+      MaxPoolMicrokernelTester()
+        .pooling_elements(pooling_elements)
+        .pooling_tile(9, 8)
+        .channels(8)
+        .qmin(192)
+        .Test(xnn_f16_maxpool_minmax_ukernel_9p8x__neonfp16arith_c8, xnn_init_f16_minmax_neon_params);
+    }
+  }
+
+  TEST(F16_MAXPOOL_MINMAX_9P8X__NEONFP16ARITH_C8, channels_eq_8_multipass_with_qmax) {
+    TEST_REQUIRES_ARM_NEON_FP16_ARITH;
+    for (size_t pooling_elements = 18; pooling_elements <= 33; pooling_elements += 3) {
+      MaxPoolMicrokernelTester()
+        .pooling_elements(pooling_elements)
+        .pooling_tile(9, 8)
+        .channels(8)
+        .qmax(192)
+        .Test(xnn_f16_maxpool_minmax_ukernel_9p8x__neonfp16arith_c8, xnn_init_f16_minmax_neon_params);
+    }
+  }
+
+  TEST(F16_MAXPOOL_MINMAX_9P8X__NEONFP16ARITH_C8, channels_div_8_multipass) {
+    TEST_REQUIRES_ARM_NEON_FP16_ARITH;
+    for (size_t pooling_elements = 18; pooling_elements <= 33; pooling_elements += 3) {
+      for (size_t channels = 16; channels < 64; channels += 8) {
+        MaxPoolMicrokernelTester()
+          .pooling_elements(pooling_elements)
+          .pooling_tile(9, 8)
+          .channels(channels)
+          .Test(xnn_f16_maxpool_minmax_ukernel_9p8x__neonfp16arith_c8, xnn_init_f16_minmax_neon_params);
+      }
+    }
+  }
+
+  TEST(F16_MAXPOOL_MINMAX_9P8X__NEONFP16ARITH_C8, channels_div_8_multipass_with_input_offset) {
+    TEST_REQUIRES_ARM_NEON_FP16_ARITH;
+    for (size_t pooling_elements = 18; pooling_elements <= 33; pooling_elements += 3) {
+      for (size_t channels = 16; channels < 64; channels += 8) {
+        MaxPoolMicrokernelTester()
+          .pooling_elements(pooling_elements)
+          .pooling_tile(9, 8)
+          .channels(channels)
+          .input_offset(67)
+          .Test(xnn_f16_maxpool_minmax_ukernel_9p8x__neonfp16arith_c8, xnn_init_f16_minmax_neon_params);
+      }
+    }
+  }
+
+  TEST(F16_MAXPOOL_MINMAX_9P8X__NEONFP16ARITH_C8, channels_div_8_multipass_with_qmin) {
+    TEST_REQUIRES_ARM_NEON_FP16_ARITH;
+    for (size_t pooling_elements = 18; pooling_elements <= 33; pooling_elements += 3) {
+      for (size_t channels = 16; channels < 64; channels += 8) {
+        MaxPoolMicrokernelTester()
+          .pooling_elements(pooling_elements)
+          .pooling_tile(9, 8)
+          .channels(channels)
+          .qmin(192)
+          .Test(xnn_f16_maxpool_minmax_ukernel_9p8x__neonfp16arith_c8, xnn_init_f16_minmax_neon_params);
+      }
+    }
+  }
+
+  TEST(F16_MAXPOOL_MINMAX_9P8X__NEONFP16ARITH_C8, channels_div_8_multipass_with_qmax) {
+    TEST_REQUIRES_ARM_NEON_FP16_ARITH;
+    for (size_t pooling_elements = 18; pooling_elements <= 33; pooling_elements += 3) {
+      for (size_t channels = 16; channels < 64; channels += 8) {
+        MaxPoolMicrokernelTester()
+          .pooling_elements(pooling_elements)
+          .pooling_tile(9, 8)
+          .channels(channels)
+          .qmax(192)
+          .Test(xnn_f16_maxpool_minmax_ukernel_9p8x__neonfp16arith_c8, xnn_init_f16_minmax_neon_params);
+      }
+    }
+  }
+
+  TEST(F16_MAXPOOL_MINMAX_9P8X__NEONFP16ARITH_C8, channels_lt_8_multipass) {
+    TEST_REQUIRES_ARM_NEON_FP16_ARITH;
+    for (size_t pooling_elements = 18; pooling_elements <= 33; pooling_elements += 3) {
+      for (size_t channels = 1; channels < 8; channels++) {
+        MaxPoolMicrokernelTester()
+          .pooling_elements(pooling_elements)
+          .pooling_tile(9, 8)
+          .channels(channels)
+          .Test(xnn_f16_maxpool_minmax_ukernel_9p8x__neonfp16arith_c8, xnn_init_f16_minmax_neon_params);
+      }
+    }
+  }
+
+  TEST(F16_MAXPOOL_MINMAX_9P8X__NEONFP16ARITH_C8, channels_lt_8_multipass_with_input_offset) {
+    TEST_REQUIRES_ARM_NEON_FP16_ARITH;
+    for (size_t pooling_elements = 18; pooling_elements <= 33; pooling_elements += 3) {
+      for (size_t channels = 1; channels < 8; channels++) {
+        MaxPoolMicrokernelTester()
+          .pooling_elements(pooling_elements)
+          .pooling_tile(9, 8)
+          .channels(channels)
+          .input_offset(8)
+          .Test(xnn_f16_maxpool_minmax_ukernel_9p8x__neonfp16arith_c8, xnn_init_f16_minmax_neon_params);
+      }
+    }
+  }
+
+  TEST(F16_MAXPOOL_MINMAX_9P8X__NEONFP16ARITH_C8, channels_lt_8_multipass_with_qmin) {
+    TEST_REQUIRES_ARM_NEON_FP16_ARITH;
+    for (size_t pooling_elements = 18; pooling_elements <= 33; pooling_elements += 3) {
+      for (size_t channels = 1; channels < 8; channels++) {
+        MaxPoolMicrokernelTester()
+          .pooling_elements(pooling_elements)
+          .pooling_tile(9, 8)
+          .channels(channels)
+          .qmin(192)
+          .Test(xnn_f16_maxpool_minmax_ukernel_9p8x__neonfp16arith_c8, xnn_init_f16_minmax_neon_params);
+      }
+    }
+  }
+
+  TEST(F16_MAXPOOL_MINMAX_9P8X__NEONFP16ARITH_C8, channels_lt_8_multipass_with_qmax) {
+    TEST_REQUIRES_ARM_NEON_FP16_ARITH;
+    for (size_t pooling_elements = 18; pooling_elements <= 33; pooling_elements += 3) {
+      for (size_t channels = 1; channels < 8; channels++) {
+        MaxPoolMicrokernelTester()
+          .pooling_elements(pooling_elements)
+          .pooling_tile(9, 8)
+          .channels(channels)
+          .qmax(192)
+          .Test(xnn_f16_maxpool_minmax_ukernel_9p8x__neonfp16arith_c8, xnn_init_f16_minmax_neon_params);
+      }
+    }
+  }
+
+  TEST(F16_MAXPOOL_MINMAX_9P8X__NEONFP16ARITH_C8, channels_gt_8_multipass) {
+    TEST_REQUIRES_ARM_NEON_FP16_ARITH;
+    for (size_t pooling_elements = 18; pooling_elements <= 33; pooling_elements += 3) {
+      for (size_t channels = 9; channels < 16; channels++) {
+        MaxPoolMicrokernelTester()
+          .pooling_elements(pooling_elements)
+          .pooling_tile(9, 8)
+          .channels(channels)
+          .Test(xnn_f16_maxpool_minmax_ukernel_9p8x__neonfp16arith_c8, xnn_init_f16_minmax_neon_params);
+      }
+    }
+  }
+
+  TEST(F16_MAXPOOL_MINMAX_9P8X__NEONFP16ARITH_C8, channels_gt_8_multipass_with_input_offset) {
+    TEST_REQUIRES_ARM_NEON_FP16_ARITH;
+    for (size_t pooling_elements = 18; pooling_elements <= 33; pooling_elements += 3) {
+      for (size_t channels = 9; channels < 16; channels++) {
+        MaxPoolMicrokernelTester()
+          .pooling_elements(pooling_elements)
+          .pooling_tile(9, 8)
+          .channels(channels)
+          .input_offset(17)
+          .Test(xnn_f16_maxpool_minmax_ukernel_9p8x__neonfp16arith_c8, xnn_init_f16_minmax_neon_params);
+      }
+    }
+  }
+
+  TEST(F16_MAXPOOL_MINMAX_9P8X__NEONFP16ARITH_C8, channels_gt_8_multipass_with_qmin) {
+    TEST_REQUIRES_ARM_NEON_FP16_ARITH;
+    for (size_t pooling_elements = 18; pooling_elements <= 33; pooling_elements += 3) {
+      for (size_t channels = 9; channels < 16; channels++) {
+        MaxPoolMicrokernelTester()
+          .pooling_elements(pooling_elements)
+          .pooling_tile(9, 8)
+          .channels(channels)
+          .qmin(192)
+          .Test(xnn_f16_maxpool_minmax_ukernel_9p8x__neonfp16arith_c8, xnn_init_f16_minmax_neon_params);
+      }
+    }
+  }
+
+  TEST(F16_MAXPOOL_MINMAX_9P8X__NEONFP16ARITH_C8, channels_gt_8_multipass_with_qmax) {
+    TEST_REQUIRES_ARM_NEON_FP16_ARITH;
+    for (size_t pooling_elements = 18; pooling_elements <= 33; pooling_elements += 3) {
+      for (size_t channels = 9; channels < 16; channels++) {
+        MaxPoolMicrokernelTester()
+          .pooling_elements(pooling_elements)
+          .pooling_tile(9, 8)
+          .channels(channels)
+          .qmax(192)
+          .Test(xnn_f16_maxpool_minmax_ukernel_9p8x__neonfp16arith_c8, xnn_init_f16_minmax_neon_params);
+      }
+    }
+  }
+
+  TEST(F16_MAXPOOL_MINMAX_9P8X__NEONFP16ARITH_C8, few_output_pixels) {
+    TEST_REQUIRES_ARM_NEON_FP16_ARITH;
+    for (size_t output_pixels = 2; output_pixels <= 5; output_pixels++) {
+      for (size_t pooling_elements : std::vector<size_t>{{2, 9, 16}}) {
+        for (size_t channels = 1; channels <= 40; channels += 7) {
+          MaxPoolMicrokernelTester()
+            .output_pixels(output_pixels)
+            .pooling_elements(pooling_elements)
+            .pooling_tile(9, 8)
+            .channels(channels)
+            .Test(xnn_f16_maxpool_minmax_ukernel_9p8x__neonfp16arith_c8, xnn_init_f16_minmax_neon_params);
+        }
+      }
+    }
+  }
+
+  TEST(F16_MAXPOOL_MINMAX_9P8X__NEONFP16ARITH_C8, few_output_pixels_with_input_offset) {
+    TEST_REQUIRES_ARM_NEON_FP16_ARITH;
+    for (size_t output_pixels = 2; output_pixels <= 5; output_pixels++) {
+      for (size_t pooling_elements : std::vector<size_t>{{2, 9, 16}}) {
+        for (size_t channels = 1; channels <= 40; channels += 7) {
+          MaxPoolMicrokernelTester()
+            .output_pixels(output_pixels)
+            .pooling_elements(pooling_elements)
+            .pooling_tile(9, 8)
+            .channels(channels)
+            .input_offset(43)
+            .Test(xnn_f16_maxpool_minmax_ukernel_9p8x__neonfp16arith_c8, xnn_init_f16_minmax_neon_params);
+        }
+      }
+    }
+  }
+
+  TEST(F16_MAXPOOL_MINMAX_9P8X__NEONFP16ARITH_C8, few_output_pixels_with_qmin) {
+    TEST_REQUIRES_ARM_NEON_FP16_ARITH;
+    for (size_t output_pixels = 2; output_pixels <= 5; output_pixels++) {
+      for (size_t pooling_elements : std::vector<size_t>{{2, 9, 16}}) {
+        for (size_t channels = 1; channels <= 40; channels += 7) {
+          MaxPoolMicrokernelTester()
+            .output_pixels(output_pixels)
+            .pooling_elements(pooling_elements)
+            .pooling_tile(9, 8)
+            .channels(channels)
+            .qmin(192)
+            .Test(xnn_f16_maxpool_minmax_ukernel_9p8x__neonfp16arith_c8, xnn_init_f16_minmax_neon_params);
+        }
+      }
+    }
+  }
+
+  TEST(F16_MAXPOOL_MINMAX_9P8X__NEONFP16ARITH_C8, few_output_pixels_with_qmax) {
+    TEST_REQUIRES_ARM_NEON_FP16_ARITH;
+    for (size_t output_pixels = 2; output_pixels <= 5; output_pixels++) {
+      for (size_t pooling_elements : std::vector<size_t>{{2, 9, 16}}) {
+        for (size_t channels = 1; channels <= 40; channels += 7) {
+          MaxPoolMicrokernelTester()
+            .output_pixels(output_pixels)
+            .pooling_elements(pooling_elements)
+            .pooling_tile(9, 8)
+            .channels(channels)
+            .qmax(192)
+            .Test(xnn_f16_maxpool_minmax_ukernel_9p8x__neonfp16arith_c8, xnn_init_f16_minmax_neon_params);
+        }
+      }
+    }
+  }
+
+  TEST(F16_MAXPOOL_MINMAX_9P8X__NEONFP16ARITH_C8, few_output_pixels_with_output_stride) {
+    TEST_REQUIRES_ARM_NEON_FP16_ARITH;
+    for (size_t output_pixels = 2; output_pixels <= 5; output_pixels++) {
+      for (size_t pooling_elements : std::vector<size_t>{{2, 9, 16}}) {
+        for (size_t channels = 1; channels <= 40; channels += 7) {
+          MaxPoolMicrokernelTester()
+            .output_pixels(output_pixels)
+            .pooling_elements(pooling_elements)
+            .pooling_tile(9, 8)
+            .channels(channels)
+            .output_stride(43)
+            .Test(xnn_f16_maxpool_minmax_ukernel_9p8x__neonfp16arith_c8, xnn_init_f16_minmax_neon_params);
+        }
+      }
+    }
+  }
+
+  TEST(F16_MAXPOOL_MINMAX_9P8X__NEONFP16ARITH_C8, few_output_pixels_with_step) {
+    TEST_REQUIRES_ARM_NEON_FP16_ARITH;
+    for (size_t output_pixels = 2; output_pixels <= 5; output_pixels++) {
+      for (size_t pooling_elements : std::vector<size_t>{{2, 9, 16}}) {
+        for (size_t channels = 1; channels <= 40; channels += 7) {
+          for (size_t step = 2; step <= pooling_elements; step++) {
+            MaxPoolMicrokernelTester()
+              .output_pixels(output_pixels)
+              .pooling_elements(pooling_elements)
+              .pooling_tile(9, 8)
+              .step(step)
+              .channels(channels)
+              .output_stride(43)
+              .Test(xnn_f16_maxpool_minmax_ukernel_9p8x__neonfp16arith_c8, xnn_init_f16_minmax_neon_params);
+          }
+        }
+      }
+    }
+  }
+#endif  // XNN_ARCH_ARM64
diff --git a/test/f16-maxpool-minmax.yaml b/test/f16-maxpool-minmax.yaml
new file mode 100644
index 000000000..f503ed534
--- /dev/null
+++ b/test/f16-maxpool-minmax.yaml
@@ -0,0 +1,9 @@
+# Copyright 2022 Google LLC
+#
+# This source code is licensed under the BSD-style license found in the
+# LICENSE file in the root directory of this source tree.
+
+- name: xnn_f16_maxpool_minmax_ukernel_9p8x__neonfp16arith_c8
+  init: xnn_init_f16_minmax_neon_params
+  arch:
+  - aarch64
diff --git a/test/maxpool-microkernel-tester.h b/test/maxpool-microkernel-tester.h
index 39044434d..25e0f4f75 100644
--- a/test/maxpool-microkernel-tester.h
+++ b/test/maxpool-microkernel-tester.h
@@ -19,6 +19,8 @@
 #include <random>
 #include <vector>
 
+#include <fp16.h>
+
 #include <xnnpack.h>
 #include <xnnpack/params-init.h>
 #include <xnnpack/params.h>
@@ -289,10 +291,94 @@ class MaxPoolMicrokernelTester {
     }
   }
 
+  void Test(xnn_f16_maxpool_ukernel_function maxpool, xnn_init_f16_minmax_params_fn init_params) const {
+    std::random_device random_device;
+    auto rng = std::mt19937(random_device());
+    auto f32rng = std::bind(std::uniform_real_distribution<float>(-1.0f, 1.0f), rng);
+    auto f16rng = std::bind(fp16_ieee_from_fp32_value, f32rng);
+
+    std::vector<const uint16_t*> indirect_input((output_pixels() - 1) * step() + packed_pooling_elements());
+    std::vector<uint16_t> input(XNN_EXTRA_BYTES / sizeof(uint16_t) +
+      ((output_pixels() - 1) * step() + pooling_elements()) * channels());
+    std::vector<uint16_t> output(XNN_EXTRA_BYTES / sizeof(uint16_t) +
+      (output_pixels() - 1) * output_stride() + channels());
+    std::vector<float> output_ref(output_pixels() * channels());
+    for (size_t iteration = 0; iteration < iterations(); iteration++) {
+      std::generate(input.begin(), input.end(), std::ref(f16rng));
+      std::fill(output.begin(), output.end(), UINT16_C(0x7E00) /* NaN */);
+
+      for (size_t i = 0; i < (output_pixels() - 1) * step() + pooling_elements(); i++) {
+        indirect_input[i] = input.data() + i * channels() - input_offset();
+      }
+      std::shuffle(indirect_input.begin(),
+        indirect_input.begin() + (output_pixels() - 1) * step() + pooling_elements(), rng);
+
+      // Compute reference results, without clamping.
+      for (size_t x = 0; x < output_pixels(); x++) {
+        for (size_t c = 0; c < channels(); c++) {
+          float max_value = -std::numeric_limits<float>::infinity();
+          for (size_t p = 0; p < pooling_elements(); p++) {
+            max_value = std::max(max_value, fp16_ieee_to_fp32_value(indirect_input[x * step() + p][c + input_offset()]));
+          }
+          output_ref[x * channels() + c] = max_value;
+        }
+      }
+
+      // Compute clamping parameters.
+      const float accumulated_min = *std::min_element(output_ref.cbegin(), output_ref.cend());
+      const float accumulated_max = *std::max_element(output_ref.cbegin(), output_ref.cend());
+      const float accumulated_range = accumulated_max - accumulated_min;
+      float output_min = accumulated_min + float(qmin()) / 255.0f * accumulated_range;
+      if (qmin() == std::numeric_limits<uint8_t>::min()) {
+        output_min = -std::numeric_limits<float>::infinity();
+      }
+      float output_max = accumulated_max - float(255 - qmax()) / 255.0f * accumulated_range;
+      if (qmax() == std::numeric_limits<uint8_t>::max()) {
+        output_max = +std::numeric_limits<float>::infinity();
+      }
+      output_min = fp16_ieee_to_fp32_value(fp16_ieee_from_fp32_value(output_min));
+      output_max = fp16_ieee_to_fp32_value(fp16_ieee_from_fp32_value(output_max));
+
+      // Prepare parameters.
+      xnn_f16_minmax_params params;
+      init_params(&params, fp16_ieee_from_fp32_value(output_min), fp16_ieee_from_fp32_value(output_max));
+
+      // Clamp reference results.
+      for (float& output_value : output_ref) {
+        output_value = std::max(std::min(output_value, output_max), output_min);
+      }
+
+      // Call optimized micro-kernel.
+      maxpool(output_pixels(), pooling_elements(), channels(),
+        reinterpret_cast<const void**>(indirect_input.data()), input_offset() * sizeof(uint16_t), output.data(),
+        (step() - packed_pooling_elements()) * sizeof(void*),
+        (output_stride() - channels()) * sizeof(uint16_t),
+        &params);
+
+      // Verify results.
+      for (size_t x = 0; x < output_pixels(); x++) {
+        for (size_t c = 0; c < channels(); c++) {
+          ASSERT_GE(fp16_ieee_to_fp32_value(output[x * output_stride() + c]), output_min)
+            << "at pixel " << x << " / " << output_pixels() << ", channel " << c << " / " << channels()
+            << ", pooling elements = " << pooling_elements() << ", step = " << step()
+            << ", input offset = " << input_offset();
+          ASSERT_LE(fp16_ieee_to_fp32_value(output[x * output_stride() + c]), output_max)
+            << "at pixel " << x << " / " << output_pixels() << ", channel " << c << " / " << channels()
+            << ", pooling elements = " << pooling_elements() << ", step = " << step()
+            << ", input offset = " << input_offset();
+          ASSERT_EQ(fp16_ieee_to_fp32_value(output[x * output_stride() + c]), output_ref[x * channels() + c])
+            << "at pixel " << x << " / " << output_pixels() << ", channel " << c << " / " << channels()
+            << ", pooling elements = " << pooling_elements() << ", step = " << step()
+            << ", input offset = " << input_offset();
+        }
+      }
+    }
+  }
+
   void Test(xnn_f32_maxpool_ukernel_function maxpool, xnn_init_f32_minmax_params_fn init_params) const {
     std::random_device random_device;
     auto rng = std::mt19937(random_device());
-    auto f32rng = std::bind(std::uniform_real_distribution<float>(0.0f, 1.0f), rng);
+    auto f32rng = std::bind(std::uniform_real_distribution<float>(-1.0f, 1.0f), rng);
 
     std::vector<const float*> indirect_input((output_pixels() - 1) * step() + packed_pooling_elements());
     std::vector<float> input(XNN_EXTRA_BYTES / sizeof(float) +