diff options
29 files changed, 9762 insertions, 1 deletions
diff --git a/BUILD.bazel b/BUILD.bazel index 2ff710b7a..f1ac5744f 100644 --- a/BUILD.bazel +++ b/BUILD.bazel @@ -848,6 +848,21 @@ WASMSIMD_UKERNELS = [ "src/f32-vunary/gen/vneg-wasmsimd-x8.c", "src/f32-vunary/gen/vsqr-wasmsimd-x4.c", "src/f32-vunary/gen/vsqr-wasmsimd-x8.c", + "src/qs8-gemm/gen/1x4c8-minmax-wasmsimd-ld64.c", + "src/qs8-gemm/gen/2x4c8-minmax-wasmsimd-ld64.c", + "src/qs8-gemm/gen/3x4c8-minmax-wasmsimd-ld64.c", + "src/qs8-gemm/gen/1x4c8-minmax-wasmsimd-ld128.c", + "src/qs8-gemm/gen/2x4c8-minmax-wasmsimd-ld128.c", + "src/qs8-gemm/gen/3x4c8-minmax-wasmsimd-ld128.c", + "src/qs8-gemm/gen/1x4c8-xw-minmax-wasmsimd.c", + "src/qs8-gemm/gen/2x4c8-xw-minmax-wasmsimd.c", + "src/qs8-gemm/gen/3x4c8-xw-minmax-wasmsimd.c", + "src/qs8-igemm/gen/1x4c8-minmax-wasmsimd-ld64.c", + "src/qs8-igemm/gen/2x4c8-minmax-wasmsimd-ld64.c", + "src/qs8-igemm/gen/3x4c8-minmax-wasmsimd-ld64.c", + "src/qs8-igemm/gen/1x4c8-minmax-wasmsimd-ld128.c", + "src/qs8-igemm/gen/2x4c8-minmax-wasmsimd-ld128.c", + "src/qs8-igemm/gen/3x4c8-minmax-wasmsimd-ld128.c", "src/qs8-requantization/fp32-wasmsimd.c", "src/qs8-requantization/q31-wasmsimd.c", "src/qu8-requantization/fp32-wasmsimd.c", diff --git a/bench/qs8-gemm.cc b/bench/qs8-gemm.cc index be8181b9d..514256bb8 100644 --- a/bench/qs8-gemm.cc +++ b/bench/qs8-gemm.cc @@ -357,7 +357,37 @@ static void GEMMBenchmark(benchmark::State& state, BENCHMARK_GEMM(qs8_gemm_3x4c8__sse2_ld128) BENCHMARK_GEMM(qs8_gemm_xw_2x4c8__sse2) BENCHMARK_GEMM(qs8_gemm_xw_3x4c8__sse2) -#endif +#endif // XNN_ARCH_X86 || XNN_ARCH_X86_64 + +#if XNN_ARCH_WASMSIMD + static void qs8_gemm_2x4c8__wasmsimd_ld64(benchmark::State& state, const char* net) { + GEMMBenchmark(state, xnn_qs8_gemm_minmax_ukernel_2x4c8__wasmsimd_ld64, 2, 4, 8, 1); + } + static void qs8_gemm_3x4c8__wasmsimd_ld64(benchmark::State& state, const char* net) { + GEMMBenchmark(state, xnn_qs8_gemm_minmax_ukernel_3x4c8__wasmsimd_ld64, 3, 4, 8, 1); + } + + static void qs8_gemm_2x4c8__wasmsimd_ld128(benchmark::State& state, const char* net) { + GEMMBenchmark(state, xnn_qs8_gemm_minmax_ukernel_2x4c8__wasmsimd_ld128, 2, 4, 8, 1); + } + static void qs8_gemm_3x4c8__wasmsimd_ld128(benchmark::State& state, const char* net) { + GEMMBenchmark(state, xnn_qs8_gemm_minmax_ukernel_3x4c8__wasmsimd_ld128, 3, 4, 8, 1); + } + + static void qs8_gemm_xw_2x4c8__wasmsimd(benchmark::State& state, const char* net) { + GEMMBenchmark(state, xnn_qs8_gemm_xw_minmax_ukernel_2x4c8__wasmsimd, 2, 4, 8, 1); + } + static void qs8_gemm_xw_3x4c8__wasmsimd(benchmark::State& state, const char* net) { + GEMMBenchmark(state, xnn_qs8_gemm_xw_minmax_ukernel_3x4c8__wasmsimd, 3, 4, 8, 1); + } + + BENCHMARK_GEMM(qs8_gemm_2x4c8__wasmsimd_ld64) + BENCHMARK_GEMM(qs8_gemm_3x4c8__wasmsimd_ld64) + BENCHMARK_GEMM(qs8_gemm_2x4c8__wasmsimd_ld128) + BENCHMARK_GEMM(qs8_gemm_3x4c8__wasmsimd_ld128) + BENCHMARK_GEMM(qs8_gemm_xw_2x4c8__wasmsimd) + BENCHMARK_GEMM(qs8_gemm_xw_3x4c8__wasmsimd) +#endif // XNN_ARCH_WASMSIMD #ifndef XNNPACK_BENCHMARK_NO_MAIN BENCHMARK_MAIN(); diff --git a/scripts/generate-qs8-gemm.sh b/scripts/generate-qs8-gemm.sh index bc24f468d..48a671891 100755 --- a/scripts/generate-qs8-gemm.sh +++ b/scripts/generate-qs8-gemm.sh @@ -4,6 +4,20 @@ # This source code is licensed under the BSD-style license found in the # LICENSE file in the root directory of this source tree. +################################## WAsm SIMD ################################## +### C8 micro-kernels +tools/xngen src/qs8-gemm/MRx4c8-minmax-wasmsimd.c.in -D MR=1 -D VARIANT=LD64 -o src/qs8-gemm/gen/1x4c8-minmax-wasmsimd-ld64.c +tools/xngen src/qs8-gemm/MRx4c8-minmax-wasmsimd.c.in -D MR=2 -D VARIANT=LD64 -o src/qs8-gemm/gen/2x4c8-minmax-wasmsimd-ld64.c +tools/xngen src/qs8-gemm/MRx4c8-minmax-wasmsimd.c.in -D MR=3 -D VARIANT=LD64 -o src/qs8-gemm/gen/3x4c8-minmax-wasmsimd-ld64.c + +tools/xngen src/qs8-gemm/MRx4c8-minmax-wasmsimd.c.in -D MR=1 -D VARIANT=LD128 -o src/qs8-gemm/gen/1x4c8-minmax-wasmsimd-ld128.c +tools/xngen src/qs8-gemm/MRx4c8-minmax-wasmsimd.c.in -D MR=2 -D VARIANT=LD128 -o src/qs8-gemm/gen/2x4c8-minmax-wasmsimd-ld128.c +tools/xngen src/qs8-gemm/MRx4c8-minmax-wasmsimd.c.in -D MR=3 -D VARIANT=LD128 -o src/qs8-gemm/gen/3x4c8-minmax-wasmsimd-ld128.c + +tools/xngen src/qs8-gemm/MRx4c8-minmax-wasmsimd.c.in -D MR=1 -D VARIANT=EXTENDED -o src/qs8-gemm/gen/1x4c8-xw-minmax-wasmsimd.c +tools/xngen src/qs8-gemm/MRx4c8-minmax-wasmsimd.c.in -D MR=2 -D VARIANT=EXTENDED -o src/qs8-gemm/gen/2x4c8-xw-minmax-wasmsimd.c +tools/xngen src/qs8-gemm/MRx4c8-minmax-wasmsimd.c.in -D MR=3 -D VARIANT=EXTENDED -o src/qs8-gemm/gen/3x4c8-xw-minmax-wasmsimd.c + ################################### ARM NEON ################################## tools/xngen src/qs8-gemm/minmax-neon-mlal-lane.c.in -D MR=1 -D NR=8 -o src/qs8-gemm/gen/1x8-minmax-neon-mlal-lane.c tools/xngen src/qs8-gemm/minmax-neon-mlal-lane.c.in -D MR=4 -D NR=8 -o src/qs8-gemm/gen/4x8-minmax-neon-mlal-lane.c diff --git a/scripts/generate-qs8-igemm.sh b/scripts/generate-qs8-igemm.sh index 045ed9885..4536cf5bb 100755 --- a/scripts/generate-qs8-igemm.sh +++ b/scripts/generate-qs8-igemm.sh @@ -4,6 +4,16 @@ # This source code is licensed under the BSD-style license found in the # LICENSE file in the root directory of this source tree. +################################## WAsm SIMD ################################## +### C8 micro-kernels +tools/xngen src/qs8-igemm/MRx4c8-minmax-wasmsimd.c.in -D MR=1 -D VARIANT=LD64 -o src/qs8-igemm/gen/1x4c8-minmax-wasmsimd-ld64.c +tools/xngen src/qs8-igemm/MRx4c8-minmax-wasmsimd.c.in -D MR=2 -D VARIANT=LD64 -o src/qs8-igemm/gen/2x4c8-minmax-wasmsimd-ld64.c +tools/xngen src/qs8-igemm/MRx4c8-minmax-wasmsimd.c.in -D MR=3 -D VARIANT=LD64 -o src/qs8-igemm/gen/3x4c8-minmax-wasmsimd-ld64.c + +tools/xngen src/qs8-igemm/MRx4c8-minmax-wasmsimd.c.in -D MR=1 -D VARIANT=LD128 -o src/qs8-igemm/gen/1x4c8-minmax-wasmsimd-ld128.c +tools/xngen src/qs8-igemm/MRx4c8-minmax-wasmsimd.c.in -D MR=2 -D VARIANT=LD128 -o src/qs8-igemm/gen/2x4c8-minmax-wasmsimd-ld128.c +tools/xngen src/qs8-igemm/MRx4c8-minmax-wasmsimd.c.in -D MR=3 -D VARIANT=LD128 -o src/qs8-igemm/gen/3x4c8-minmax-wasmsimd-ld128.c + ################################### ARM NEON ################################## tools/xngen src/qs8-igemm/minmax-neon-mlal-lane.c.in -D MR=1 -D NR=8 -o src/qs8-igemm/gen/1x8-minmax-neon-mlal-lane.c tools/xngen src/qs8-igemm/minmax-neon-mlal-lane.c.in -D MR=4 -D NR=8 -o src/qs8-igemm/gen/4x8-minmax-neon-mlal-lane.c diff --git a/src/qs8-gemm/MRx4c8-minmax-wasmsimd.c.in b/src/qs8-gemm/MRx4c8-minmax-wasmsimd.c.in new file mode 100644 index 000000000..dbc36b27c --- /dev/null +++ b/src/qs8-gemm/MRx4c8-minmax-wasmsimd.c.in @@ -0,0 +1,194 @@ +// Copyright 2020 Google LLC +// +// This source code is licensed under the BSD-style license found in the +// LICENSE file in the root directory of this source tree. + +$assert VARIANT in ["LD64", "LD128", "EXTENDED"] +$assert MR <= 4 +#include <assert.h> + +#include <wasm_simd128.h> + +#include <xnnpack/gemm.h> + + +$LOAD_SUFFIX = {"LD128": "_ld128", "LD64": "_ld64", "EXTENDED": ""}[VARIANT] +$GEMM_SUFFIX = "_xw" if VARIANT == "EXTENDED" else "" +void xnn_qs8_gemm${GEMM_SUFFIX}_minmax_ukernel_${MR}x4c8__wasmsimd${LOAD_SUFFIX}( + size_t mr, + size_t nc, + size_t kc, + const int8_t* restrict a, + size_t a_stride, + const void* restrict w, + int8_t* restrict c, + size_t cm_stride, + size_t cn_stride, + const union xnn_qs8_gemm${GEMM_SUFFIX}_params params[restrict XNN_MIN_ELEMENTS(1)]) XNN_DISABLE_TSAN +{ + assert(mr != 0); + assert(mr <= ${MR}); + assert(nc != 0); + assert(kc != 0); + assert(kc % sizeof(int8_t) == 0); + assert(a != NULL); + assert(w != NULL); + assert(c != NULL); + + const int8_t* a0 = a; + int8_t* c0 = c; + $for M in range(1, MR): + const int8_t* a${M} = (const int8_t*) ((uintptr_t) a${M-1} + a_stride); + int8_t* c${M} = (int8_t*) ((uintptr_t) c${M-1} + cm_stride); + $if M % 2 == 0: + if XNN_UNPREDICTABLE(mr <= ${M}) { + a${M} = a${M-1}; + c${M} = c${M-1}; + } + $elif M + 1 == MR: + if XNN_UNPREDICTABLE(mr != ${M+1}) { + a${M} = a${M-1}; + c${M} = c${M-1}; + } + $else: + if XNN_UNPREDICTABLE(mr < ${M+1}) { + a${M} = a${M-1}; + c${M} = c${M-1}; + } + + const v128_t vzero = wasm_f64x2_splat(0.0); + do { + $for N in range(4): + v128_t vacc0x${N} = wasm_f32x4_replace_lane(vzero, 0, ((const float*) w)[${N}]); + $for M in range(1, MR): + $for N in range(4): + v128_t vacc${M}x${N} = vacc0x${N}; + w = (const void*) ((uintptr_t) w + 4 * sizeof(int32_t)); + + size_t k = 0; + while (k < kc) { + $for M in range(MR): + const v128_t vxa${M} = wasm_i16x8_load_8x8(a${M}); + a${M} += 8; + + $if VARIANT == "LD128": + $for N in range(0, 4, 2): + $if N == 0: + const v128_t vb${N}${N+1} = wasm_v128_load(w); + $else: + const v128_t vb${N}${N+1} = wasm_v128_load((const void*) ((uintptr_t) w + ${N * 8} * sizeof(int8_t))); + const v128_t vxb${N} = wasm_i16x8_widen_low_i8x16(vb${N}${N+1}); + const v128_t vxb${N+1} = wasm_i16x8_widen_high_i8x16(vb${N}${N+1}); + + $for M in range(MR): + const v128_t vprod${M}x${N} = wasm_i16x8_mul(vxb${N}, vxa${M}); + vacc${M}x${N} = wasm_i32x4_add(vacc${M}x${N}, wasm_i32x4_widen_low_i16x8(vprod${M}x${N})); + + $for M in range(MR): + const v128_t vprod${M}x${N+1} = wasm_i16x8_mul(vxb${N+1}, vxa${M}); + vacc${M}x${N+1} = wasm_i32x4_add(vacc${M}x${N+1}, wasm_i32x4_widen_low_i16x8(vprod${M}x${N+1})); + vacc${M}x${N} = wasm_i32x4_add(vacc${M}x${N}, wasm_i32x4_widen_high_i16x8(vprod${M}x${N})); + + $for M in range(MR): + vacc${M}x${N+1} = wasm_i32x4_add(vacc${M}x${N+1}, wasm_i32x4_widen_high_i16x8(vprod${M}x${N+1})); + $else: + $for N in range(4): + $if VARIANT == "LD64": + $if N == 0: + const v128_t vxb${N} = wasm_i16x8_load_8x8(w); + $else: + const v128_t vxb${N} = wasm_i16x8_load_8x8((const void*) ((uintptr_t) w + ${N * 8} * sizeof(int8_t))); + $elif VARIANT == "EXTENDED": + $if N == 0: + const v128_t vxb${N} = wasm_v128_load(w); + $else: + const v128_t vxb${N} = wasm_v128_load((const void*) ((uintptr_t) w + ${N * 8} * sizeof(int16_t))); + + $for M in range(MR): + const v128_t vprod${M}x${N} = wasm_i16x8_mul(vxa${M}, vxb${N}); + vacc${M}x${N} = wasm_i32x4_add(vacc${M}x${N}, wasm_i32x4_widen_low_i16x8(vprod${M}x${N})); + vacc${M}x${N} = wasm_i32x4_add(vacc${M}x${N}, wasm_i32x4_widen_high_i16x8(vprod${M}x${N})); + + $if VARIANT == "EXTENDED": + w = (const void*) ((uintptr_t) w + 32 * sizeof(int16_t)); + $else: + w = (const void*) ((uintptr_t) w + 32 * sizeof(int8_t)); + k += 8 * sizeof(int8_t); + } + + $for M in range(MR): + const v128_t vacc${M}x02 = wasm_i32x4_add(wasm_v32x4_shuffle(vacc${M}x0, vacc${M}x2, 0, 4, 1, 5), wasm_v32x4_shuffle(vacc${M}x0, vacc${M}x2, 2, 6, 3, 7)); + const v128_t vacc${M}x13 = wasm_i32x4_add(wasm_v32x4_shuffle(vacc${M}x1, vacc${M}x3, 0, 4, 1, 5), wasm_v32x4_shuffle(vacc${M}x1, vacc${M}x3, 2, 6, 3, 7)); + + $for M in range(MR): + v128_t vacc${M}x0123 = wasm_i32x4_add(wasm_v32x4_shuffle(vacc${M}x02, vacc${M}x13, 0, 4, 1, 5), wasm_v32x4_shuffle(vacc${M}x02, vacc${M}x13, 2, 6, 3, 7)); + + $for M in range(MR): + const v128_t vsign${M}x0123 = wasm_i32x4_lt(vacc${M}x0123, vzero); + + $for M in range(MR): + const v128_t vacc${M}x01 = wasm_v32x4_shuffle(vacc${M}x0123, vsign${M}x0123, 0, 4, 1, 5); + + const v128_t vmultiplier = wasm_v128_load(params->wasmsimd.multiplier); + const v128_t vrounding = wasm_v128_load(params->wasmsimd.rounding); + $for M in range(MR): + const v128_t vprod${M}x01 = wasm_i64x2_add(wasm_i64x2_mul(vacc${M}x01, vmultiplier), vrounding); + const v128_t vacc${M}x23 = wasm_v32x4_shuffle(vacc${M}x0123, vsign${M}x0123, 2, 6, 3, 7); + + $for M in range(MR): + const v128_t vprod${M}x23 = wasm_i64x2_add(wasm_i64x2_mul(vacc${M}x23, vmultiplier), vrounding); + + $for M in range(MR): + const v128_t vq31prod${M}x0123 = wasm_v32x4_shuffle(vprod${M}x01, vprod${M}x23, 1, 3, 5, 7); + + const v128_t vremainder_mask = wasm_v128_load(params->wasmsimd.remainder_mask); + $for M in range(MR): + const v128_t vrem${M}x0123 = wasm_i32x4_add(wasm_v128_and(vq31prod${M}x0123, vremainder_mask), wasm_i32x4_lt(vq31prod${M}x0123, vzero)); + + const v128_t vthreshold = wasm_v128_load(params->wasmsimd.remainder_threshold); + const int32_t vshift = params->wasmsimd.shift; + $for M in range(MR): + vacc${M}x0123 = wasm_i32x4_sub(wasm_i32x4_shr(vq31prod${M}x0123, vshift), wasm_i32x4_gt(vrem${M}x0123, vthreshold)); + + const v128_t voutput_zero_point = wasm_v128_load(params->wasmsimd.output_zero_point); + $for M in range(0, MR, 2): + v128_t vacc${M}${min(M+1, MR-1)}x0123 = wasm_i16x8_add_saturate(wasm_i16x8_narrow_i32x4(vacc${M}x0123, vacc${min(M+1, MR-1)}x0123), voutput_zero_point); + + $if MR > 2: + v128_t vout = wasm_i8x16_narrow_i16x8(vacc0${min(1, MR-1)}x0123, vacc${min(2, MR-1)}${min(3, MR-1)}x0123); + $else: + v128_t vout = wasm_i8x16_narrow_i16x8(vacc0${min(1, MR-1)}x0123, vacc0${min(1, MR-1)}x0123); + + const v128_t voutput_min = wasm_v128_load(params->wasmsimd.output_min); + vout = wasm_i8x16_max(vout, voutput_min); + + const v128_t voutput_max = wasm_v128_load(params->wasmsimd.output_max); + vout = wasm_i8x16_min(vout, voutput_max); + + if (nc >= 4) { + $for M in range(MR): + *((float*) c${M}) = (float) wasm_f32x4_extract_lane(vout, ${M}); + + $for M in range(MR): + a${M} = (const int8_t*) ((uintptr_t) a${M} - k); + + $for M in range(MR): + c${M} = (int8_t*) ((uintptr_t) c${M} + cn_stride); + + nc -= 4; + } else { + if (nc & 2) { + $for M in range(MR): + *((uint16_t*) c${M}) = (uint16_t) wasm_i16x8_extract_lane(vout, ${M * 2}); + c${M} += 2; + vout = wasm_u32x4_shr(vout, 16); + } + if (nc & 1) { + $for M in range(MR): + *c${M} = (int8_t) wasm_i8x16_extract_lane(vout, ${M * 4}); + } + + nc = 0; + } + } while (nc != 0); +} diff --git a/src/qs8-gemm/gen/1x4c8-minmax-wasmsimd-ld128.c b/src/qs8-gemm/gen/1x4c8-minmax-wasmsimd-ld128.c new file mode 100644 index 000000000..bb79ff08a --- /dev/null +++ b/src/qs8-gemm/gen/1x4c8-minmax-wasmsimd-ld128.c @@ -0,0 +1,140 @@ +// Auto-generated file. Do not edit! +// Template: src/qs8-gemm/MRx4c8-minmax-wasmsimd.c.in +// Generator: tools/xngen +// +// Copyright 2020 Google LLC +// +// This source code is licensed under the BSD-style license found in the +// LICENSE file in the root directory of this source tree. + +#include <assert.h> + +#include <wasm_simd128.h> + +#include <xnnpack/gemm.h> + + +void xnn_qs8_gemm_minmax_ukernel_1x4c8__wasmsimd_ld128( + size_t mr, + size_t nc, + size_t kc, + const int8_t* restrict a, + size_t a_stride, + const void* restrict w, + int8_t* restrict c, + size_t cm_stride, + size_t cn_stride, + const union xnn_qs8_gemm_params params[restrict XNN_MIN_ELEMENTS(1)]) XNN_DISABLE_TSAN +{ + assert(mr != 0); + assert(mr <= 1); + assert(nc != 0); + assert(kc != 0); + assert(kc % sizeof(int8_t) == 0); + assert(a != NULL); + assert(w != NULL); + assert(c != NULL); + + const int8_t* a0 = a; + int8_t* c0 = c; + + const v128_t vzero = wasm_f64x2_splat(0.0); + do { + v128_t vacc0x0 = wasm_f32x4_replace_lane(vzero, 0, ((const float*) w)[0]); + v128_t vacc0x1 = wasm_f32x4_replace_lane(vzero, 0, ((const float*) w)[1]); + v128_t vacc0x2 = wasm_f32x4_replace_lane(vzero, 0, ((const float*) w)[2]); + v128_t vacc0x3 = wasm_f32x4_replace_lane(vzero, 0, ((const float*) w)[3]); + w = (const void*) ((uintptr_t) w + 4 * sizeof(int32_t)); + + size_t k = 0; + while (k < kc) { + const v128_t vxa0 = wasm_i16x8_load_8x8(a0); + a0 += 8; + + const v128_t vb01 = wasm_v128_load(w); + const v128_t vxb0 = wasm_i16x8_widen_low_i8x16(vb01); + const v128_t vxb1 = wasm_i16x8_widen_high_i8x16(vb01); + + const v128_t vprod0x0 = wasm_i16x8_mul(vxb0, vxa0); + vacc0x0 = wasm_i32x4_add(vacc0x0, wasm_i32x4_widen_low_i16x8(vprod0x0)); + + const v128_t vprod0x1 = wasm_i16x8_mul(vxb1, vxa0); + vacc0x1 = wasm_i32x4_add(vacc0x1, wasm_i32x4_widen_low_i16x8(vprod0x1)); + vacc0x0 = wasm_i32x4_add(vacc0x0, wasm_i32x4_widen_high_i16x8(vprod0x0)); + + vacc0x1 = wasm_i32x4_add(vacc0x1, wasm_i32x4_widen_high_i16x8(vprod0x1)); + const v128_t vb23 = wasm_v128_load((const void*) ((uintptr_t) w + 16 * sizeof(int8_t))); + const v128_t vxb2 = wasm_i16x8_widen_low_i8x16(vb23); + const v128_t vxb3 = wasm_i16x8_widen_high_i8x16(vb23); + + const v128_t vprod0x2 = wasm_i16x8_mul(vxb2, vxa0); + vacc0x2 = wasm_i32x4_add(vacc0x2, wasm_i32x4_widen_low_i16x8(vprod0x2)); + + const v128_t vprod0x3 = wasm_i16x8_mul(vxb3, vxa0); + vacc0x3 = wasm_i32x4_add(vacc0x3, wasm_i32x4_widen_low_i16x8(vprod0x3)); + vacc0x2 = wasm_i32x4_add(vacc0x2, wasm_i32x4_widen_high_i16x8(vprod0x2)); + + vacc0x3 = wasm_i32x4_add(vacc0x3, wasm_i32x4_widen_high_i16x8(vprod0x3)); + + w = (const void*) ((uintptr_t) w + 32 * sizeof(int8_t)); + k += 8 * sizeof(int8_t); + } + + const v128_t vacc0x02 = wasm_i32x4_add(wasm_v32x4_shuffle(vacc0x0, vacc0x2, 0, 4, 1, 5), wasm_v32x4_shuffle(vacc0x0, vacc0x2, 2, 6, 3, 7)); + const v128_t vacc0x13 = wasm_i32x4_add(wasm_v32x4_shuffle(vacc0x1, vacc0x3, 0, 4, 1, 5), wasm_v32x4_shuffle(vacc0x1, vacc0x3, 2, 6, 3, 7)); + + v128_t vacc0x0123 = wasm_i32x4_add(wasm_v32x4_shuffle(vacc0x02, vacc0x13, 0, 4, 1, 5), wasm_v32x4_shuffle(vacc0x02, vacc0x13, 2, 6, 3, 7)); + + const v128_t vsign0x0123 = wasm_i32x4_lt(vacc0x0123, vzero); + + const v128_t vacc0x01 = wasm_v32x4_shuffle(vacc0x0123, vsign0x0123, 0, 4, 1, 5); + + const v128_t vmultiplier = wasm_v128_load(params->wasmsimd.multiplier); + const v128_t vrounding = wasm_v128_load(params->wasmsimd.rounding); + const v128_t vprod0x01 = wasm_i64x2_add(wasm_i64x2_mul(vacc0x01, vmultiplier), vrounding); + const v128_t vacc0x23 = wasm_v32x4_shuffle(vacc0x0123, vsign0x0123, 2, 6, 3, 7); + + const v128_t vprod0x23 = wasm_i64x2_add(wasm_i64x2_mul(vacc0x23, vmultiplier), vrounding); + + const v128_t vq31prod0x0123 = wasm_v32x4_shuffle(vprod0x01, vprod0x23, 1, 3, 5, 7); + + const v128_t vremainder_mask = wasm_v128_load(params->wasmsimd.remainder_mask); + const v128_t vrem0x0123 = wasm_i32x4_add(wasm_v128_and(vq31prod0x0123, vremainder_mask), wasm_i32x4_lt(vq31prod0x0123, vzero)); + + const v128_t vthreshold = wasm_v128_load(params->wasmsimd.remainder_threshold); + const int32_t vshift = params->wasmsimd.shift; + vacc0x0123 = wasm_i32x4_sub(wasm_i32x4_shr(vq31prod0x0123, vshift), wasm_i32x4_gt(vrem0x0123, vthreshold)); + + const v128_t voutput_zero_point = wasm_v128_load(params->wasmsimd.output_zero_point); + v128_t vacc00x0123 = wasm_i16x8_add_saturate(wasm_i16x8_narrow_i32x4(vacc0x0123, vacc0x0123), voutput_zero_point); + + v128_t vout = wasm_i8x16_narrow_i16x8(vacc00x0123, vacc00x0123); + + const v128_t voutput_min = wasm_v128_load(params->wasmsimd.output_min); + vout = wasm_i8x16_max(vout, voutput_min); + + const v128_t voutput_max = wasm_v128_load(params->wasmsimd.output_max); + vout = wasm_i8x16_min(vout, voutput_max); + + if (nc >= 4) { + *((float*) c0) = (float) wasm_f32x4_extract_lane(vout, 0); + + a0 = (const int8_t*) ((uintptr_t) a0 - k); + + c0 = (int8_t*) ((uintptr_t) c0 + cn_stride); + + nc -= 4; + } else { + if (nc & 2) { + *((uint16_t*) c0) = (uint16_t) wasm_i16x8_extract_lane(vout, 0); + c0 += 2; + vout = wasm_u32x4_shr(vout, 16); + } + if (nc & 1) { + *c0 = (int8_t) wasm_i8x16_extract_lane(vout, 0); + } + + nc = 0; + } + } while (nc != 0); +} diff --git a/src/qs8-gemm/gen/1x4c8-minmax-wasmsimd-ld64.c b/src/qs8-gemm/gen/1x4c8-minmax-wasmsimd-ld64.c new file mode 100644 index 000000000..fbe75052a --- /dev/null +++ b/src/qs8-gemm/gen/1x4c8-minmax-wasmsimd-ld64.c @@ -0,0 +1,136 @@ +// Auto-generated file. Do not edit! +// Template: src/qs8-gemm/MRx4c8-minmax-wasmsimd.c.in +// Generator: tools/xngen +// +// Copyright 2020 Google LLC +// +// This source code is licensed under the BSD-style license found in the +// LICENSE file in the root directory of this source tree. + +#include <assert.h> + +#include <wasm_simd128.h> + +#include <xnnpack/gemm.h> + + +void xnn_qs8_gemm_minmax_ukernel_1x4c8__wasmsimd_ld64( + size_t mr, + size_t nc, + size_t kc, + const int8_t* restrict a, + size_t a_stride, + const void* restrict w, + int8_t* restrict c, + size_t cm_stride, + size_t cn_stride, + const union xnn_qs8_gemm_params params[restrict XNN_MIN_ELEMENTS(1)]) XNN_DISABLE_TSAN +{ + assert(mr != 0); + assert(mr <= 1); + assert(nc != 0); + assert(kc != 0); + assert(kc % sizeof(int8_t) == 0); + assert(a != NULL); + assert(w != NULL); + assert(c != NULL); + + const int8_t* a0 = a; + int8_t* c0 = c; + + const v128_t vzero = wasm_f64x2_splat(0.0); + do { + v128_t vacc0x0 = wasm_f32x4_replace_lane(vzero, 0, ((const float*) w)[0]); + v128_t vacc0x1 = wasm_f32x4_replace_lane(vzero, 0, ((const float*) w)[1]); + v128_t vacc0x2 = wasm_f32x4_replace_lane(vzero, 0, ((const float*) w)[2]); + v128_t vacc0x3 = wasm_f32x4_replace_lane(vzero, 0, ((const float*) w)[3]); + w = (const void*) ((uintptr_t) w + 4 * sizeof(int32_t)); + + size_t k = 0; + while (k < kc) { + const v128_t vxa0 = wasm_i16x8_load_8x8(a0); + a0 += 8; + + const v128_t vxb0 = wasm_i16x8_load_8x8(w); + + const v128_t vprod0x0 = wasm_i16x8_mul(vxa0, vxb0); + vacc0x0 = wasm_i32x4_add(vacc0x0, wasm_i32x4_widen_low_i16x8(vprod0x0)); + vacc0x0 = wasm_i32x4_add(vacc0x0, wasm_i32x4_widen_high_i16x8(vprod0x0)); + const v128_t vxb1 = wasm_i16x8_load_8x8((const void*) ((uintptr_t) w + 8 * sizeof(int8_t))); + + const v128_t vprod0x1 = wasm_i16x8_mul(vxa0, vxb1); + vacc0x1 = wasm_i32x4_add(vacc0x1, wasm_i32x4_widen_low_i16x8(vprod0x1)); + vacc0x1 = wasm_i32x4_add(vacc0x1, wasm_i32x4_widen_high_i16x8(vprod0x1)); + const v128_t vxb2 = wasm_i16x8_load_8x8((const void*) ((uintptr_t) w + 16 * sizeof(int8_t))); + + const v128_t vprod0x2 = wasm_i16x8_mul(vxa0, vxb2); + vacc0x2 = wasm_i32x4_add(vacc0x2, wasm_i32x4_widen_low_i16x8(vprod0x2)); + vacc0x2 = wasm_i32x4_add(vacc0x2, wasm_i32x4_widen_high_i16x8(vprod0x2)); + const v128_t vxb3 = wasm_i16x8_load_8x8((const void*) ((uintptr_t) w + 24 * sizeof(int8_t))); + + const v128_t vprod0x3 = wasm_i16x8_mul(vxa0, vxb3); + vacc0x3 = wasm_i32x4_add(vacc0x3, wasm_i32x4_widen_low_i16x8(vprod0x3)); + vacc0x3 = wasm_i32x4_add(vacc0x3, wasm_i32x4_widen_high_i16x8(vprod0x3)); + + w = (const void*) ((uintptr_t) w + 32 * sizeof(int8_t)); + k += 8 * sizeof(int8_t); + } + + const v128_t vacc0x02 = wasm_i32x4_add(wasm_v32x4_shuffle(vacc0x0, vacc0x2, 0, 4, 1, 5), wasm_v32x4_shuffle(vacc0x0, vacc0x2, 2, 6, 3, 7)); + const v128_t vacc0x13 = wasm_i32x4_add(wasm_v32x4_shuffle(vacc0x1, vacc0x3, 0, 4, 1, 5), wasm_v32x4_shuffle(vacc0x1, vacc0x3, 2, 6, 3, 7)); + + v128_t vacc0x0123 = wasm_i32x4_add(wasm_v32x4_shuffle(vacc0x02, vacc0x13, 0, 4, 1, 5), wasm_v32x4_shuffle(vacc0x02, vacc0x13, 2, 6, 3, 7)); + + const v128_t vsign0x0123 = wasm_i32x4_lt(vacc0x0123, vzero); + + const v128_t vacc0x01 = wasm_v32x4_shuffle(vacc0x0123, vsign0x0123, 0, 4, 1, 5); + + const v128_t vmultiplier = wasm_v128_load(params->wasmsimd.multiplier); + const v128_t vrounding = wasm_v128_load(params->wasmsimd.rounding); + const v128_t vprod0x01 = wasm_i64x2_add(wasm_i64x2_mul(vacc0x01, vmultiplier), vrounding); + const v128_t vacc0x23 = wasm_v32x4_shuffle(vacc0x0123, vsign0x0123, 2, 6, 3, 7); + + const v128_t vprod0x23 = wasm_i64x2_add(wasm_i64x2_mul(vacc0x23, vmultiplier), vrounding); + + const v128_t vq31prod0x0123 = wasm_v32x4_shuffle(vprod0x01, vprod0x23, 1, 3, 5, 7); + + const v128_t vremainder_mask = wasm_v128_load(params->wasmsimd.remainder_mask); + const v128_t vrem0x0123 = wasm_i32x4_add(wasm_v128_and(vq31prod0x0123, vremainder_mask), wasm_i32x4_lt(vq31prod0x0123, vzero)); + + const v128_t vthreshold = wasm_v128_load(params->wasmsimd.remainder_threshold); + const int32_t vshift = params->wasmsimd.shift; + vacc0x0123 = wasm_i32x4_sub(wasm_i32x4_shr(vq31prod0x0123, vshift), wasm_i32x4_gt(vrem0x0123, vthreshold)); + + const v128_t voutput_zero_point = wasm_v128_load(params->wasmsimd.output_zero_point); + v128_t vacc00x0123 = wasm_i16x8_add_saturate(wasm_i16x8_narrow_i32x4(vacc0x0123, vacc0x0123), voutput_zero_point); + + v128_t vout = wasm_i8x16_narrow_i16x8(vacc00x0123, vacc00x0123); + + const v128_t voutput_min = wasm_v128_load(params->wasmsimd.output_min); + vout = wasm_i8x16_max(vout, voutput_min); + + const v128_t voutput_max = wasm_v128_load(params->wasmsimd.output_max); + vout = wasm_i8x16_min(vout, voutput_max); + + if (nc >= 4) { + *((float*) c0) = (float) wasm_f32x4_extract_lane(vout, 0); + + a0 = (const int8_t*) ((uintptr_t) a0 - k); + + c0 = (int8_t*) ((uintptr_t) c0 + cn_stride); + + nc -= 4; + } else { + if (nc & 2) { + *((uint16_t*) c0) = (uint16_t) wasm_i16x8_extract_lane(vout, 0); + c0 += 2; + vout = wasm_u32x4_shr(vout, 16); + } + if (nc & 1) { + *c0 = (int8_t) wasm_i8x16_extract_lane(vout, 0); + } + + nc = 0; + } + } while (nc != 0); +} diff --git a/src/qs8-gemm/gen/1x4c8-xw-minmax-wasmsimd.c b/src/qs8-gemm/gen/1x4c8-xw-minmax-wasmsimd.c new file mode 100644 index 000000000..b4c02c99a --- /dev/null +++ b/src/qs8-gemm/gen/1x4c8-xw-minmax-wasmsimd.c @@ -0,0 +1,136 @@ +// Auto-generated file. Do not edit! +// Template: src/qs8-gemm/MRx4c8-minmax-wasmsimd.c.in +// Generator: tools/xngen +// +// Copyright 2020 Google LLC +// +// This source code is licensed under the BSD-style license found in the +// LICENSE file in the root directory of this source tree. + +#include <assert.h> + +#include <wasm_simd128.h> + +#include <xnnpack/gemm.h> + + +void xnn_qs8_gemm_xw_minmax_ukernel_1x4c8__wasmsimd( + size_t mr, + size_t nc, + size_t kc, + const int8_t* restrict a, + size_t a_stride, + const void* restrict w, + int8_t* restrict c, + size_t cm_stride, + size_t cn_stride, + const union xnn_qs8_gemm_xw_params params[restrict XNN_MIN_ELEMENTS(1)]) XNN_DISABLE_TSAN +{ + assert(mr != 0); + assert(mr <= 1); + assert(nc != 0); + assert(kc != 0); + assert(kc % sizeof(int8_t) == 0); + assert(a != NULL); + assert(w != NULL); + assert(c != NULL); + + const int8_t* a0 = a; + int8_t* c0 = c; + + const v128_t vzero = wasm_f64x2_splat(0.0); + do { + v128_t vacc0x0 = wasm_f32x4_replace_lane(vzero, 0, ((const float*) w)[0]); + v128_t vacc0x1 = wasm_f32x4_replace_lane(vzero, 0, ((const float*) w)[1]); + v128_t vacc0x2 = wasm_f32x4_replace_lane(vzero, 0, ((const float*) w)[2]); + v128_t vacc0x3 = wasm_f32x4_replace_lane(vzero, 0, ((const float*) w)[3]); + w = (const void*) ((uintptr_t) w + 4 * sizeof(int32_t)); + + size_t k = 0; + while (k < kc) { + const v128_t vxa0 = wasm_i16x8_load_8x8(a0); + a0 += 8; + + const v128_t vxb0 = wasm_v128_load(w); + + const v128_t vprod0x0 = wasm_i16x8_mul(vxa0, vxb0); + vacc0x0 = wasm_i32x4_add(vacc0x0, wasm_i32x4_widen_low_i16x8(vprod0x0)); + vacc0x0 = wasm_i32x4_add(vacc0x0, wasm_i32x4_widen_high_i16x8(vprod0x0)); + const v128_t vxb1 = wasm_v128_load((const void*) ((uintptr_t) w + 8 * sizeof(int16_t))); + + const v128_t vprod0x1 = wasm_i16x8_mul(vxa0, vxb1); + vacc0x1 = wasm_i32x4_add(vacc0x1, wasm_i32x4_widen_low_i16x8(vprod0x1)); + vacc0x1 = wasm_i32x4_add(vacc0x1, wasm_i32x4_widen_high_i16x8(vprod0x1)); + const v128_t vxb2 = wasm_v128_load((const void*) ((uintptr_t) w + 16 * sizeof(int16_t))); + + const v128_t vprod0x2 = wasm_i16x8_mul(vxa0, vxb2); + vacc0x2 = wasm_i32x4_add(vacc0x2, wasm_i32x4_widen_low_i16x8(vprod0x2)); + vacc0x2 = wasm_i32x4_add(vacc0x2, wasm_i32x4_widen_high_i16x8(vprod0x2)); + const v128_t vxb3 = wasm_v128_load((const void*) ((uintptr_t) w + 24 * sizeof(int16_t))); + + const v128_t vprod0x3 = wasm_i16x8_mul(vxa0, vxb3); + vacc0x3 = wasm_i32x4_add(vacc0x3, wasm_i32x4_widen_low_i16x8(vprod0x3)); + vacc0x3 = wasm_i32x4_add(vacc0x3, wasm_i32x4_widen_high_i16x8(vprod0x3)); + + w = (const void*) ((uintptr_t) w + 32 * sizeof(int16_t)); + k += 8 * sizeof(int8_t); + } + + const v128_t vacc0x02 = wasm_i32x4_add(wasm_v32x4_shuffle(vacc0x0, vacc0x2, 0, 4, 1, 5), wasm_v32x4_shuffle(vacc0x0, vacc0x2, 2, 6, 3, 7)); + const v128_t vacc0x13 = wasm_i32x4_add(wasm_v32x4_shuffle(vacc0x1, vacc0x3, 0, 4, 1, 5), wasm_v32x4_shuffle(vacc0x1, vacc0x3, 2, 6, 3, 7)); + + v128_t vacc0x0123 = wasm_i32x4_add(wasm_v32x4_shuffle(vacc0x02, vacc0x13, 0, 4, 1, 5), wasm_v32x4_shuffle(vacc0x02, vacc0x13, 2, 6, 3, 7)); + + const v128_t vsign0x0123 = wasm_i32x4_lt(vacc0x0123, vzero); + + const v128_t vacc0x01 = wasm_v32x4_shuffle(vacc0x0123, vsign0x0123, 0, 4, 1, 5); + + const v128_t vmultiplier = wasm_v128_load(params->wasmsimd.multiplier); + const v128_t vrounding = wasm_v128_load(params->wasmsimd.rounding); + const v128_t vprod0x01 = wasm_i64x2_add(wasm_i64x2_mul(vacc0x01, vmultiplier), vrounding); + const v128_t vacc0x23 = wasm_v32x4_shuffle(vacc0x0123, vsign0x0123, 2, 6, 3, 7); + + const v128_t vprod0x23 = wasm_i64x2_add(wasm_i64x2_mul(vacc0x23, vmultiplier), vrounding); + + const v128_t vq31prod0x0123 = wasm_v32x4_shuffle(vprod0x01, vprod0x23, 1, 3, 5, 7); + + const v128_t vremainder_mask = wasm_v128_load(params->wasmsimd.remainder_mask); + const v128_t vrem0x0123 = wasm_i32x4_add(wasm_v128_and(vq31prod0x0123, vremainder_mask), wasm_i32x4_lt(vq31prod0x0123, vzero)); + + const v128_t vthreshold = wasm_v128_load(params->wasmsimd.remainder_threshold); + const int32_t vshift = params->wasmsimd.shift; + vacc0x0123 = wasm_i32x4_sub(wasm_i32x4_shr(vq31prod0x0123, vshift), wasm_i32x4_gt(vrem0x0123, vthreshold)); + + const v128_t voutput_zero_point = wasm_v128_load(params->wasmsimd.output_zero_point); + v128_t vacc00x0123 = wasm_i16x8_add_saturate(wasm_i16x8_narrow_i32x4(vacc0x0123, vacc0x0123), voutput_zero_point); + + v128_t vout = wasm_i8x16_narrow_i16x8(vacc00x0123, vacc00x0123); + + const v128_t voutput_min = wasm_v128_load(params->wasmsimd.output_min); + vout = wasm_i8x16_max(vout, voutput_min); + + const v128_t voutput_max = wasm_v128_load(params->wasmsimd.output_max); + vout = wasm_i8x16_min(vout, voutput_max); + + if (nc >= 4) { + *((float*) c0) = (float) wasm_f32x4_extract_lane(vout, 0); + + a0 = (const int8_t*) ((uintptr_t) a0 - k); + + c0 = (int8_t*) ((uintptr_t) c0 + cn_stride); + + nc -= 4; + } else { + if (nc & 2) { + *((uint16_t*) c0) = (uint16_t) wasm_i16x8_extract_lane(vout, 0); + c0 += 2; + vout = wasm_u32x4_shr(vout, 16); + } + if (nc & 1) { + *c0 = (int8_t) wasm_i8x16_extract_lane(vout, 0); + } + + nc = 0; + } + } while (nc != 0); +} diff --git a/src/qs8-gemm/gen/2x4c8-minmax-wasmsimd-ld128.c b/src/qs8-gemm/gen/2x4c8-minmax-wasmsimd-ld128.c new file mode 100644 index 000000000..473f8dc92 --- /dev/null +++ b/src/qs8-gemm/gen/2x4c8-minmax-wasmsimd-ld128.c @@ -0,0 +1,181 @@ +// Auto-generated file. Do not edit! +// Template: src/qs8-gemm/MRx4c8-minmax-wasmsimd.c.in +// Generator: tools/xngen +// +// Copyright 2020 Google LLC +// +// This source code is licensed under the BSD-style license found in the +// LICENSE file in the root directory of this source tree. + +#include <assert.h> + +#include <wasm_simd128.h> + +#include <xnnpack/gemm.h> + + +void xnn_qs8_gemm_minmax_ukernel_2x4c8__wasmsimd_ld128( + size_t mr, + size_t nc, + size_t kc, + const int8_t* restrict a, + size_t a_stride, + const void* restrict w, + int8_t* restrict c, + size_t cm_stride, + size_t cn_stride, + const union xnn_qs8_gemm_params params[restrict XNN_MIN_ELEMENTS(1)]) XNN_DISABLE_TSAN +{ + assert(mr != 0); + assert(mr <= 2); + assert(nc != 0); + assert(kc != 0); + assert(kc % sizeof(int8_t) == 0); + assert(a != NULL); + assert(w != NULL); + assert(c != NULL); + + const int8_t* a0 = a; + int8_t* c0 = c; + const int8_t* a1 = (const int8_t*) ((uintptr_t) a0 + a_stride); + int8_t* c1 = (int8_t*) ((uintptr_t) c0 + cm_stride); + if XNN_UNPREDICTABLE(mr != 2) { + a1 = a0; + c1 = c0; + } + + const v128_t vzero = wasm_f64x2_splat(0.0); + do { + v128_t vacc0x0 = wasm_f32x4_replace_lane(vzero, 0, ((const float*) w)[0]); + v128_t vacc0x1 = wasm_f32x4_replace_lane(vzero, 0, ((const float*) w)[1]); + v128_t vacc0x2 = wasm_f32x4_replace_lane(vzero, 0, ((const float*) w)[2]); + v128_t vacc0x3 = wasm_f32x4_replace_lane(vzero, 0, ((const float*) w)[3]); + v128_t vacc1x0 = vacc0x0; + v128_t vacc1x1 = vacc0x1; + v128_t vacc1x2 = vacc0x2; + v128_t vacc1x3 = vacc0x3; + w = (const void*) ((uintptr_t) w + 4 * sizeof(int32_t)); + + size_t k = 0; + while (k < kc) { + const v128_t vxa0 = wasm_i16x8_load_8x8(a0); + a0 += 8; + const v128_t vxa1 = wasm_i16x8_load_8x8(a1); + a1 += 8; + + const v128_t vb01 = wasm_v128_load(w); + const v128_t vxb0 = wasm_i16x8_widen_low_i8x16(vb01); + const v128_t vxb1 = wasm_i16x8_widen_high_i8x16(vb01); + + const v128_t vprod0x0 = wasm_i16x8_mul(vxb0, vxa0); + vacc0x0 = wasm_i32x4_add(vacc0x0, wasm_i32x4_widen_low_i16x8(vprod0x0)); + const v128_t vprod1x0 = wasm_i16x8_mul(vxb0, vxa1); + vacc1x0 = wasm_i32x4_add(vacc1x0, wasm_i32x4_widen_low_i16x8(vprod1x0)); + + const v128_t vprod0x1 = wasm_i16x8_mul(vxb1, vxa0); + vacc0x1 = wasm_i32x4_add(vacc0x1, wasm_i32x4_widen_low_i16x8(vprod0x1)); + vacc0x0 = wasm_i32x4_add(vacc0x0, wasm_i32x4_widen_high_i16x8(vprod0x0)); + const v128_t vprod1x1 = wasm_i16x8_mul(vxb1, vxa1); + vacc1x1 = wasm_i32x4_add(vacc1x1, wasm_i32x4_widen_low_i16x8(vprod1x1)); + vacc1x0 = wasm_i32x4_add(vacc1x0, wasm_i32x4_widen_high_i16x8(vprod1x0)); + + vacc0x1 = wasm_i32x4_add(vacc0x1, wasm_i32x4_widen_high_i16x8(vprod0x1)); + vacc1x1 = wasm_i32x4_add(vacc1x1, wasm_i32x4_widen_high_i16x8(vprod1x1)); + const v128_t vb23 = wasm_v128_load((const void*) ((uintptr_t) w + 16 * sizeof(int8_t))); + const v128_t vxb2 = wasm_i16x8_widen_low_i8x16(vb23); + const v128_t vxb3 = wasm_i16x8_widen_high_i8x16(vb23); + + const v128_t vprod0x2 = wasm_i16x8_mul(vxb2, vxa0); + vacc0x2 = wasm_i32x4_add(vacc0x2, wasm_i32x4_widen_low_i16x8(vprod0x2)); + const v128_t vprod1x2 = wasm_i16x8_mul(vxb2, vxa1); + vacc1x2 = wasm_i32x4_add(vacc1x2, wasm_i32x4_widen_low_i16x8(vprod1x2)); + + const v128_t vprod0x3 = wasm_i16x8_mul(vxb3, vxa0); + vacc0x3 = wasm_i32x4_add(vacc0x3, wasm_i32x4_widen_low_i16x8(vprod0x3)); + vacc0x2 = wasm_i32x4_add(vacc0x2, wasm_i32x4_widen_high_i16x8(vprod0x2)); + const v128_t vprod1x3 = wasm_i16x8_mul(vxb3, vxa1); + vacc1x3 = wasm_i32x4_add(vacc1x3, wasm_i32x4_widen_low_i16x8(vprod1x3)); + vacc1x2 = wasm_i32x4_add(vacc1x2, wasm_i32x4_widen_high_i16x8(vprod1x2)); + + vacc0x3 = wasm_i32x4_add(vacc0x3, wasm_i32x4_widen_high_i16x8(vprod0x3)); + vacc1x3 = wasm_i32x4_add(vacc1x3, wasm_i32x4_widen_high_i16x8(vprod1x3)); + + w = (const void*) ((uintptr_t) w + 32 * sizeof(int8_t)); + k += 8 * sizeof(int8_t); + } + + const v128_t vacc0x02 = wasm_i32x4_add(wasm_v32x4_shuffle(vacc0x0, vacc0x2, 0, 4, 1, 5), wasm_v32x4_shuffle(vacc0x0, vacc0x2, 2, 6, 3, 7)); + const v128_t vacc0x13 = wasm_i32x4_add(wasm_v32x4_shuffle(vacc0x1, vacc0x3, 0, 4, 1, 5), wasm_v32x4_shuffle(vacc0x1, vacc0x3, 2, 6, 3, 7)); + const v128_t vacc1x02 = wasm_i32x4_add(wasm_v32x4_shuffle(vacc1x0, vacc1x2, 0, 4, 1, 5), wasm_v32x4_shuffle(vacc1x0, vacc1x2, 2, 6, 3, 7)); + const v128_t vacc1x13 = wasm_i32x4_add(wasm_v32x4_shuffle(vacc1x1, vacc1x3, 0, 4, 1, 5), wasm_v32x4_shuffle(vacc1x1, vacc1x3, 2, 6, 3, 7)); + + v128_t vacc0x0123 = wasm_i32x4_add(wasm_v32x4_shuffle(vacc0x02, vacc0x13, 0, 4, 1, 5), wasm_v32x4_shuffle(vacc0x02, vacc0x13, 2, 6, 3, 7)); + v128_t vacc1x0123 = wasm_i32x4_add(wasm_v32x4_shuffle(vacc1x02, vacc1x13, 0, 4, 1, 5), wasm_v32x4_shuffle(vacc1x02, vacc1x13, 2, 6, 3, 7)); + + const v128_t vsign0x0123 = wasm_i32x4_lt(vacc0x0123, vzero); + const v128_t vsign1x0123 = wasm_i32x4_lt(vacc1x0123, vzero); + + const v128_t vacc0x01 = wasm_v32x4_shuffle(vacc0x0123, vsign0x0123, 0, 4, 1, 5); + const v128_t vacc1x01 = wasm_v32x4_shuffle(vacc1x0123, vsign1x0123, 0, 4, 1, 5); + + const v128_t vmultiplier = wasm_v128_load(params->wasmsimd.multiplier); + const v128_t vrounding = wasm_v128_load(params->wasmsimd.rounding); + const v128_t vprod0x01 = wasm_i64x2_add(wasm_i64x2_mul(vacc0x01, vmultiplier), vrounding); + const v128_t vacc0x23 = wasm_v32x4_shuffle(vacc0x0123, vsign0x0123, 2, 6, 3, 7); + const v128_t vprod1x01 = wasm_i64x2_add(wasm_i64x2_mul(vacc1x01, vmultiplier), vrounding); + const v128_t vacc1x23 = wasm_v32x4_shuffle(vacc1x0123, vsign1x0123, 2, 6, 3, 7); + + const v128_t vprod0x23 = wasm_i64x2_add(wasm_i64x2_mul(vacc0x23, vmultiplier), vrounding); + const v128_t vprod1x23 = wasm_i64x2_add(wasm_i64x2_mul(vacc1x23, vmultiplier), vrounding); + + const v128_t vq31prod0x0123 = wasm_v32x4_shuffle(vprod0x01, vprod0x23, 1, 3, 5, 7); + const v128_t vq31prod1x0123 = wasm_v32x4_shuffle(vprod1x01, vprod1x23, 1, 3, 5, 7); + + const v128_t vremainder_mask = wasm_v128_load(params->wasmsimd.remainder_mask); + const v128_t vrem0x0123 = wasm_i32x4_add(wasm_v128_and(vq31prod0x0123, vremainder_mask), wasm_i32x4_lt(vq31prod0x0123, vzero)); + const v128_t vrem1x0123 = wasm_i32x4_add(wasm_v128_and(vq31prod1x0123, vremainder_mask), wasm_i32x4_lt(vq31prod1x0123, vzero)); + + const v128_t vthreshold = wasm_v128_load(params->wasmsimd.remainder_threshold); + const int32_t vshift = params->wasmsimd.shift; + vacc0x0123 = wasm_i32x4_sub(wasm_i32x4_shr(vq31prod0x0123, vshift), wasm_i32x4_gt(vrem0x0123, vthreshold)); + vacc1x0123 = wasm_i32x4_sub(wasm_i32x4_shr(vq31prod1x0123, vshift), wasm_i32x4_gt(vrem1x0123, vthreshold)); + + const v128_t voutput_zero_point = wasm_v128_load(params->wasmsimd.output_zero_point); + v128_t vacc01x0123 = wasm_i16x8_add_saturate(wasm_i16x8_narrow_i32x4(vacc0x0123, vacc1x0123), voutput_zero_point); + + v128_t vout = wasm_i8x16_narrow_i16x8(vacc01x0123, vacc01x0123); + + const v128_t voutput_min = wasm_v128_load(params->wasmsimd.output_min); + vout = wasm_i8x16_max(vout, voutput_min); + + const v128_t voutput_max = wasm_v128_load(params->wasmsimd.output_max); + vout = wasm_i8x16_min(vout, voutput_max); + + if (nc >= 4) { + *((float*) c0) = (float) wasm_f32x4_extract_lane(vout, 0); + *((float*) c1) = (float) wasm_f32x4_extract_lane(vout, 1); + + a0 = (const int8_t*) ((uintptr_t) a0 - k); + a1 = (const int8_t*) ((uintptr_t) a1 - k); + + c0 = (int8_t*) ((uintptr_t) c0 + cn_stride); + c1 = (int8_t*) ((uintptr_t) c1 + cn_stride); + + nc -= 4; + } else { + if (nc & 2) { + *((uint16_t*) c0) = (uint16_t) wasm_i16x8_extract_lane(vout, 0); + c0 += 2; + *((uint16_t*) c1) = (uint16_t) wasm_i16x8_extract_lane(vout, 2); + c1 += 2; + vout = wasm_u32x4_shr(vout, 16); + } + if (nc & 1) { + *c0 = (int8_t) wasm_i8x16_extract_lane(vout, 0); + *c1 = (int8_t) wasm_i8x16_extract_lane(vout, 4); + } + + nc = 0; + } + } while (nc != 0); +} diff --git a/src/qs8-gemm/gen/2x4c8-minmax-wasmsimd-ld64.c b/src/qs8-gemm/gen/2x4c8-minmax-wasmsimd-ld64.c new file mode 100644 index 000000000..9f04c819f --- /dev/null +++ b/src/qs8-gemm/gen/2x4c8-minmax-wasmsimd-ld64.c @@ -0,0 +1,177 @@ +// Auto-generated file. Do not edit! +// Template: src/qs8-gemm/MRx4c8-minmax-wasmsimd.c.in +// Generator: tools/xngen +// +// Copyright 2020 Google LLC +// +// This source code is licensed under the BSD-style license found in the +// LICENSE file in the root directory of this source tree. + +#include <assert.h> + +#include <wasm_simd128.h> + +#include <xnnpack/gemm.h> + + +void xnn_qs8_gemm_minmax_ukernel_2x4c8__wasmsimd_ld64( + size_t mr, + size_t nc, + size_t kc, + const int8_t* restrict a, + size_t a_stride, + const void* restrict w, + int8_t* restrict c, + size_t cm_stride, + size_t cn_stride, + const union xnn_qs8_gemm_params params[restrict XNN_MIN_ELEMENTS(1)]) XNN_DISABLE_TSAN +{ + assert(mr != 0); + assert(mr <= 2); + assert(nc != 0); + assert(kc != 0); + assert(kc % sizeof(int8_t) == 0); + assert(a != NULL); + assert(w != NULL); + assert(c != NULL); + + const int8_t* a0 = a; + int8_t* c0 = c; + const int8_t* a1 = (const int8_t*) ((uintptr_t) a0 + a_stride); + int8_t* c1 = (int8_t*) ((uintptr_t) c0 + cm_stride); + if XNN_UNPREDICTABLE(mr != 2) { + a1 = a0; + c1 = c0; + } + + const v128_t vzero = wasm_f64x2_splat(0.0); + do { + v128_t vacc0x0 = wasm_f32x4_replace_lane(vzero, 0, ((const float*) w)[0]); + v128_t vacc0x1 = wasm_f32x4_replace_lane(vzero, 0, ((const float*) w)[1]); + v128_t vacc0x2 = wasm_f32x4_replace_lane(vzero, 0, ((const float*) w)[2]); + v128_t vacc0x3 = wasm_f32x4_replace_lane(vzero, 0, ((const float*) w)[3]); + v128_t vacc1x0 = vacc0x0; + v128_t vacc1x1 = vacc0x1; + v128_t vacc1x2 = vacc0x2; + v128_t vacc1x3 = vacc0x3; + w = (const void*) ((uintptr_t) w + 4 * sizeof(int32_t)); + + size_t k = 0; + while (k < kc) { + const v128_t vxa0 = wasm_i16x8_load_8x8(a0); + a0 += 8; + const v128_t vxa1 = wasm_i16x8_load_8x8(a1); + a1 += 8; + + const v128_t vxb0 = wasm_i16x8_load_8x8(w); + + const v128_t vprod0x0 = wasm_i16x8_mul(vxa0, vxb0); + vacc0x0 = wasm_i32x4_add(vacc0x0, wasm_i32x4_widen_low_i16x8(vprod0x0)); + vacc0x0 = wasm_i32x4_add(vacc0x0, wasm_i32x4_widen_high_i16x8(vprod0x0)); + const v128_t vprod1x0 = wasm_i16x8_mul(vxa1, vxb0); + vacc1x0 = wasm_i32x4_add(vacc1x0, wasm_i32x4_widen_low_i16x8(vprod1x0)); + vacc1x0 = wasm_i32x4_add(vacc1x0, wasm_i32x4_widen_high_i16x8(vprod1x0)); + const v128_t vxb1 = wasm_i16x8_load_8x8((const void*) ((uintptr_t) w + 8 * sizeof(int8_t))); + + const v128_t vprod0x1 = wasm_i16x8_mul(vxa0, vxb1); + vacc0x1 = wasm_i32x4_add(vacc0x1, wasm_i32x4_widen_low_i16x8(vprod0x1)); + vacc0x1 = wasm_i32x4_add(vacc0x1, wasm_i32x4_widen_high_i16x8(vprod0x1)); + const v128_t vprod1x1 = wasm_i16x8_mul(vxa1, vxb1); + vacc1x1 = wasm_i32x4_add(vacc1x1, wasm_i32x4_widen_low_i16x8(vprod1x1)); + vacc1x1 = wasm_i32x4_add(vacc1x1, wasm_i32x4_widen_high_i16x8(vprod1x1)); + const v128_t vxb2 = wasm_i16x8_load_8x8((const void*) ((uintptr_t) w + 16 * sizeof(int8_t))); + + const v128_t vprod0x2 = wasm_i16x8_mul(vxa0, vxb2); + vacc0x2 = wasm_i32x4_add(vacc0x2, wasm_i32x4_widen_low_i16x8(vprod0x2)); + vacc0x2 = wasm_i32x4_add(vacc0x2, wasm_i32x4_widen_high_i16x8(vprod0x2)); + const v128_t vprod1x2 = wasm_i16x8_mul(vxa1, vxb2); + vacc1x2 = wasm_i32x4_add(vacc1x2, wasm_i32x4_widen_low_i16x8(vprod1x2)); + vacc1x2 = wasm_i32x4_add(vacc1x2, wasm_i32x4_widen_high_i16x8(vprod1x2)); + const v128_t vxb3 = wasm_i16x8_load_8x8((const void*) ((uintptr_t) w + 24 * sizeof(int8_t))); + + const v128_t vprod0x3 = wasm_i16x8_mul(vxa0, vxb3); + vacc0x3 = wasm_i32x4_add(vacc0x3, wasm_i32x4_widen_low_i16x8(vprod0x3)); + vacc0x3 = wasm_i32x4_add(vacc0x3, wasm_i32x4_widen_high_i16x8(vprod0x3)); + const v128_t vprod1x3 = wasm_i16x8_mul(vxa1, vxb3); + vacc1x3 = wasm_i32x4_add(vacc1x3, wasm_i32x4_widen_low_i16x8(vprod1x3)); + vacc1x3 = wasm_i32x4_add(vacc1x3, wasm_i32x4_widen_high_i16x8(vprod1x3)); + + w = (const void*) ((uintptr_t) w + 32 * sizeof(int8_t)); + k += 8 * sizeof(int8_t); + } + + const v128_t vacc0x02 = wasm_i32x4_add(wasm_v32x4_shuffle(vacc0x0, vacc0x2, 0, 4, 1, 5), wasm_v32x4_shuffle(vacc0x0, vacc0x2, 2, 6, 3, 7)); + const v128_t vacc0x13 = wasm_i32x4_add(wasm_v32x4_shuffle(vacc0x1, vacc0x3, 0, 4, 1, 5), wasm_v32x4_shuffle(vacc0x1, vacc0x3, 2, 6, 3, 7)); + const v128_t vacc1x02 = wasm_i32x4_add(wasm_v32x4_shuffle(vacc1x0, vacc1x2, 0, 4, 1, 5), wasm_v32x4_shuffle(vacc1x0, vacc1x2, 2, 6, 3, 7)); + const v128_t vacc1x13 = wasm_i32x4_add(wasm_v32x4_shuffle(vacc1x1, vacc1x3, 0, 4, 1, 5), wasm_v32x4_shuffle(vacc1x1, vacc1x3, 2, 6, 3, 7)); + + v128_t vacc0x0123 = wasm_i32x4_add(wasm_v32x4_shuffle(vacc0x02, vacc0x13, 0, 4, 1, 5), wasm_v32x4_shuffle(vacc0x02, vacc0x13, 2, 6, 3, 7)); + v128_t vacc1x0123 = wasm_i32x4_add(wasm_v32x4_shuffle(vacc1x02, vacc1x13, 0, 4, 1, 5), wasm_v32x4_shuffle(vacc1x02, vacc1x13, 2, 6, 3, 7)); + + const v128_t vsign0x0123 = wasm_i32x4_lt(vacc0x0123, vzero); + const v128_t vsign1x0123 = wasm_i32x4_lt(vacc1x0123, vzero); + + const v128_t vacc0x01 = wasm_v32x4_shuffle(vacc0x0123, vsign0x0123, 0, 4, 1, 5); + const v128_t vacc1x01 = wasm_v32x4_shuffle(vacc1x0123, vsign1x0123, 0, 4, 1, 5); + + const v128_t vmultiplier = wasm_v128_load(params->wasmsimd.multiplier); + const v128_t vrounding = wasm_v128_load(params->wasmsimd.rounding); + const v128_t vprod0x01 = wasm_i64x2_add(wasm_i64x2_mul(vacc0x01, vmultiplier), vrounding); + const v128_t vacc0x23 = wasm_v32x4_shuffle(vacc0x0123, vsign0x0123, 2, 6, 3, 7); + const v128_t vprod1x01 = wasm_i64x2_add(wasm_i64x2_mul(vacc1x01, vmultiplier), vrounding); + const v128_t vacc1x23 = wasm_v32x4_shuffle(vacc1x0123, vsign1x0123, 2, 6, 3, 7); + + const v128_t vprod0x23 = wasm_i64x2_add(wasm_i64x2_mul(vacc0x23, vmultiplier), vrounding); + const v128_t vprod1x23 = wasm_i64x2_add(wasm_i64x2_mul(vacc1x23, vmultiplier), vrounding); + + const v128_t vq31prod0x0123 = wasm_v32x4_shuffle(vprod0x01, vprod0x23, 1, 3, 5, 7); + const v128_t vq31prod1x0123 = wasm_v32x4_shuffle(vprod1x01, vprod1x23, 1, 3, 5, 7); + + const v128_t vremainder_mask = wasm_v128_load(params->wasmsimd.remainder_mask); + const v128_t vrem0x0123 = wasm_i32x4_add(wasm_v128_and(vq31prod0x0123, vremainder_mask), wasm_i32x4_lt(vq31prod0x0123, vzero)); + const v128_t vrem1x0123 = wasm_i32x4_add(wasm_v128_and(vq31prod1x0123, vremainder_mask), wasm_i32x4_lt(vq31prod1x0123, vzero)); + + const v128_t vthreshold = wasm_v128_load(params->wasmsimd.remainder_threshold); + const int32_t vshift = params->wasmsimd.shift; + vacc0x0123 = wasm_i32x4_sub(wasm_i32x4_shr(vq31prod0x0123, vshift), wasm_i32x4_gt(vrem0x0123, vthreshold)); + vacc1x0123 = wasm_i32x4_sub(wasm_i32x4_shr(vq31prod1x0123, vshift), wasm_i32x4_gt(vrem1x0123, vthreshold)); + + const v128_t voutput_zero_point = wasm_v128_load(params->wasmsimd.output_zero_point); + v128_t vacc01x0123 = wasm_i16x8_add_saturate(wasm_i16x8_narrow_i32x4(vacc0x0123, vacc1x0123), voutput_zero_point); + + v128_t vout = wasm_i8x16_narrow_i16x8(vacc01x0123, vacc01x0123); + + const v128_t voutput_min = wasm_v128_load(params->wasmsimd.output_min); + vout = wasm_i8x16_max(vout, voutput_min); + + const v128_t voutput_max = wasm_v128_load(params->wasmsimd.output_max); + vout = wasm_i8x16_min(vout, voutput_max); + + if (nc >= 4) { + *((float*) c0) = (float) wasm_f32x4_extract_lane(vout, 0); + *((float*) c1) = (float) wasm_f32x4_extract_lane(vout, 1); + + a0 = (const int8_t*) ((uintptr_t) a0 - k); + a1 = (const int8_t*) ((uintptr_t) a1 - k); + + c0 = (int8_t*) ((uintptr_t) c0 + cn_stride); + c1 = (int8_t*) ((uintptr_t) c1 + cn_stride); + + nc -= 4; + } else { + if (nc & 2) { + *((uint16_t*) c0) = (uint16_t) wasm_i16x8_extract_lane(vout, 0); + c0 += 2; + *((uint16_t*) c1) = (uint16_t) wasm_i16x8_extract_lane(vout, 2); + c1 += 2; + vout = wasm_u32x4_shr(vout, 16); + } + if (nc & 1) { + *c0 = (int8_t) wasm_i8x16_extract_lane(vout, 0); + *c1 = (int8_t) wasm_i8x16_extract_lane(vout, 4); + } + + nc = 0; + } + } while (nc != 0); +} diff --git a/src/qs8-gemm/gen/2x4c8-xw-minmax-wasmsimd.c b/src/qs8-gemm/gen/2x4c8-xw-minmax-wasmsimd.c new file mode 100644 index 000000000..201af1dc3 --- /dev/null +++ b/src/qs8-gemm/gen/2x4c8-xw-minmax-wasmsimd.c @@ -0,0 +1,177 @@ +// Auto-generated file. Do not edit! +// Template: src/qs8-gemm/MRx4c8-minmax-wasmsimd.c.in +// Generator: tools/xngen +// +// Copyright 2020 Google LLC +// +// This source code is licensed under the BSD-style license found in the +// LICENSE file in the root directory of this source tree. + +#include <assert.h> + +#include <wasm_simd128.h> + +#include <xnnpack/gemm.h> + + +void xnn_qs8_gemm_xw_minmax_ukernel_2x4c8__wasmsimd( + size_t mr, + size_t nc, + size_t kc, + const int8_t* restrict a, + size_t a_stride, + const void* restrict w, + int8_t* restrict c, + size_t cm_stride, + size_t cn_stride, + const union xnn_qs8_gemm_xw_params params[restrict XNN_MIN_ELEMENTS(1)]) XNN_DISABLE_TSAN +{ + assert(mr != 0); + assert(mr <= 2); + assert(nc != 0); + assert(kc != 0); + assert(kc % sizeof(int8_t) == 0); + assert(a != NULL); + assert(w != NULL); + assert(c != NULL); + + const int8_t* a0 = a; + int8_t* c0 = c; + const int8_t* a1 = (const int8_t*) ((uintptr_t) a0 + a_stride); + int8_t* c1 = (int8_t*) ((uintptr_t) c0 + cm_stride); + if XNN_UNPREDICTABLE(mr != 2) { + a1 = a0; + c1 = c0; + } + + const v128_t vzero = wasm_f64x2_splat(0.0); + do { + v128_t vacc0x0 = wasm_f32x4_replace_lane(vzero, 0, ((const float*) w)[0]); + v128_t vacc0x1 = wasm_f32x4_replace_lane(vzero, 0, ((const float*) w)[1]); + v128_t vacc0x2 = wasm_f32x4_replace_lane(vzero, 0, ((const float*) w)[2]); + v128_t vacc0x3 = wasm_f32x4_replace_lane(vzero, 0, ((const float*) w)[3]); + v128_t vacc1x0 = vacc0x0; + v128_t vacc1x1 = vacc0x1; + v128_t vacc1x2 = vacc0x2; + v128_t vacc1x3 = vacc0x3; + w = (const void*) ((uintptr_t) w + 4 * sizeof(int32_t)); + + size_t k = 0; + while (k < kc) { + const v128_t vxa0 = wasm_i16x8_load_8x8(a0); + a0 += 8; + const v128_t vxa1 = wasm_i16x8_load_8x8(a1); + a1 += 8; + + const v128_t vxb0 = wasm_v128_load(w); + + const v128_t vprod0x0 = wasm_i16x8_mul(vxa0, vxb0); + vacc0x0 = wasm_i32x4_add(vacc0x0, wasm_i32x4_widen_low_i16x8(vprod0x0)); + vacc0x0 = wasm_i32x4_add(vacc0x0, wasm_i32x4_widen_high_i16x8(vprod0x0)); + const v128_t vprod1x0 = wasm_i16x8_mul(vxa1, vxb0); + vacc1x0 = wasm_i32x4_add(vacc1x0, wasm_i32x4_widen_low_i16x8(vprod1x0)); + vacc1x0 = wasm_i32x4_add(vacc1x0, wasm_i32x4_widen_high_i16x8(vprod1x0)); + const v128_t vxb1 = wasm_v128_load((const void*) ((uintptr_t) w + 8 * sizeof(int16_t))); + + const v128_t vprod0x1 = wasm_i16x8_mul(vxa0, vxb1); + vacc0x1 = wasm_i32x4_add(vacc0x1, wasm_i32x4_widen_low_i16x8(vprod0x1)); + vacc0x1 = wasm_i32x4_add(vacc0x1, wasm_i32x4_widen_high_i16x8(vprod0x1)); + const v128_t vprod1x1 = wasm_i16x8_mul(vxa1, vxb1); + vacc1x1 = wasm_i32x4_add(vacc1x1, wasm_i32x4_widen_low_i16x8(vprod1x1)); + vacc1x1 = wasm_i32x4_add(vacc1x1, wasm_i32x4_widen_high_i16x8(vprod1x1)); + const v128_t vxb2 = wasm_v128_load((const void*) ((uintptr_t) w + 16 * sizeof(int16_t))); + + const v128_t vprod0x2 = wasm_i16x8_mul(vxa0, vxb2); + vacc0x2 = wasm_i32x4_add(vacc0x2, wasm_i32x4_widen_low_i16x8(vprod0x2)); + vacc0x2 = wasm_i32x4_add(vacc0x2, wasm_i32x4_widen_high_i16x8(vprod0x2)); + const v128_t vprod1x2 = wasm_i16x8_mul(vxa1, vxb2); + vacc1x2 = wasm_i32x4_add(vacc1x2, wasm_i32x4_widen_low_i16x8(vprod1x2)); + vacc1x2 = wasm_i32x4_add(vacc1x2, wasm_i32x4_widen_high_i16x8(vprod1x2)); + const v128_t vxb3 = wasm_v128_load((const void*) ((uintptr_t) w + 24 * sizeof(int16_t))); + + const v128_t vprod0x3 = wasm_i16x8_mul(vxa0, vxb3); + vacc0x3 = wasm_i32x4_add(vacc0x3, wasm_i32x4_widen_low_i16x8(vprod0x3)); + vacc0x3 = wasm_i32x4_add(vacc0x3, wasm_i32x4_widen_high_i16x8(vprod0x3)); + const v128_t vprod1x3 = wasm_i16x8_mul(vxa1, vxb3); + vacc1x3 = wasm_i32x4_add(vacc1x3, wasm_i32x4_widen_low_i16x8(vprod1x3)); + vacc1x3 = wasm_i32x4_add(vacc1x3, wasm_i32x4_widen_high_i16x8(vprod1x3)); + + w = (const void*) ((uintptr_t) w + 32 * sizeof(int16_t)); + k += 8 * sizeof(int8_t); + } + + const v128_t vacc0x02 = wasm_i32x4_add(wasm_v32x4_shuffle(vacc0x0, vacc0x2, 0, 4, 1, 5), wasm_v32x4_shuffle(vacc0x0, vacc0x2, 2, 6, 3, 7)); + const v128_t vacc0x13 = wasm_i32x4_add(wasm_v32x4_shuffle(vacc0x1, vacc0x3, 0, 4, 1, 5), wasm_v32x4_shuffle(vacc0x1, vacc0x3, 2, 6, 3, 7)); + const v128_t vacc1x02 = wasm_i32x4_add(wasm_v32x4_shuffle(vacc1x0, vacc1x2, 0, 4, 1, 5), wasm_v32x4_shuffle(vacc1x0, vacc1x2, 2, 6, 3, 7)); + const v128_t vacc1x13 = wasm_i32x4_add(wasm_v32x4_shuffle(vacc1x1, vacc1x3, 0, 4, 1, 5), wasm_v32x4_shuffle(vacc1x1, vacc1x3, 2, 6, 3, 7)); + + v128_t vacc0x0123 = wasm_i32x4_add(wasm_v32x4_shuffle(vacc0x02, vacc0x13, 0, 4, 1, 5), wasm_v32x4_shuffle(vacc0x02, vacc0x13, 2, 6, 3, 7)); + v128_t vacc1x0123 = wasm_i32x4_add(wasm_v32x4_shuffle(vacc1x02, vacc1x13, 0, 4, 1, 5), wasm_v32x4_shuffle(vacc1x02, vacc1x13, 2, 6, 3, 7)); + + const v128_t vsign0x0123 = wasm_i32x4_lt(vacc0x0123, vzero); + const v128_t vsign1x0123 = wasm_i32x4_lt(vacc1x0123, vzero); + + const v128_t vacc0x01 = wasm_v32x4_shuffle(vacc0x0123, vsign0x0123, 0, 4, 1, 5); + const v128_t vacc1x01 = wasm_v32x4_shuffle(vacc1x0123, vsign1x0123, 0, 4, 1, 5); + + const v128_t vmultiplier = wasm_v128_load(params->wasmsimd.multiplier); + const v128_t vrounding = wasm_v128_load(params->wasmsimd.rounding); + const v128_t vprod0x01 = wasm_i64x2_add(wasm_i64x2_mul(vacc0x01, vmultiplier), vrounding); + const v128_t vacc0x23 = wasm_v32x4_shuffle(vacc0x0123, vsign0x0123, 2, 6, 3, 7); + const v128_t vprod1x01 = wasm_i64x2_add(wasm_i64x2_mul(vacc1x01, vmultiplier), vrounding); + const v128_t vacc1x23 = wasm_v32x4_shuffle(vacc1x0123, vsign1x0123, 2, 6, 3, 7); + + const v128_t vprod0x23 = wasm_i64x2_add(wasm_i64x2_mul(vacc0x23, vmultiplier), vrounding); + const v128_t vprod1x23 = wasm_i64x2_add(wasm_i64x2_mul(vacc1x23, vmultiplier), vrounding); + + const v128_t vq31prod0x0123 = wasm_v32x4_shuffle(vprod0x01, vprod0x23, 1, 3, 5, 7); + const v128_t vq31prod1x0123 = wasm_v32x4_shuffle(vprod1x01, vprod1x23, 1, 3, 5, 7); + + const v128_t vremainder_mask = wasm_v128_load(params->wasmsimd.remainder_mask); + const v128_t vrem0x0123 = wasm_i32x4_add(wasm_v128_and(vq31prod0x0123, vremainder_mask), wasm_i32x4_lt(vq31prod0x0123, vzero)); + const v128_t vrem1x0123 = wasm_i32x4_add(wasm_v128_and(vq31prod1x0123, vremainder_mask), wasm_i32x4_lt(vq31prod1x0123, vzero)); + + const v128_t vthreshold = wasm_v128_load(params->wasmsimd.remainder_threshold); + const int32_t vshift = params->wasmsimd.shift; + vacc0x0123 = wasm_i32x4_sub(wasm_i32x4_shr(vq31prod0x0123, vshift), wasm_i32x4_gt(vrem0x0123, vthreshold)); + vacc1x0123 = wasm_i32x4_sub(wasm_i32x4_shr(vq31prod1x0123, vshift), wasm_i32x4_gt(vrem1x0123, vthreshold)); + + const v128_t voutput_zero_point = wasm_v128_load(params->wasmsimd.output_zero_point); + v128_t vacc01x0123 = wasm_i16x8_add_saturate(wasm_i16x8_narrow_i32x4(vacc0x0123, vacc1x0123), voutput_zero_point); + + v128_t vout = wasm_i8x16_narrow_i16x8(vacc01x0123, vacc01x0123); + + const v128_t voutput_min = wasm_v128_load(params->wasmsimd.output_min); + vout = wasm_i8x16_max(vout, voutput_min); + + const v128_t voutput_max = wasm_v128_load(params->wasmsimd.output_max); + vout = wasm_i8x16_min(vout, voutput_max); + + if (nc >= 4) { + *((float*) c0) = (float) wasm_f32x4_extract_lane(vout, 0); + *((float*) c1) = (float) wasm_f32x4_extract_lane(vout, 1); + + a0 = (const int8_t*) ((uintptr_t) a0 - k); + a1 = (const int8_t*) ((uintptr_t) a1 - k); + + c0 = (int8_t*) ((uintptr_t) c0 + cn_stride); + c1 = (int8_t*) ((uintptr_t) c1 + cn_stride); + + nc -= 4; + } else { + if (nc & 2) { + *((uint16_t*) c0) = (uint16_t) wasm_i16x8_extract_lane(vout, 0); + c0 += 2; + *((uint16_t*) c1) = (uint16_t) wasm_i16x8_extract_lane(vout, 2); + c1 += 2; + vout = wasm_u32x4_shr(vout, 16); + } + if (nc & 1) { + *c0 = (int8_t) wasm_i8x16_extract_lane(vout, 0); + *c1 = (int8_t) wasm_i8x16_extract_lane(vout, 4); + } + + nc = 0; + } + } while (nc != 0); +} diff --git a/src/qs8-gemm/gen/3x4c8-minmax-wasmsimd-ld128.c b/src/qs8-gemm/gen/3x4c8-minmax-wasmsimd-ld128.c new file mode 100644 index 000000000..112991083 --- /dev/null +++ b/src/qs8-gemm/gen/3x4c8-minmax-wasmsimd-ld128.c @@ -0,0 +1,223 @@ +// Auto-generated file. Do not edit! +// Template: src/qs8-gemm/MRx4c8-minmax-wasmsimd.c.in +// Generator: tools/xngen +// +// Copyright 2020 Google LLC +// +// This source code is licensed under the BSD-style license found in the +// LICENSE file in the root directory of this source tree. + +#include <assert.h> + +#include <wasm_simd128.h> + +#include <xnnpack/gemm.h> + + +void xnn_qs8_gemm_minmax_ukernel_3x4c8__wasmsimd_ld128( + size_t mr, + size_t nc, + size_t kc, + const int8_t* restrict a, + size_t a_stride, + const void* restrict w, + int8_t* restrict c, + size_t cm_stride, + size_t cn_stride, + const union xnn_qs8_gemm_params params[restrict XNN_MIN_ELEMENTS(1)]) XNN_DISABLE_TSAN +{ + assert(mr != 0); + assert(mr <= 3); + assert(nc != 0); + assert(kc != 0); + assert(kc % sizeof(int8_t) == 0); + assert(a != NULL); + assert(w != NULL); + assert(c != NULL); + + const int8_t* a0 = a; + int8_t* c0 = c; + const int8_t* a1 = (const int8_t*) ((uintptr_t) a0 + a_stride); + int8_t* c1 = (int8_t*) ((uintptr_t) c0 + cm_stride); + if XNN_UNPREDICTABLE(mr < 2) { + a1 = a0; + c1 = c0; + } + const int8_t* a2 = (const int8_t*) ((uintptr_t) a1 + a_stride); + int8_t* c2 = (int8_t*) ((uintptr_t) c1 + cm_stride); + if XNN_UNPREDICTABLE(mr <= 2) { + a2 = a1; + c2 = c1; + } + + const v128_t vzero = wasm_f64x2_splat(0.0); + do { + v128_t vacc0x0 = wasm_f32x4_replace_lane(vzero, 0, ((const float*) w)[0]); + v128_t vacc0x1 = wasm_f32x4_replace_lane(vzero, 0, ((const float*) w)[1]); + v128_t vacc0x2 = wasm_f32x4_replace_lane(vzero, 0, ((const float*) w)[2]); + v128_t vacc0x3 = wasm_f32x4_replace_lane(vzero, 0, ((const float*) w)[3]); + v128_t vacc1x0 = vacc0x0; + v128_t vacc1x1 = vacc0x1; + v128_t vacc1x2 = vacc0x2; + v128_t vacc1x3 = vacc0x3; + v128_t vacc2x0 = vacc0x0; + v128_t vacc2x1 = vacc0x1; + v128_t vacc2x2 = vacc0x2; + v128_t vacc2x3 = vacc0x3; + w = (const void*) ((uintptr_t) w + 4 * sizeof(int32_t)); + + size_t k = 0; + while (k < kc) { + const v128_t vxa0 = wasm_i16x8_load_8x8(a0); + a0 += 8; + const v128_t vxa1 = wasm_i16x8_load_8x8(a1); + a1 += 8; + const v128_t vxa2 = wasm_i16x8_load_8x8(a2); + a2 += 8; + + const v128_t vb01 = wasm_v128_load(w); + const v128_t vxb0 = wasm_i16x8_widen_low_i8x16(vb01); + const v128_t vxb1 = wasm_i16x8_widen_high_i8x16(vb01); + + const v128_t vprod0x0 = wasm_i16x8_mul(vxb0, vxa0); + vacc0x0 = wasm_i32x4_add(vacc0x0, wasm_i32x4_widen_low_i16x8(vprod0x0)); + const v128_t vprod1x0 = wasm_i16x8_mul(vxb0, vxa1); + vacc1x0 = wasm_i32x4_add(vacc1x0, wasm_i32x4_widen_low_i16x8(vprod1x0)); + const v128_t vprod2x0 = wasm_i16x8_mul(vxb0, vxa2); + vacc2x0 = wasm_i32x4_add(vacc2x0, wasm_i32x4_widen_low_i16x8(vprod2x0)); + + const v128_t vprod0x1 = wasm_i16x8_mul(vxb1, vxa0); + vacc0x1 = wasm_i32x4_add(vacc0x1, wasm_i32x4_widen_low_i16x8(vprod0x1)); + vacc0x0 = wasm_i32x4_add(vacc0x0, wasm_i32x4_widen_high_i16x8(vprod0x0)); + const v128_t vprod1x1 = wasm_i16x8_mul(vxb1, vxa1); + vacc1x1 = wasm_i32x4_add(vacc1x1, wasm_i32x4_widen_low_i16x8(vprod1x1)); + vacc1x0 = wasm_i32x4_add(vacc1x0, wasm_i32x4_widen_high_i16x8(vprod1x0)); + const v128_t vprod2x1 = wasm_i16x8_mul(vxb1, vxa2); + vacc2x1 = wasm_i32x4_add(vacc2x1, wasm_i32x4_widen_low_i16x8(vprod2x1)); + vacc2x0 = wasm_i32x4_add(vacc2x0, wasm_i32x4_widen_high_i16x8(vprod2x0)); + + vacc0x1 = wasm_i32x4_add(vacc0x1, wasm_i32x4_widen_high_i16x8(vprod0x1)); + vacc1x1 = wasm_i32x4_add(vacc1x1, wasm_i32x4_widen_high_i16x8(vprod1x1)); + vacc2x1 = wasm_i32x4_add(vacc2x1, wasm_i32x4_widen_high_i16x8(vprod2x1)); + const v128_t vb23 = wasm_v128_load((const void*) ((uintptr_t) w + 16 * sizeof(int8_t))); + const v128_t vxb2 = wasm_i16x8_widen_low_i8x16(vb23); + const v128_t vxb3 = wasm_i16x8_widen_high_i8x16(vb23); + + const v128_t vprod0x2 = wasm_i16x8_mul(vxb2, vxa0); + vacc0x2 = wasm_i32x4_add(vacc0x2, wasm_i32x4_widen_low_i16x8(vprod0x2)); + const v128_t vprod1x2 = wasm_i16x8_mul(vxb2, vxa1); + vacc1x2 = wasm_i32x4_add(vacc1x2, wasm_i32x4_widen_low_i16x8(vprod1x2)); + const v128_t vprod2x2 = wasm_i16x8_mul(vxb2, vxa2); + vacc2x2 = wasm_i32x4_add(vacc2x2, wasm_i32x4_widen_low_i16x8(vprod2x2)); + + const v128_t vprod0x3 = wasm_i16x8_mul(vxb3, vxa0); + vacc0x3 = wasm_i32x4_add(vacc0x3, wasm_i32x4_widen_low_i16x8(vprod0x3)); + vacc0x2 = wasm_i32x4_add(vacc0x2, wasm_i32x4_widen_high_i16x8(vprod0x2)); + const v128_t vprod1x3 = wasm_i16x8_mul(vxb3, vxa1); + vacc1x3 = wasm_i32x4_add(vacc1x3, wasm_i32x4_widen_low_i16x8(vprod1x3)); + vacc1x2 = wasm_i32x4_add(vacc1x2, wasm_i32x4_widen_high_i16x8(vprod1x2)); + const v128_t vprod2x3 = wasm_i16x8_mul(vxb3, vxa2); + vacc2x3 = wasm_i32x4_add(vacc2x3, wasm_i32x4_widen_low_i16x8(vprod2x3)); + vacc2x2 = wasm_i32x4_add(vacc2x2, wasm_i32x4_widen_high_i16x8(vprod2x2)); + + vacc0x3 = wasm_i32x4_add(vacc0x3, wasm_i32x4_widen_high_i16x8(vprod0x3)); + vacc1x3 = wasm_i32x4_add(vacc1x3, wasm_i32x4_widen_high_i16x8(vprod1x3)); + vacc2x3 = wasm_i32x4_add(vacc2x3, wasm_i32x4_widen_high_i16x8(vprod2x3)); + + w = (const void*) ((uintptr_t) w + 32 * sizeof(int8_t)); + k += 8 * sizeof(int8_t); + } + + const v128_t vacc0x02 = wasm_i32x4_add(wasm_v32x4_shuffle(vacc0x0, vacc0x2, 0, 4, 1, 5), wasm_v32x4_shuffle(vacc0x0, vacc0x2, 2, 6, 3, 7)); + const v128_t vacc0x13 = wasm_i32x4_add(wasm_v32x4_shuffle(vacc0x1, vacc0x3, 0, 4, 1, 5), wasm_v32x4_shuffle(vacc0x1, vacc0x3, 2, 6, 3, 7)); + const v128_t vacc1x02 = wasm_i32x4_add(wasm_v32x4_shuffle(vacc1x0, vacc1x2, 0, 4, 1, 5), wasm_v32x4_shuffle(vacc1x0, vacc1x2, 2, 6, 3, 7)); + const v128_t vacc1x13 = wasm_i32x4_add(wasm_v32x4_shuffle(vacc1x1, vacc1x3, 0, 4, 1, 5), wasm_v32x4_shuffle(vacc1x1, vacc1x3, 2, 6, 3, 7)); + const v128_t vacc2x02 = wasm_i32x4_add(wasm_v32x4_shuffle(vacc2x0, vacc2x2, 0, 4, 1, 5), wasm_v32x4_shuffle(vacc2x0, vacc2x2, 2, 6, 3, 7)); + const v128_t vacc2x13 = wasm_i32x4_add(wasm_v32x4_shuffle(vacc2x1, vacc2x3, 0, 4, 1, 5), wasm_v32x4_shuffle(vacc2x1, vacc2x3, 2, 6, 3, 7)); + + v128_t vacc0x0123 = wasm_i32x4_add(wasm_v32x4_shuffle(vacc0x02, vacc0x13, 0, 4, 1, 5), wasm_v32x4_shuffle(vacc0x02, vacc0x13, 2, 6, 3, 7)); + v128_t vacc1x0123 = wasm_i32x4_add(wasm_v32x4_shuffle(vacc1x02, vacc1x13, 0, 4, 1, 5), wasm_v32x4_shuffle(vacc1x02, vacc1x13, 2, 6, 3, 7)); + v128_t vacc2x0123 = wasm_i32x4_add(wasm_v32x4_shuffle(vacc2x02, vacc2x13, 0, 4, 1, 5), wasm_v32x4_shuffle(vacc2x02, vacc2x13, 2, 6, 3, 7)); + + const v128_t vsign0x0123 = wasm_i32x4_lt(vacc0x0123, vzero); + const v128_t vsign1x0123 = wasm_i32x4_lt(vacc1x0123, vzero); + const v128_t vsign2x0123 = wasm_i32x4_lt(vacc2x0123, vzero); + + const v128_t vacc0x01 = wasm_v32x4_shuffle(vacc0x0123, vsign0x0123, 0, 4, 1, 5); + const v128_t vacc1x01 = wasm_v32x4_shuffle(vacc1x0123, vsign1x0123, 0, 4, 1, 5); + const v128_t vacc2x01 = wasm_v32x4_shuffle(vacc2x0123, vsign2x0123, 0, 4, 1, 5); + + const v128_t vmultiplier = wasm_v128_load(params->wasmsimd.multiplier); + const v128_t vrounding = wasm_v128_load(params->wasmsimd.rounding); + const v128_t vprod0x01 = wasm_i64x2_add(wasm_i64x2_mul(vacc0x01, vmultiplier), vrounding); + const v128_t vacc0x23 = wasm_v32x4_shuffle(vacc0x0123, vsign0x0123, 2, 6, 3, 7); + const v128_t vprod1x01 = wasm_i64x2_add(wasm_i64x2_mul(vacc1x01, vmultiplier), vrounding); + const v128_t vacc1x23 = wasm_v32x4_shuffle(vacc1x0123, vsign1x0123, 2, 6, 3, 7); + const v128_t vprod2x01 = wasm_i64x2_add(wasm_i64x2_mul(vacc2x01, vmultiplier), vrounding); + const v128_t vacc2x23 = wasm_v32x4_shuffle(vacc2x0123, vsign2x0123, 2, 6, 3, 7); + + const v128_t vprod0x23 = wasm_i64x2_add(wasm_i64x2_mul(vacc0x23, vmultiplier), vrounding); + const v128_t vprod1x23 = wasm_i64x2_add(wasm_i64x2_mul(vacc1x23, vmultiplier), vrounding); + const v128_t vprod2x23 = wasm_i64x2_add(wasm_i64x2_mul(vacc2x23, vmultiplier), vrounding); + + const v128_t vq31prod0x0123 = wasm_v32x4_shuffle(vprod0x01, vprod0x23, 1, 3, 5, 7); + const v128_t vq31prod1x0123 = wasm_v32x4_shuffle(vprod1x01, vprod1x23, 1, 3, 5, 7); + const v128_t vq31prod2x0123 = wasm_v32x4_shuffle(vprod2x01, vprod2x23, 1, 3, 5, 7); + + const v128_t vremainder_mask = wasm_v128_load(params->wasmsimd.remainder_mask); + const v128_t vrem0x0123 = wasm_i32x4_add(wasm_v128_and(vq31prod0x0123, vremainder_mask), wasm_i32x4_lt(vq31prod0x0123, vzero)); + const v128_t vrem1x0123 = wasm_i32x4_add(wasm_v128_and(vq31prod1x0123, vremainder_mask), wasm_i32x4_lt(vq31prod1x0123, vzero)); + const v128_t vrem2x0123 = wasm_i32x4_add(wasm_v128_and(vq31prod2x0123, vremainder_mask), wasm_i32x4_lt(vq31prod2x0123, vzero)); + + const v128_t vthreshold = wasm_v128_load(params->wasmsimd.remainder_threshold); + const int32_t vshift = params->wasmsimd.shift; + vacc0x0123 = wasm_i32x4_sub(wasm_i32x4_shr(vq31prod0x0123, vshift), wasm_i32x4_gt(vrem0x0123, vthreshold)); + vacc1x0123 = wasm_i32x4_sub(wasm_i32x4_shr(vq31prod1x0123, vshift), wasm_i32x4_gt(vrem1x0123, vthreshold)); + vacc2x0123 = wasm_i32x4_sub(wasm_i32x4_shr(vq31prod2x0123, vshift), wasm_i32x4_gt(vrem2x0123, vthreshold)); + + const v128_t voutput_zero_point = wasm_v128_load(params->wasmsimd.output_zero_point); + v128_t vacc01x0123 = wasm_i16x8_add_saturate(wasm_i16x8_narrow_i32x4(vacc0x0123, vacc1x0123), voutput_zero_point); + v128_t vacc22x0123 = wasm_i16x8_add_saturate(wasm_i16x8_narrow_i32x4(vacc2x0123, vacc2x0123), voutput_zero_point); + + v128_t vout = wasm_i8x16_narrow_i16x8(vacc01x0123, vacc22x0123); + + const v128_t voutput_min = wasm_v128_load(params->wasmsimd.output_min); + vout = wasm_i8x16_max(vout, voutput_min); + + const v128_t voutput_max = wasm_v128_load(params->wasmsimd.output_max); + vout = wasm_i8x16_min(vout, voutput_max); + + if (nc >= 4) { + *((float*) c0) = (float) wasm_f32x4_extract_lane(vout, 0); + *((float*) c1) = (float) wasm_f32x4_extract_lane(vout, 1); + *((float*) c2) = (float) wasm_f32x4_extract_lane(vout, 2); + + a0 = (const int8_t*) ((uintptr_t) a0 - k); + a1 = (const int8_t*) ((uintptr_t) a1 - k); + a2 = (const int8_t*) ((uintptr_t) a2 - k); + + c0 = (int8_t*) ((uintptr_t) c0 + cn_stride); + c1 = (int8_t*) ((uintptr_t) c1 + cn_stride); + c2 = (int8_t*) ((uintptr_t) c2 + cn_stride); + + nc -= 4; + } else { + if (nc & 2) { + *((uint16_t*) c0) = (uint16_t) wasm_i16x8_extract_lane(vout, 0); + c0 += 2; + *((uint16_t*) c1) = (uint16_t) wasm_i16x8_extract_lane(vout, 2); + c1 += 2; + *((uint16_t*) c2) = (uint16_t) wasm_i16x8_extract_lane(vout, 4); + c2 += 2; + vout = wasm_u32x4_shr(vout, 16); + } + if (nc & 1) { + *c0 = (int8_t) wasm_i8x16_extract_lane(vout, 0); + *c1 = (int8_t) wasm_i8x16_extract_lane(vout, 4); + *c2 = (int8_t) wasm_i8x16_extract_lane(vout, 8); + } + + nc = 0; + } + } while (nc != 0); +} diff --git a/src/qs8-gemm/gen/3x4c8-minmax-wasmsimd-ld64.c b/src/qs8-gemm/gen/3x4c8-minmax-wasmsimd-ld64.c new file mode 100644 index 000000000..63627e4c2 --- /dev/null +++ b/src/qs8-gemm/gen/3x4c8-minmax-wasmsimd-ld64.c @@ -0,0 +1,219 @@ +// Auto-generated file. Do not edit! +// Template: src/qs8-gemm/MRx4c8-minmax-wasmsimd.c.in +// Generator: tools/xngen +// +// Copyright 2020 Google LLC +// +// This source code is licensed under the BSD-style license found in the +// LICENSE file in the root directory of this source tree. + +#include <assert.h> + +#include <wasm_simd128.h> + +#include <xnnpack/gemm.h> + + +void xnn_qs8_gemm_minmax_ukernel_3x4c8__wasmsimd_ld64( + size_t mr, + size_t nc, + size_t kc, + const int8_t* restrict a, + size_t a_stride, + const void* restrict w, + int8_t* restrict c, + size_t cm_stride, + size_t cn_stride, + const union xnn_qs8_gemm_params params[restrict XNN_MIN_ELEMENTS(1)]) XNN_DISABLE_TSAN +{ + assert(mr != 0); + assert(mr <= 3); + assert(nc != 0); + assert(kc != 0); + assert(kc % sizeof(int8_t) == 0); + assert(a != NULL); + assert(w != NULL); + assert(c != NULL); + + const int8_t* a0 = a; + int8_t* c0 = c; + const int8_t* a1 = (const int8_t*) ((uintptr_t) a0 + a_stride); + int8_t* c1 = (int8_t*) ((uintptr_t) c0 + cm_stride); + if XNN_UNPREDICTABLE(mr < 2) { + a1 = a0; + c1 = c0; + } + const int8_t* a2 = (const int8_t*) ((uintptr_t) a1 + a_stride); + int8_t* c2 = (int8_t*) ((uintptr_t) c1 + cm_stride); + if XNN_UNPREDICTABLE(mr <= 2) { + a2 = a1; + c2 = c1; + } + + const v128_t vzero = wasm_f64x2_splat(0.0); + do { + v128_t vacc0x0 = wasm_f32x4_replace_lane(vzero, 0, ((const float*) w)[0]); + v128_t vacc0x1 = wasm_f32x4_replace_lane(vzero, 0, ((const float*) w)[1]); + v128_t vacc0x2 = wasm_f32x4_replace_lane(vzero, 0, ((const float*) w)[2]); + v128_t vacc0x3 = wasm_f32x4_replace_lane(vzero, 0, ((const float*) w)[3]); + v128_t vacc1x0 = vacc0x0; + v128_t vacc1x1 = vacc0x1; + v128_t vacc1x2 = vacc0x2; + v128_t vacc1x3 = vacc0x3; + v128_t vacc2x0 = vacc0x0; + v128_t vacc2x1 = vacc0x1; + v128_t vacc2x2 = vacc0x2; + v128_t vacc2x3 = vacc0x3; + w = (const void*) ((uintptr_t) w + 4 * sizeof(int32_t)); + + size_t k = 0; + while (k < kc) { + const v128_t vxa0 = wasm_i16x8_load_8x8(a0); + a0 += 8; + const v128_t vxa1 = wasm_i16x8_load_8x8(a1); + a1 += 8; + const v128_t vxa2 = wasm_i16x8_load_8x8(a2); + a2 += 8; + + const v128_t vxb0 = wasm_i16x8_load_8x8(w); + + const v128_t vprod0x0 = wasm_i16x8_mul(vxa0, vxb0); + vacc0x0 = wasm_i32x4_add(vacc0x0, wasm_i32x4_widen_low_i16x8(vprod0x0)); + vacc0x0 = wasm_i32x4_add(vacc0x0, wasm_i32x4_widen_high_i16x8(vprod0x0)); + const v128_t vprod1x0 = wasm_i16x8_mul(vxa1, vxb0); + vacc1x0 = wasm_i32x4_add(vacc1x0, wasm_i32x4_widen_low_i16x8(vprod1x0)); + vacc1x0 = wasm_i32x4_add(vacc1x0, wasm_i32x4_widen_high_i16x8(vprod1x0)); + const v128_t vprod2x0 = wasm_i16x8_mul(vxa2, vxb0); + vacc2x0 = wasm_i32x4_add(vacc2x0, wasm_i32x4_widen_low_i16x8(vprod2x0)); + vacc2x0 = wasm_i32x4_add(vacc2x0, wasm_i32x4_widen_high_i16x8(vprod2x0)); + const v128_t vxb1 = wasm_i16x8_load_8x8((const void*) ((uintptr_t) w + 8 * sizeof(int8_t))); + + const v128_t vprod0x1 = wasm_i16x8_mul(vxa0, vxb1); + vacc0x1 = wasm_i32x4_add(vacc0x1, wasm_i32x4_widen_low_i16x8(vprod0x1)); + vacc0x1 = wasm_i32x4_add(vacc0x1, wasm_i32x4_widen_high_i16x8(vprod0x1)); + const v128_t vprod1x1 = wasm_i16x8_mul(vxa1, vxb1); + vacc1x1 = wasm_i32x4_add(vacc1x1, wasm_i32x4_widen_low_i16x8(vprod1x1)); + vacc1x1 = wasm_i32x4_add(vacc1x1, wasm_i32x4_widen_high_i16x8(vprod1x1)); + const v128_t vprod2x1 = wasm_i16x8_mul(vxa2, vxb1); + vacc2x1 = wasm_i32x4_add(vacc2x1, wasm_i32x4_widen_low_i16x8(vprod2x1)); + vacc2x1 = wasm_i32x4_add(vacc2x1, wasm_i32x4_widen_high_i16x8(vprod2x1)); + const v128_t vxb2 = wasm_i16x8_load_8x8((const void*) ((uintptr_t) w + 16 * sizeof(int8_t))); + + const v128_t vprod0x2 = wasm_i16x8_mul(vxa0, vxb2); + vacc0x2 = wasm_i32x4_add(vacc0x2, wasm_i32x4_widen_low_i16x8(vprod0x2)); + vacc0x2 = wasm_i32x4_add(vacc0x2, wasm_i32x4_widen_high_i16x8(vprod0x2)); + const v128_t vprod1x2 = wasm_i16x8_mul(vxa1, vxb2); + vacc1x2 = wasm_i32x4_add(vacc1x2, wasm_i32x4_widen_low_i16x8(vprod1x2)); + vacc1x2 = wasm_i32x4_add(vacc1x2, wasm_i32x4_widen_high_i16x8(vprod1x2)); + const v128_t vprod2x2 = wasm_i16x8_mul(vxa2, vxb2); + vacc2x2 = wasm_i32x4_add(vacc2x2, wasm_i32x4_widen_low_i16x8(vprod2x2)); + vacc2x2 = wasm_i32x4_add(vacc2x2, wasm_i32x4_widen_high_i16x8(vprod2x2)); + const v128_t vxb3 = wasm_i16x8_load_8x8((const void*) ((uintptr_t) w + 24 * sizeof(int8_t))); + + const v128_t vprod0x3 = wasm_i16x8_mul(vxa0, vxb3); + vacc0x3 = wasm_i32x4_add(vacc0x3, wasm_i32x4_widen_low_i16x8(vprod0x3)); + vacc0x3 = wasm_i32x4_add(vacc0x3, wasm_i32x4_widen_high_i16x8(vprod0x3)); + const v128_t vprod1x3 = wasm_i16x8_mul(vxa1, vxb3); + vacc1x3 = wasm_i32x4_add(vacc1x3, wasm_i32x4_widen_low_i16x8(vprod1x3)); + vacc1x3 = wasm_i32x4_add(vacc1x3, wasm_i32x4_widen_high_i16x8(vprod1x3)); + const v128_t vprod2x3 = wasm_i16x8_mul(vxa2, vxb3); + vacc2x3 = wasm_i32x4_add(vacc2x3, wasm_i32x4_widen_low_i16x8(vprod2x3)); + vacc2x3 = wasm_i32x4_add(vacc2x3, wasm_i32x4_widen_high_i16x8(vprod2x3)); + + w = (const void*) ((uintptr_t) w + 32 * sizeof(int8_t)); + k += 8 * sizeof(int8_t); + } + + const v128_t vacc0x02 = wasm_i32x4_add(wasm_v32x4_shuffle(vacc0x0, vacc0x2, 0, 4, 1, 5), wasm_v32x4_shuffle(vacc0x0, vacc0x2, 2, 6, 3, 7)); + const v128_t vacc0x13 = wasm_i32x4_add(wasm_v32x4_shuffle(vacc0x1, vacc0x3, 0, 4, 1, 5), wasm_v32x4_shuffle(vacc0x1, vacc0x3, 2, 6, 3, 7)); + const v128_t vacc1x02 = wasm_i32x4_add(wasm_v32x4_shuffle(vacc1x0, vacc1x2, 0, 4, 1, 5), wasm_v32x4_shuffle(vacc1x0, vacc1x2, 2, 6, 3, 7)); + const v128_t vacc1x13 = wasm_i32x4_add(wasm_v32x4_shuffle(vacc1x1, vacc1x3, 0, 4, 1, 5), wasm_v32x4_shuffle(vacc1x1, vacc1x3, 2, 6, 3, 7)); + const v128_t vacc2x02 = wasm_i32x4_add(wasm_v32x4_shuffle(vacc2x0, vacc2x2, 0, 4, 1, 5), wasm_v32x4_shuffle(vacc2x0, vacc2x2, 2, 6, 3, 7)); + const v128_t vacc2x13 = wasm_i32x4_add(wasm_v32x4_shuffle(vacc2x1, vacc2x3, 0, 4, 1, 5), wasm_v32x4_shuffle(vacc2x1, vacc2x3, 2, 6, 3, 7)); + + v128_t vacc0x0123 = wasm_i32x4_add(wasm_v32x4_shuffle(vacc0x02, vacc0x13, 0, 4, 1, 5), wasm_v32x4_shuffle(vacc0x02, vacc0x13, 2, 6, 3, 7)); + v128_t vacc1x0123 = wasm_i32x4_add(wasm_v32x4_shuffle(vacc1x02, vacc1x13, 0, 4, 1, 5), wasm_v32x4_shuffle(vacc1x02, vacc1x13, 2, 6, 3, 7)); + v128_t vacc2x0123 = wasm_i32x4_add(wasm_v32x4_shuffle(vacc2x02, vacc2x13, 0, 4, 1, 5), wasm_v32x4_shuffle(vacc2x02, vacc2x13, 2, 6, 3, 7)); + + const v128_t vsign0x0123 = wasm_i32x4_lt(vacc0x0123, vzero); + const v128_t vsign1x0123 = wasm_i32x4_lt(vacc1x0123, vzero); + const v128_t vsign2x0123 = wasm_i32x4_lt(vacc2x0123, vzero); + + const v128_t vacc0x01 = wasm_v32x4_shuffle(vacc0x0123, vsign0x0123, 0, 4, 1, 5); + const v128_t vacc1x01 = wasm_v32x4_shuffle(vacc1x0123, vsign1x0123, 0, 4, 1, 5); + const v128_t vacc2x01 = wasm_v32x4_shuffle(vacc2x0123, vsign2x0123, 0, 4, 1, 5); + + const v128_t vmultiplier = wasm_v128_load(params->wasmsimd.multiplier); + const v128_t vrounding = wasm_v128_load(params->wasmsimd.rounding); + const v128_t vprod0x01 = wasm_i64x2_add(wasm_i64x2_mul(vacc0x01, vmultiplier), vrounding); + const v128_t vacc0x23 = wasm_v32x4_shuffle(vacc0x0123, vsign0x0123, 2, 6, 3, 7); + const v128_t vprod1x01 = wasm_i64x2_add(wasm_i64x2_mul(vacc1x01, vmultiplier), vrounding); + const v128_t vacc1x23 = wasm_v32x4_shuffle(vacc1x0123, vsign1x0123, 2, 6, 3, 7); + const v128_t vprod2x01 = wasm_i64x2_add(wasm_i64x2_mul(vacc2x01, vmultiplier), vrounding); + const v128_t vacc2x23 = wasm_v32x4_shuffle(vacc2x0123, vsign2x0123, 2, 6, 3, 7); + + const v128_t vprod0x23 = wasm_i64x2_add(wasm_i64x2_mul(vacc0x23, vmultiplier), vrounding); + const v128_t vprod1x23 = wasm_i64x2_add(wasm_i64x2_mul(vacc1x23, vmultiplier), vrounding); + const v128_t vprod2x23 = wasm_i64x2_add(wasm_i64x2_mul(vacc2x23, vmultiplier), vrounding); + + const v128_t vq31prod0x0123 = wasm_v32x4_shuffle(vprod0x01, vprod0x23, 1, 3, 5, 7); + const v128_t vq31prod1x0123 = wasm_v32x4_shuffle(vprod1x01, vprod1x23, 1, 3, 5, 7); + const v128_t vq31prod2x0123 = wasm_v32x4_shuffle(vprod2x01, vprod2x23, 1, 3, 5, 7); + + const v128_t vremainder_mask = wasm_v128_load(params->wasmsimd.remainder_mask); + const v128_t vrem0x0123 = wasm_i32x4_add(wasm_v128_and(vq31prod0x0123, vremainder_mask), wasm_i32x4_lt(vq31prod0x0123, vzero)); + const v128_t vrem1x0123 = wasm_i32x4_add(wasm_v128_and(vq31prod1x0123, vremainder_mask), wasm_i32x4_lt(vq31prod1x0123, vzero)); + const v128_t vrem2x0123 = wasm_i32x4_add(wasm_v128_and(vq31prod2x0123, vremainder_mask), wasm_i32x4_lt(vq31prod2x0123, vzero)); + + const v128_t vthreshold = wasm_v128_load(params->wasmsimd.remainder_threshold); + const int32_t vshift = params->wasmsimd.shift; + vacc0x0123 = wasm_i32x4_sub(wasm_i32x4_shr(vq31prod0x0123, vshift), wasm_i32x4_gt(vrem0x0123, vthreshold)); + vacc1x0123 = wasm_i32x4_sub(wasm_i32x4_shr(vq31prod1x0123, vshift), wasm_i32x4_gt(vrem1x0123, vthreshold)); + vacc2x0123 = wasm_i32x4_sub(wasm_i32x4_shr(vq31prod2x0123, vshift), wasm_i32x4_gt(vrem2x0123, vthreshold)); + + const v128_t voutput_zero_point = wasm_v128_load(params->wasmsimd.output_zero_point); + v128_t vacc01x0123 = wasm_i16x8_add_saturate(wasm_i16x8_narrow_i32x4(vacc0x0123, vacc1x0123), voutput_zero_point); + v128_t vacc22x0123 = wasm_i16x8_add_saturate(wasm_i16x8_narrow_i32x4(vacc2x0123, vacc2x0123), voutput_zero_point); + + v128_t vout = wasm_i8x16_narrow_i16x8(vacc01x0123, vacc22x0123); + + const v128_t voutput_min = wasm_v128_load(params->wasmsimd.output_min); + vout = wasm_i8x16_max(vout, voutput_min); + + const v128_t voutput_max = wasm_v128_load(params->wasmsimd.output_max); + vout = wasm_i8x16_min(vout, voutput_max); + + if (nc >= 4) { + *((float*) c0) = (float) wasm_f32x4_extract_lane(vout, 0); + *((float*) c1) = (float) wasm_f32x4_extract_lane(vout, 1); + *((float*) c2) = (float) wasm_f32x4_extract_lane(vout, 2); + + a0 = (const int8_t*) ((uintptr_t) a0 - k); + a1 = (const int8_t*) ((uintptr_t) a1 - k); + a2 = (const int8_t*) ((uintptr_t) a2 - k); + + c0 = (int8_t*) ((uintptr_t) c0 + cn_stride); + c1 = (int8_t*) ((uintptr_t) c1 + cn_stride); + c2 = (int8_t*) ((uintptr_t) c2 + cn_stride); + + nc -= 4; + } else { + if (nc & 2) { + *((uint16_t*) c0) = (uint16_t) wasm_i16x8_extract_lane(vout, 0); + c0 += 2; + *((uint16_t*) c1) = (uint16_t) wasm_i16x8_extract_lane(vout, 2); + c1 += 2; + *((uint16_t*) c2) = (uint16_t) wasm_i16x8_extract_lane(vout, 4); + c2 += 2; + vout = wasm_u32x4_shr(vout, 16); + } + if (nc & 1) { + *c0 = (int8_t) wasm_i8x16_extract_lane(vout, 0); + *c1 = (int8_t) wasm_i8x16_extract_lane(vout, 4); + *c2 = (int8_t) wasm_i8x16_extract_lane(vout, 8); + } + + nc = 0; + } + } while (nc != 0); +} diff --git a/src/qs8-gemm/gen/3x4c8-xw-minmax-wasmsimd.c b/src/qs8-gemm/gen/3x4c8-xw-minmax-wasmsimd.c new file mode 100644 index 000000000..0e343b6cf --- /dev/null +++ b/src/qs8-gemm/gen/3x4c8-xw-minmax-wasmsimd.c @@ -0,0 +1,219 @@ +// Auto-generated file. Do not edit! +// Template: src/qs8-gemm/MRx4c8-minmax-wasmsimd.c.in +// Generator: tools/xngen +// +// Copyright 2020 Google LLC +// +// This source code is licensed under the BSD-style license found in the +// LICENSE file in the root directory of this source tree. + +#include <assert.h> + +#include <wasm_simd128.h> + +#include <xnnpack/gemm.h> + + +void xnn_qs8_gemm_xw_minmax_ukernel_3x4c8__wasmsimd( + size_t mr, + size_t nc, + size_t kc, + const int8_t* restrict a, + size_t a_stride, + const void* restrict w, + int8_t* restrict c, + size_t cm_stride, + size_t cn_stride, + const union xnn_qs8_gemm_xw_params params[restrict XNN_MIN_ELEMENTS(1)]) XNN_DISABLE_TSAN +{ + assert(mr != 0); + assert(mr <= 3); + assert(nc != 0); + assert(kc != 0); + assert(kc % sizeof(int8_t) == 0); + assert(a != NULL); + assert(w != NULL); + assert(c != NULL); + + const int8_t* a0 = a; + int8_t* c0 = c; + const int8_t* a1 = (const int8_t*) ((uintptr_t) a0 + a_stride); + int8_t* c1 = (int8_t*) ((uintptr_t) c0 + cm_stride); + if XNN_UNPREDICTABLE(mr < 2) { + a1 = a0; + c1 = c0; + } + const int8_t* a2 = (const int8_t*) ((uintptr_t) a1 + a_stride); + int8_t* c2 = (int8_t*) ((uintptr_t) c1 + cm_stride); + if XNN_UNPREDICTABLE(mr <= 2) { + a2 = a1; + c2 = c1; + } + + const v128_t vzero = wasm_f64x2_splat(0.0); + do { + v128_t vacc0x0 = wasm_f32x4_replace_lane(vzero, 0, ((const float*) w)[0]); + v128_t vacc0x1 = wasm_f32x4_replace_lane(vzero, 0, ((const float*) w)[1]); + v128_t vacc0x2 = wasm_f32x4_replace_lane(vzero, 0, ((const float*) w)[2]); + v128_t vacc0x3 = wasm_f32x4_replace_lane(vzero, 0, ((const float*) w)[3]); + v128_t vacc1x0 = vacc0x0; + v128_t vacc1x1 = vacc0x1; + v128_t vacc1x2 = vacc0x2; + v128_t vacc1x3 = vacc0x3; + v128_t vacc2x0 = vacc0x0; + v128_t vacc2x1 = vacc0x1; + v128_t vacc2x2 = vacc0x2; + v128_t vacc2x3 = vacc0x3; + w = (const void*) ((uintptr_t) w + 4 * sizeof(int32_t)); + + size_t k = 0; + while (k < kc) { + const v128_t vxa0 = wasm_i16x8_load_8x8(a0); + a0 += 8; + const v128_t vxa1 = wasm_i16x8_load_8x8(a1); + a1 += 8; + const v128_t vxa2 = wasm_i16x8_load_8x8(a2); + a2 += 8; + + const v128_t vxb0 = wasm_v128_load(w); + + const v128_t vprod0x0 = wasm_i16x8_mul(vxa0, vxb0); + vacc0x0 = wasm_i32x4_add(vacc0x0, wasm_i32x4_widen_low_i16x8(vprod0x0)); + vacc0x0 = wasm_i32x4_add(vacc0x0, wasm_i32x4_widen_high_i16x8(vprod0x0)); + const v128_t vprod1x0 = wasm_i16x8_mul(vxa1, vxb0); + vacc1x0 = wasm_i32x4_add(vacc1x0, wasm_i32x4_widen_low_i16x8(vprod1x0)); + vacc1x0 = wasm_i32x4_add(vacc1x0, wasm_i32x4_widen_high_i16x8(vprod1x0)); + const v128_t vprod2x0 = wasm_i16x8_mul(vxa2, vxb0); + vacc2x0 = wasm_i32x4_add(vacc2x0, wasm_i32x4_widen_low_i16x8(vprod2x0)); + vacc2x0 = wasm_i32x4_add(vacc2x0, wasm_i32x4_widen_high_i16x8(vprod2x0)); + const v128_t vxb1 = wasm_v128_load((const void*) ((uintptr_t) w + 8 * sizeof(int16_t))); + + const v128_t vprod0x1 = wasm_i16x8_mul(vxa0, vxb1); + vacc0x1 = wasm_i32x4_add(vacc0x1, wasm_i32x4_widen_low_i16x8(vprod0x1)); + vacc0x1 = wasm_i32x4_add(vacc0x1, wasm_i32x4_widen_high_i16x8(vprod0x1)); + const v128_t vprod1x1 = wasm_i16x8_mul(vxa1, vxb1); + vacc1x1 = wasm_i32x4_add(vacc1x1, wasm_i32x4_widen_low_i16x8(vprod1x1)); + vacc1x1 = wasm_i32x4_add(vacc1x1, wasm_i32x4_widen_high_i16x8(vprod1x1)); + const v128_t vprod2x1 = wasm_i16x8_mul(vxa2, vxb1); + vacc2x1 = wasm_i32x4_add(vacc2x1, wasm_i32x4_widen_low_i16x8(vprod2x1)); + vacc2x1 = wasm_i32x4_add(vacc2x1, wasm_i32x4_widen_high_i16x8(vprod2x1)); + const v128_t vxb2 = wasm_v128_load((const void*) ((uintptr_t) w + 16 * sizeof(int16_t))); + + const v128_t vprod0x2 = wasm_i16x8_mul(vxa0, vxb2); + vacc0x2 = wasm_i32x4_add(vacc0x2, wasm_i32x4_widen_low_i16x8(vprod0x2)); + vacc0x2 = wasm_i32x4_add(vacc0x2, wasm_i32x4_widen_high_i16x8(vprod0x2)); + const v128_t vprod1x2 = wasm_i16x8_mul(vxa1, vxb2); + vacc1x2 = wasm_i32x4_add(vacc1x2, wasm_i32x4_widen_low_i16x8(vprod1x2)); + vacc1x2 = wasm_i32x4_add(vacc1x2, wasm_i32x4_widen_high_i16x8(vprod1x2)); + const v128_t vprod2x2 = wasm_i16x8_mul(vxa2, vxb2); + vacc2x2 = wasm_i32x4_add(vacc2x2, wasm_i32x4_widen_low_i16x8(vprod2x2)); + vacc2x2 = wasm_i32x4_add(vacc2x2, wasm_i32x4_widen_high_i16x8(vprod2x2)); + const v128_t vxb3 = wasm_v128_load((const void*) ((uintptr_t) w + 24 * sizeof(int16_t))); + + const v128_t vprod0x3 = wasm_i16x8_mul(vxa0, vxb3); + vacc0x3 = wasm_i32x4_add(vacc0x3, wasm_i32x4_widen_low_i16x8(vprod0x3)); + vacc0x3 = wasm_i32x4_add(vacc0x3, wasm_i32x4_widen_high_i16x8(vprod0x3)); + const v128_t vprod1x3 = wasm_i16x8_mul(vxa1, vxb3); + vacc1x3 = wasm_i32x4_add(vacc1x3, wasm_i32x4_widen_low_i16x8(vprod1x3)); + vacc1x3 = wasm_i32x4_add(vacc1x3, wasm_i32x4_widen_high_i16x8(vprod1x3)); + const v128_t vprod2x3 = wasm_i16x8_mul(vxa2, vxb3); + vacc2x3 = wasm_i32x4_add(vacc2x3, wasm_i32x4_widen_low_i16x8(vprod2x3)); + vacc2x3 = wasm_i32x4_add(vacc2x3, wasm_i32x4_widen_high_i16x8(vprod2x3)); + + w = (const void*) ((uintptr_t) w + 32 * sizeof(int16_t)); + k += 8 * sizeof(int8_t); + } + + const v128_t vacc0x02 = wasm_i32x4_add(wasm_v32x4_shuffle(vacc0x0, vacc0x2, 0, 4, 1, 5), wasm_v32x4_shuffle(vacc0x0, vacc0x2, 2, 6, 3, 7)); + const v128_t vacc0x13 = wasm_i32x4_add(wasm_v32x4_shuffle(vacc0x1, vacc0x3, 0, 4, 1, 5), wasm_v32x4_shuffle(vacc0x1, vacc0x3, 2, 6, 3, 7)); + const v128_t vacc1x02 = wasm_i32x4_add(wasm_v32x4_shuffle(vacc1x0, vacc1x2, 0, 4, 1, 5), wasm_v32x4_shuffle(vacc1x0, vacc1x2, 2, 6, 3, 7)); + const v128_t vacc1x13 = wasm_i32x4_add(wasm_v32x4_shuffle(vacc1x1, vacc1x3, 0, 4, 1, 5), wasm_v32x4_shuffle(vacc1x1, vacc1x3, 2, 6, 3, 7)); + const v128_t vacc2x02 = wasm_i32x4_add(wasm_v32x4_shuffle(vacc2x0, vacc2x2, 0, 4, 1, 5), wasm_v32x4_shuffle(vacc2x0, vacc2x2, 2, 6, 3, 7)); + const v128_t vacc2x13 = wasm_i32x4_add(wasm_v32x4_shuffle(vacc2x1, vacc2x3, 0, 4, 1, 5), wasm_v32x4_shuffle(vacc2x1, vacc2x3, 2, 6, 3, 7)); + + v128_t vacc0x0123 = wasm_i32x4_add(wasm_v32x4_shuffle(vacc0x02, vacc0x13, 0, 4, 1, 5), wasm_v32x4_shuffle(vacc0x02, vacc0x13, 2, 6, 3, 7)); + v128_t vacc1x0123 = wasm_i32x4_add(wasm_v32x4_shuffle(vacc1x02, vacc1x13, 0, 4, 1, 5), wasm_v32x4_shuffle(vacc1x02, vacc1x13, 2, 6, 3, 7)); + v128_t vacc2x0123 = wasm_i32x4_add(wasm_v32x4_shuffle(vacc2x02, vacc2x13, 0, 4, 1, 5), wasm_v32x4_shuffle(vacc2x02, vacc2x13, 2, 6, 3, 7)); + + const v128_t vsign0x0123 = wasm_i32x4_lt(vacc0x0123, vzero); + const v128_t vsign1x0123 = wasm_i32x4_lt(vacc1x0123, vzero); + const v128_t vsign2x0123 = wasm_i32x4_lt(vacc2x0123, vzero); + + const v128_t vacc0x01 = wasm_v32x4_shuffle(vacc0x0123, vsign0x0123, 0, 4, 1, 5); + const v128_t vacc1x01 = wasm_v32x4_shuffle(vacc1x0123, vsign1x0123, 0, 4, 1, 5); + const v128_t vacc2x01 = wasm_v32x4_shuffle(vacc2x0123, vsign2x0123, 0, 4, 1, 5); + + const v128_t vmultiplier = wasm_v128_load(params->wasmsimd.multiplier); + const v128_t vrounding = wasm_v128_load(params->wasmsimd.rounding); + const v128_t vprod0x01 = wasm_i64x2_add(wasm_i64x2_mul(vacc0x01, vmultiplier), vrounding); + const v128_t vacc0x23 = wasm_v32x4_shuffle(vacc0x0123, vsign0x0123, 2, 6, 3, 7); + const v128_t vprod1x01 = wasm_i64x2_add(wasm_i64x2_mul(vacc1x01, vmultiplier), vrounding); + const v128_t vacc1x23 = wasm_v32x4_shuffle(vacc1x0123, vsign1x0123, 2, 6, 3, 7); + const v128_t vprod2x01 = wasm_i64x2_add(wasm_i64x2_mul(vacc2x01, vmultiplier), vrounding); + const v128_t vacc2x23 = wasm_v32x4_shuffle(vacc2x0123, vsign2x0123, 2, 6, 3, 7); + + const v128_t vprod0x23 = wasm_i64x2_add(wasm_i64x2_mul(vacc0x23, vmultiplier), vrounding); + const v128_t vprod1x23 = wasm_i64x2_add(wasm_i64x2_mul(vacc1x23, vmultiplier), vrounding); + const v128_t vprod2x23 = wasm_i64x2_add(wasm_i64x2_mul(vacc2x23, vmultiplier), vrounding); + + const v128_t vq31prod0x0123 = wasm_v32x4_shuffle(vprod0x01, vprod0x23, 1, 3, 5, 7); + const v128_t vq31prod1x0123 = wasm_v32x4_shuffle(vprod1x01, vprod1x23, 1, 3, 5, 7); + const v128_t vq31prod2x0123 = wasm_v32x4_shuffle(vprod2x01, vprod2x23, 1, 3, 5, 7); + + const v128_t vremainder_mask = wasm_v128_load(params->wasmsimd.remainder_mask); + const v128_t vrem0x0123 = wasm_i32x4_add(wasm_v128_and(vq31prod0x0123, vremainder_mask), wasm_i32x4_lt(vq31prod0x0123, vzero)); + const v128_t vrem1x0123 = wasm_i32x4_add(wasm_v128_and(vq31prod1x0123, vremainder_mask), wasm_i32x4_lt(vq31prod1x0123, vzero)); + const v128_t vrem2x0123 = wasm_i32x4_add(wasm_v128_and(vq31prod2x0123, vremainder_mask), wasm_i32x4_lt(vq31prod2x0123, vzero)); + + const v128_t vthreshold = wasm_v128_load(params->wasmsimd.remainder_threshold); + const int32_t vshift = params->wasmsimd.shift; + vacc0x0123 = wasm_i32x4_sub(wasm_i32x4_shr(vq31prod0x0123, vshift), wasm_i32x4_gt(vrem0x0123, vthreshold)); + vacc1x0123 = wasm_i32x4_sub(wasm_i32x4_shr(vq31prod1x0123, vshift), wasm_i32x4_gt(vrem1x0123, vthreshold)); + vacc2x0123 = wasm_i32x4_sub(wasm_i32x4_shr(vq31prod2x0123, vshift), wasm_i32x4_gt(vrem2x0123, vthreshold)); + + const v128_t voutput_zero_point = wasm_v128_load(params->wasmsimd.output_zero_point); + v128_t vacc01x0123 = wasm_i16x8_add_saturate(wasm_i16x8_narrow_i32x4(vacc0x0123, vacc1x0123), voutput_zero_point); + v128_t vacc22x0123 = wasm_i16x8_add_saturate(wasm_i16x8_narrow_i32x4(vacc2x0123, vacc2x0123), voutput_zero_point); + + v128_t vout = wasm_i8x16_narrow_i16x8(vacc01x0123, vacc22x0123); + + const v128_t voutput_min = wasm_v128_load(params->wasmsimd.output_min); + vout = wasm_i8x16_max(vout, voutput_min); + + const v128_t voutput_max = wasm_v128_load(params->wasmsimd.output_max); + vout = wasm_i8x16_min(vout, voutput_max); + + if (nc >= 4) { + *((float*) c0) = (float) wasm_f32x4_extract_lane(vout, 0); + *((float*) c1) = (float) wasm_f32x4_extract_lane(vout, 1); + *((float*) c2) = (float) wasm_f32x4_extract_lane(vout, 2); + + a0 = (const int8_t*) ((uintptr_t) a0 - k); + a1 = (const int8_t*) ((uintptr_t) a1 - k); + a2 = (const int8_t*) ((uintptr_t) a2 - k); + + c0 = (int8_t*) ((uintptr_t) c0 + cn_stride); + c1 = (int8_t*) ((uintptr_t) c1 + cn_stride); + c2 = (int8_t*) ((uintptr_t) c2 + cn_stride); + + nc -= 4; + } else { + if (nc & 2) { + *((uint16_t*) c0) = (uint16_t) wasm_i16x8_extract_lane(vout, 0); + c0 += 2; + *((uint16_t*) c1) = (uint16_t) wasm_i16x8_extract_lane(vout, 2); + c1 += 2; + *((uint16_t*) c2) = (uint16_t) wasm_i16x8_extract_lane(vout, 4); + c2 += 2; + vout = wasm_u32x4_shr(vout, 16); + } + if (nc & 1) { + *c0 = (int8_t) wasm_i8x16_extract_lane(vout, 0); + *c1 = (int8_t) wasm_i8x16_extract_lane(vout, 4); + *c2 = (int8_t) wasm_i8x16_extract_lane(vout, 8); + } + + nc = 0; + } + } while (nc != 0); +} diff --git a/src/qs8-igemm/MRx4c8-minmax-wasmsimd.c.in b/src/qs8-igemm/MRx4c8-minmax-wasmsimd.c.in new file mode 100644 index 000000000..51dc5cb09 --- /dev/null +++ b/src/qs8-igemm/MRx4c8-minmax-wasmsimd.c.in @@ -0,0 +1,203 @@ +// Copyright 2020 Google LLC +// +// This source code is licensed under the BSD-style license found in the +// LICENSE file in the root directory of this source tree. + +$assert VARIANT in ["LD64", "LD128", "EXTENDED"] +$assert MR <= 4 +#include <assert.h> + +#include <wasm_simd128.h> + +#include <xnnpack/gemm.h> + + +$LOAD_SUFFIX = {"LD128": "_ld128", "LD64": "_ld64", "EXTENDED": ""}[VARIANT] +$GEMM_SUFFIX = "_xw" if VARIANT == "EXTENDED" else "" +void xnn_qs8_igemm${GEMM_SUFFIX}_minmax_ukernel_${MR}x4c8__wasmsimd${LOAD_SUFFIX}( + size_t mr, + size_t nc, + size_t kc, + size_t ks, + const int8_t** restrict a, + const void* restrict w, + int8_t* restrict c, + size_t cm_stride, + size_t cn_stride, + size_t a_offset, + const int8_t* zero, + const union xnn_qs8_gemm${GEMM_SUFFIX}_params params[restrict XNN_MIN_ELEMENTS(1)]) XNN_DISABLE_TSAN +{ + assert(mr != 0); + assert(mr <= ${MR}); + assert(nc != 0); + assert(kc != 0); + assert(ks != 0); + assert(ks % (${MR} * sizeof(void*)) == 0); + assert(a_offset % sizeof(int8_t) == 0); + assert(a != NULL); + assert(w != NULL); + assert(c != NULL); + + int8_t* c0 = c; + $for M in range(1, MR): + int8_t* c${M} = (int8_t*) ((uintptr_t) c${M-1} + cm_stride); + $if M % 2 == 0: + if XNN_UNPREDICTABLE(mr <= ${M}) { + c${M} = c${M-1}; + } + $elif M + 1 == MR: + if XNN_UNPREDICTABLE(mr != ${M+1}) { + c${M} = c${M-1}; + } + $else: + if XNN_UNPREDICTABLE(mr < ${M+1}) { + c${M} = c${M-1}; + } + + const v128_t vzero = wasm_f64x2_splat(0.0); + do { + $for N in range(4): + v128_t vacc0x${N} = wasm_f32x4_replace_lane(vzero, 0, ((const float*) w)[${N}]); + $for M in range(1, MR): + $for N in range(4): + v128_t vacc${M}x${N} = vacc0x${N}; + w = (const void*) ((uintptr_t) w + 4 * sizeof(int32_t)); + + size_t p = ks; + do { + $for M in range(MR): + const int8_t* restrict a${M} = a[${M}]; + if XNN_UNPREDICTABLE(a${M} != zero) { + a${M} = (const int8_t*) ((uintptr_t) a${M} + a_offset); + } + a += ${MR}; + + size_t k = 0; + while (k < kc) { + $for M in range(MR): + const v128_t vxa${M} = wasm_i16x8_load_8x8(a${M}); + a${M} += 8; + + $if VARIANT == "LD128": + $for N in range(0, 4, 2): + $if N == 0: + const v128_t vb${N}${N+1} = wasm_v128_load(w); + $else: + const v128_t vb${N}${N+1} = wasm_v128_load((const void*) ((uintptr_t) w + ${N * 8} * sizeof(int8_t))); + const v128_t vxb${N} = wasm_i16x8_widen_low_i8x16(vb${N}${N+1}); + const v128_t vxb${N+1} = wasm_i16x8_widen_high_i8x16(vb${N}${N+1}); + + $for M in range(MR): + const v128_t vprod${M}x${N} = wasm_i16x8_mul(vxb${N}, vxa${M}); + vacc${M}x${N} = wasm_i32x4_add(vacc${M}x${N}, wasm_i32x4_widen_low_i16x8(vprod${M}x${N})); + + $for M in range(MR): + const v128_t vprod${M}x${N+1} = wasm_i16x8_mul(vxb${N+1}, vxa${M}); + vacc${M}x${N+1} = wasm_i32x4_add(vacc${M}x${N+1}, wasm_i32x4_widen_low_i16x8(vprod${M}x${N+1})); + vacc${M}x${N} = wasm_i32x4_add(vacc${M}x${N}, wasm_i32x4_widen_high_i16x8(vprod${M}x${N})); + + $for M in range(MR): + vacc${M}x${N+1} = wasm_i32x4_add(vacc${M}x${N+1}, wasm_i32x4_widen_high_i16x8(vprod${M}x${N+1})); + $else: + $for N in range(4): + $if VARIANT == "LD64": + $if N == 0: + const v128_t vxb${N} = wasm_i16x8_load_8x8(w); + $else: + const v128_t vxb${N} = wasm_i16x8_load_8x8((const void*) ((uintptr_t) w + ${N * 8} * sizeof(int8_t))); + $elif VARIANT == "EXTENDED": + $if N == 0: + const v128_t vxb${N} = wasm_v128_load(w); + $else: + const v128_t vxb${N} = wasm_v128_load((const void*) ((uintptr_t) w + ${N * 8} * sizeof(int16_t))); + + $for M in range(MR): + const v128_t vprod${M}x${N} = wasm_i16x8_mul(vxa${M}, vxb${N}); + vacc${M}x${N} = wasm_i32x4_add(vacc${M}x${N}, wasm_i32x4_widen_low_i16x8(vprod${M}x${N})); + vacc${M}x${N} = wasm_i32x4_add(vacc${M}x${N}, wasm_i32x4_widen_high_i16x8(vprod${M}x${N})); + + $if VARIANT == "EXTENDED": + w = (const void*) ((uintptr_t) w + 32 * sizeof(int16_t)); + $else: + w = (const void*) ((uintptr_t) w + 32 * sizeof(int8_t)); + k += 8 * sizeof(int8_t); + } + p -= ${MR} * sizeof(void*); + } while (p != 0); + + $for M in range(MR): + const v128_t vacc${M}x02 = wasm_i32x4_add(wasm_v32x4_shuffle(vacc${M}x0, vacc${M}x2, 0, 4, 1, 5), wasm_v32x4_shuffle(vacc${M}x0, vacc${M}x2, 2, 6, 3, 7)); + const v128_t vacc${M}x13 = wasm_i32x4_add(wasm_v32x4_shuffle(vacc${M}x1, vacc${M}x3, 0, 4, 1, 5), wasm_v32x4_shuffle(vacc${M}x1, vacc${M}x3, 2, 6, 3, 7)); + + $for M in range(MR): + v128_t vacc${M}x0123 = wasm_i32x4_add(wasm_v32x4_shuffle(vacc${M}x02, vacc${M}x13, 0, 4, 1, 5), wasm_v32x4_shuffle(vacc${M}x02, vacc${M}x13, 2, 6, 3, 7)); + + $for M in range(MR): + const v128_t vsign${M}x0123 = wasm_i32x4_lt(vacc${M}x0123, vzero); + + $for M in range(MR): + const v128_t vacc${M}x01 = wasm_v32x4_shuffle(vacc${M}x0123, vsign${M}x0123, 0, 4, 1, 5); + + const v128_t vmultiplier = wasm_v128_load(params->wasmsimd.multiplier); + const v128_t vrounding = wasm_v128_load(params->wasmsimd.rounding); + $for M in range(MR): + const v128_t vprod${M}x01 = wasm_i64x2_add(wasm_i64x2_mul(vacc${M}x01, vmultiplier), vrounding); + const v128_t vacc${M}x23 = wasm_v32x4_shuffle(vacc${M}x0123, vsign${M}x0123, 2, 6, 3, 7); + + $for M in range(MR): + const v128_t vprod${M}x23 = wasm_i64x2_add(wasm_i64x2_mul(vacc${M}x23, vmultiplier), vrounding); + + $for M in range(MR): + const v128_t vq31prod${M}x0123 = wasm_v32x4_shuffle(vprod${M}x01, vprod${M}x23, 1, 3, 5, 7); + + const v128_t vremainder_mask = wasm_v128_load(params->wasmsimd.remainder_mask); + $for M in range(MR): + const v128_t vrem${M}x0123 = wasm_i32x4_add(wasm_v128_and(vq31prod${M}x0123, vremainder_mask), wasm_i32x4_lt(vq31prod${M}x0123, vzero)); + + const v128_t vthreshold = wasm_v128_load(params->wasmsimd.remainder_threshold); + const int32_t vshift = params->wasmsimd.shift; + $for M in range(MR): + vacc${M}x0123 = wasm_i32x4_sub(wasm_i32x4_shr(vq31prod${M}x0123, vshift), wasm_i32x4_gt(vrem${M}x0123, vthreshold)); + + const v128_t voutput_zero_point = wasm_v128_load(params->wasmsimd.output_zero_point); + $for M in range(0, MR, 2): + v128_t vacc${M}${min(M+1, MR-1)}x0123 = wasm_i16x8_add_saturate(wasm_i16x8_narrow_i32x4(vacc${M}x0123, vacc${min(M+1, MR-1)}x0123), voutput_zero_point); + + $if MR > 2: + v128_t vout = wasm_i8x16_narrow_i16x8(vacc0${min(1, MR-1)}x0123, vacc${min(2, MR-1)}${min(3, MR-1)}x0123); + $else: + v128_t vout = wasm_i8x16_narrow_i16x8(vacc0${min(1, MR-1)}x0123, vacc0${min(1, MR-1)}x0123); + + const v128_t voutput_min = wasm_v128_load(params->wasmsimd.output_min); + vout = wasm_i8x16_max(vout, voutput_min); + + const v128_t voutput_max = wasm_v128_load(params->wasmsimd.output_max); + vout = wasm_i8x16_min(vout, voutput_max); + + if (nc >= 4) { + $for M in reversed(range(MR)): + *((float*) c${M}) = (float) wasm_f32x4_extract_lane(vout, ${M}); + + $for M in reversed(range(MR)): + c${M} = (int8_t*) ((uintptr_t) c${M} + cn_stride); + + a = (const int8_t**restrict) ((uintptr_t) a - ks); + + nc -= 4; + } else { + if (nc & 2) { + $for M in reversed(range(MR)): + *((uint16_t*) c${M}) = (uint16_t) wasm_i16x8_extract_lane(vout, ${M * 2}); + c${M} += 2; + vout = wasm_u32x4_shr(vout, 16); + } + if (nc & 1) { + $for M in reversed(range(MR)): + *c${M} = (int8_t) wasm_i8x16_extract_lane(vout, ${M * 4}); + } + + nc = 0; + } + } while (nc != 0); +} diff --git a/src/qs8-igemm/gen/1x4c8-minmax-wasmsimd-ld128.c b/src/qs8-igemm/gen/1x4c8-minmax-wasmsimd-ld128.c new file mode 100644 index 000000000..1c607df43 --- /dev/null +++ b/src/qs8-igemm/gen/1x4c8-minmax-wasmsimd-ld128.c @@ -0,0 +1,153 @@ +// Auto-generated file. Do not edit! +// Template: src/qs8-igemm/MRx4c8-minmax-wasmsimd.c.in +// Generator: tools/xngen +// +// Copyright 2020 Google LLC +// +// This source code is licensed under the BSD-style license found in the +// LICENSE file in the root directory of this source tree. + +#include <assert.h> + +#include <wasm_simd128.h> + +#include <xnnpack/gemm.h> + + +void xnn_qs8_igemm_minmax_ukernel_1x4c8__wasmsimd_ld128( + size_t mr, + size_t nc, + size_t kc, + size_t ks, + const int8_t** restrict a, + const void* restrict w, + int8_t* restrict c, + size_t cm_stride, + size_t cn_stride, + size_t a_offset, + const int8_t* zero, + const union xnn_qs8_gemm_params params[restrict XNN_MIN_ELEMENTS(1)]) XNN_DISABLE_TSAN +{ + assert(mr != 0); + assert(mr <= 1); + assert(nc != 0); + assert(kc != 0); + assert(ks != 0); + assert(ks % (1 * sizeof(void*)) == 0); + assert(a_offset % sizeof(int8_t) == 0); + assert(a != NULL); + assert(w != NULL); + assert(c != NULL); + + int8_t* c0 = c; + + const v128_t vzero = wasm_f64x2_splat(0.0); + do { + v128_t vacc0x0 = wasm_f32x4_replace_lane(vzero, 0, ((const float*) w)[0]); + v128_t vacc0x1 = wasm_f32x4_replace_lane(vzero, 0, ((const float*) w)[1]); + v128_t vacc0x2 = wasm_f32x4_replace_lane(vzero, 0, ((const float*) w)[2]); + v128_t vacc0x3 = wasm_f32x4_replace_lane(vzero, 0, ((const float*) w)[3]); + w = (const void*) ((uintptr_t) w + 4 * sizeof(int32_t)); + + size_t p = ks; + do { + const int8_t* restrict a0 = a[0]; + if XNN_UNPREDICTABLE(a0 != zero) { + a0 = (const int8_t*) ((uintptr_t) a0 + a_offset); + } + a += 1; + + size_t k = 0; + while (k < kc) { + const v128_t vxa0 = wasm_i16x8_load_8x8(a0); + a0 += 8; + + const v128_t vb01 = wasm_v128_load(w); + const v128_t vxb0 = wasm_i16x8_widen_low_i8x16(vb01); + const v128_t vxb1 = wasm_i16x8_widen_high_i8x16(vb01); + + const v128_t vprod0x0 = wasm_i16x8_mul(vxb0, vxa0); + vacc0x0 = wasm_i32x4_add(vacc0x0, wasm_i32x4_widen_low_i16x8(vprod0x0)); + + const v128_t vprod0x1 = wasm_i16x8_mul(vxb1, vxa0); + vacc0x1 = wasm_i32x4_add(vacc0x1, wasm_i32x4_widen_low_i16x8(vprod0x1)); + vacc0x0 = wasm_i32x4_add(vacc0x0, wasm_i32x4_widen_high_i16x8(vprod0x0)); + + vacc0x1 = wasm_i32x4_add(vacc0x1, wasm_i32x4_widen_high_i16x8(vprod0x1)); + const v128_t vb23 = wasm_v128_load((const void*) ((uintptr_t) w + 16 * sizeof(int8_t))); + const v128_t vxb2 = wasm_i16x8_widen_low_i8x16(vb23); + const v128_t vxb3 = wasm_i16x8_widen_high_i8x16(vb23); + + const v128_t vprod0x2 = wasm_i16x8_mul(vxb2, vxa0); + vacc0x2 = wasm_i32x4_add(vacc0x2, wasm_i32x4_widen_low_i16x8(vprod0x2)); + + const v128_t vprod0x3 = wasm_i16x8_mul(vxb3, vxa0); + vacc0x3 = wasm_i32x4_add(vacc0x3, wasm_i32x4_widen_low_i16x8(vprod0x3)); + vacc0x2 = wasm_i32x4_add(vacc0x2, wasm_i32x4_widen_high_i16x8(vprod0x2)); + + vacc0x3 = wasm_i32x4_add(vacc0x3, wasm_i32x4_widen_high_i16x8(vprod0x3)); + + w = (const void*) ((uintptr_t) w + 32 * sizeof(int8_t)); + k += 8 * sizeof(int8_t); + } + p -= 1 * sizeof(void*); + } while (p != 0); + + const v128_t vacc0x02 = wasm_i32x4_add(wasm_v32x4_shuffle(vacc0x0, vacc0x2, 0, 4, 1, 5), wasm_v32x4_shuffle(vacc0x0, vacc0x2, 2, 6, 3, 7)); + const v128_t vacc0x13 = wasm_i32x4_add(wasm_v32x4_shuffle(vacc0x1, vacc0x3, 0, 4, 1, 5), wasm_v32x4_shuffle(vacc0x1, vacc0x3, 2, 6, 3, 7)); + + v128_t vacc0x0123 = wasm_i32x4_add(wasm_v32x4_shuffle(vacc0x02, vacc0x13, 0, 4, 1, 5), wasm_v32x4_shuffle(vacc0x02, vacc0x13, 2, 6, 3, 7)); + + const v128_t vsign0x0123 = wasm_i32x4_lt(vacc0x0123, vzero); + + const v128_t vacc0x01 = wasm_v32x4_shuffle(vacc0x0123, vsign0x0123, 0, 4, 1, 5); + + const v128_t vmultiplier = wasm_v128_load(params->wasmsimd.multiplier); + const v128_t vrounding = wasm_v128_load(params->wasmsimd.rounding); + const v128_t vprod0x01 = wasm_i64x2_add(wasm_i64x2_mul(vacc0x01, vmultiplier), vrounding); + const v128_t vacc0x23 = wasm_v32x4_shuffle(vacc0x0123, vsign0x0123, 2, 6, 3, 7); + + const v128_t vprod0x23 = wasm_i64x2_add(wasm_i64x2_mul(vacc0x23, vmultiplier), vrounding); + + const v128_t vq31prod0x0123 = wasm_v32x4_shuffle(vprod0x01, vprod0x23, 1, 3, 5, 7); + + const v128_t vremainder_mask = wasm_v128_load(params->wasmsimd.remainder_mask); + const v128_t vrem0x0123 = wasm_i32x4_add(wasm_v128_and(vq31prod0x0123, vremainder_mask), wasm_i32x4_lt(vq31prod0x0123, vzero)); + + const v128_t vthreshold = wasm_v128_load(params->wasmsimd.remainder_threshold); + const int32_t vshift = params->wasmsimd.shift; + vacc0x0123 = wasm_i32x4_sub(wasm_i32x4_shr(vq31prod0x0123, vshift), wasm_i32x4_gt(vrem0x0123, vthreshold)); + + const v128_t voutput_zero_point = wasm_v128_load(params->wasmsimd.output_zero_point); + v128_t vacc00x0123 = wasm_i16x8_add_saturate(wasm_i16x8_narrow_i32x4(vacc0x0123, vacc0x0123), voutput_zero_point); + + v128_t vout = wasm_i8x16_narrow_i16x8(vacc00x0123, vacc00x0123); + + const v128_t voutput_min = wasm_v128_load(params->wasmsimd.output_min); + vout = wasm_i8x16_max(vout, voutput_min); + + const v128_t voutput_max = wasm_v128_load(params->wasmsimd.output_max); + vout = wasm_i8x16_min(vout, voutput_max); + + if (nc >= 4) { + *((float*) c0) = (float) wasm_f32x4_extract_lane(vout, 0); + + c0 = (int8_t*) ((uintptr_t) c0 + cn_stride); + + a = (const int8_t**restrict) ((uintptr_t) a - ks); + + nc -= 4; + } else { + if (nc & 2) { + *((uint16_t*) c0) = (uint16_t) wasm_i16x8_extract_lane(vout, 0); + c0 += 2; + vout = wasm_u32x4_shr(vout, 16); + } + if (nc & 1) { + *c0 = (int8_t) wasm_i8x16_extract_lane(vout, 0); + } + + nc = 0; + } + } while (nc != 0); +} diff --git a/src/qs8-igemm/gen/1x4c8-minmax-wasmsimd-ld64.c b/src/qs8-igemm/gen/1x4c8-minmax-wasmsimd-ld64.c new file mode 100644 index 000000000..c95a83188 --- /dev/null +++ b/src/qs8-igemm/gen/1x4c8-minmax-wasmsimd-ld64.c @@ -0,0 +1,149 @@ +// Auto-generated file. Do not edit! +// Template: src/qs8-igemm/MRx4c8-minmax-wasmsimd.c.in +// Generator: tools/xngen +// +// Copyright 2020 Google LLC +// +// This source code is licensed under the BSD-style license found in the +// LICENSE file in the root directory of this source tree. + +#include <assert.h> + +#include <wasm_simd128.h> + +#include <xnnpack/gemm.h> + + +void xnn_qs8_igemm_minmax_ukernel_1x4c8__wasmsimd_ld64( + size_t mr, + size_t nc, + size_t kc, + size_t ks, + const int8_t** restrict a, + const void* restrict w, + int8_t* restrict c, + size_t cm_stride, + size_t cn_stride, + size_t a_offset, + const int8_t* zero, + const union xnn_qs8_gemm_params params[restrict XNN_MIN_ELEMENTS(1)]) XNN_DISABLE_TSAN +{ + assert(mr != 0); + assert(mr <= 1); + assert(nc != 0); + assert(kc != 0); + assert(ks != 0); + assert(ks % (1 * sizeof(void*)) == 0); + assert(a_offset % sizeof(int8_t) == 0); + assert(a != NULL); + assert(w != NULL); + assert(c != NULL); + + int8_t* c0 = c; + + const v128_t vzero = wasm_f64x2_splat(0.0); + do { + v128_t vacc0x0 = wasm_f32x4_replace_lane(vzero, 0, ((const float*) w)[0]); + v128_t vacc0x1 = wasm_f32x4_replace_lane(vzero, 0, ((const float*) w)[1]); + v128_t vacc0x2 = wasm_f32x4_replace_lane(vzero, 0, ((const float*) w)[2]); + v128_t vacc0x3 = wasm_f32x4_replace_lane(vzero, 0, ((const float*) w)[3]); + w = (const void*) ((uintptr_t) w + 4 * sizeof(int32_t)); + + size_t p = ks; + do { + const int8_t* restrict a0 = a[0]; + if XNN_UNPREDICTABLE(a0 != zero) { + a0 = (const int8_t*) ((uintptr_t) a0 + a_offset); + } + a += 1; + + size_t k = 0; + while (k < kc) { + const v128_t vxa0 = wasm_i16x8_load_8x8(a0); + a0 += 8; + + const v128_t vxb0 = wasm_i16x8_load_8x8(w); + + const v128_t vprod0x0 = wasm_i16x8_mul(vxa0, vxb0); + vacc0x0 = wasm_i32x4_add(vacc0x0, wasm_i32x4_widen_low_i16x8(vprod0x0)); + vacc0x0 = wasm_i32x4_add(vacc0x0, wasm_i32x4_widen_high_i16x8(vprod0x0)); + const v128_t vxb1 = wasm_i16x8_load_8x8((const void*) ((uintptr_t) w + 8 * sizeof(int8_t))); + + const v128_t vprod0x1 = wasm_i16x8_mul(vxa0, vxb1); + vacc0x1 = wasm_i32x4_add(vacc0x1, wasm_i32x4_widen_low_i16x8(vprod0x1)); + vacc0x1 = wasm_i32x4_add(vacc0x1, wasm_i32x4_widen_high_i16x8(vprod0x1)); + const v128_t vxb2 = wasm_i16x8_load_8x8((const void*) ((uintptr_t) w + 16 * sizeof(int8_t))); + + const v128_t vprod0x2 = wasm_i16x8_mul(vxa0, vxb2); + vacc0x2 = wasm_i32x4_add(vacc0x2, wasm_i32x4_widen_low_i16x8(vprod0x2)); + vacc0x2 = wasm_i32x4_add(vacc0x2, wasm_i32x4_widen_high_i16x8(vprod0x2)); + const v128_t vxb3 = wasm_i16x8_load_8x8((const void*) ((uintptr_t) w + 24 * sizeof(int8_t))); + + const v128_t vprod0x3 = wasm_i16x8_mul(vxa0, vxb3); + vacc0x3 = wasm_i32x4_add(vacc0x3, wasm_i32x4_widen_low_i16x8(vprod0x3)); + vacc0x3 = wasm_i32x4_add(vacc0x3, wasm_i32x4_widen_high_i16x8(vprod0x3)); + + w = (const void*) ((uintptr_t) w + 32 * sizeof(int8_t)); + k += 8 * sizeof(int8_t); + } + p -= 1 * sizeof(void*); + } while (p != 0); + + const v128_t vacc0x02 = wasm_i32x4_add(wasm_v32x4_shuffle(vacc0x0, vacc0x2, 0, 4, 1, 5), wasm_v32x4_shuffle(vacc0x0, vacc0x2, 2, 6, 3, 7)); + const v128_t vacc0x13 = wasm_i32x4_add(wasm_v32x4_shuffle(vacc0x1, vacc0x3, 0, 4, 1, 5), wasm_v32x4_shuffle(vacc0x1, vacc0x3, 2, 6, 3, 7)); + + v128_t vacc0x0123 = wasm_i32x4_add(wasm_v32x4_shuffle(vacc0x02, vacc0x13, 0, 4, 1, 5), wasm_v32x4_shuffle(vacc0x02, vacc0x13, 2, 6, 3, 7)); + + const v128_t vsign0x0123 = wasm_i32x4_lt(vacc0x0123, vzero); + + const v128_t vacc0x01 = wasm_v32x4_shuffle(vacc0x0123, vsign0x0123, 0, 4, 1, 5); + + const v128_t vmultiplier = wasm_v128_load(params->wasmsimd.multiplier); + const v128_t vrounding = wasm_v128_load(params->wasmsimd.rounding); + const v128_t vprod0x01 = wasm_i64x2_add(wasm_i64x2_mul(vacc0x01, vmultiplier), vrounding); + const v128_t vacc0x23 = wasm_v32x4_shuffle(vacc0x0123, vsign0x0123, 2, 6, 3, 7); + + const v128_t vprod0x23 = wasm_i64x2_add(wasm_i64x2_mul(vacc0x23, vmultiplier), vrounding); + + const v128_t vq31prod0x0123 = wasm_v32x4_shuffle(vprod0x01, vprod0x23, 1, 3, 5, 7); + + const v128_t vremainder_mask = wasm_v128_load(params->wasmsimd.remainder_mask); + const v128_t vrem0x0123 = wasm_i32x4_add(wasm_v128_and(vq31prod0x0123, vremainder_mask), wasm_i32x4_lt(vq31prod0x0123, vzero)); + + const v128_t vthreshold = wasm_v128_load(params->wasmsimd.remainder_threshold); + const int32_t vshift = params->wasmsimd.shift; + vacc0x0123 = wasm_i32x4_sub(wasm_i32x4_shr(vq31prod0x0123, vshift), wasm_i32x4_gt(vrem0x0123, vthreshold)); + + const v128_t voutput_zero_point = wasm_v128_load(params->wasmsimd.output_zero_point); + v128_t vacc00x0123 = wasm_i16x8_add_saturate(wasm_i16x8_narrow_i32x4(vacc0x0123, vacc0x0123), voutput_zero_point); + + v128_t vout = wasm_i8x16_narrow_i16x8(vacc00x0123, vacc00x0123); + + const v128_t voutput_min = wasm_v128_load(params->wasmsimd.output_min); + vout = wasm_i8x16_max(vout, voutput_min); + + const v128_t voutput_max = wasm_v128_load(params->wasmsimd.output_max); + vout = wasm_i8x16_min(vout, voutput_max); + + if (nc >= 4) { + *((float*) c0) = (float) wasm_f32x4_extract_lane(vout, 0); + + c0 = (int8_t*) ((uintptr_t) c0 + cn_stride); + + a = (const int8_t**restrict) ((uintptr_t) a - ks); + + nc -= 4; + } else { + if (nc & 2) { + *((uint16_t*) c0) = (uint16_t) wasm_i16x8_extract_lane(vout, 0); + c0 += 2; + vout = wasm_u32x4_shr(vout, 16); + } + if (nc & 1) { + *c0 = (int8_t) wasm_i8x16_extract_lane(vout, 0); + } + + nc = 0; + } + } while (nc != 0); +} diff --git a/src/qs8-igemm/gen/2x4c8-minmax-wasmsimd-ld128.c b/src/qs8-igemm/gen/2x4c8-minmax-wasmsimd-ld128.c new file mode 100644 index 000000000..69b585b15 --- /dev/null +++ b/src/qs8-igemm/gen/2x4c8-minmax-wasmsimd-ld128.c @@ -0,0 +1,195 @@ +// Auto-generated file. Do not edit! +// Template: src/qs8-igemm/MRx4c8-minmax-wasmsimd.c.in +// Generator: tools/xngen +// +// Copyright 2020 Google LLC +// +// This source code is licensed under the BSD-style license found in the +// LICENSE file in the root directory of this source tree. + +#include <assert.h> + +#include <wasm_simd128.h> + +#include <xnnpack/gemm.h> + + +void xnn_qs8_igemm_minmax_ukernel_2x4c8__wasmsimd_ld128( + size_t mr, + size_t nc, + size_t kc, + size_t ks, + const int8_t** restrict a, + const void* restrict w, + int8_t* restrict c, + size_t cm_stride, + size_t cn_stride, + size_t a_offset, + const int8_t* zero, + const union xnn_qs8_gemm_params params[restrict XNN_MIN_ELEMENTS(1)]) XNN_DISABLE_TSAN +{ + assert(mr != 0); + assert(mr <= 2); + assert(nc != 0); + assert(kc != 0); + assert(ks != 0); + assert(ks % (2 * sizeof(void*)) == 0); + assert(a_offset % sizeof(int8_t) == 0); + assert(a != NULL); + assert(w != NULL); + assert(c != NULL); + + int8_t* c0 = c; + int8_t* c1 = (int8_t*) ((uintptr_t) c0 + cm_stride); + if XNN_UNPREDICTABLE(mr != 2) { + c1 = c0; + } + + const v128_t vzero = wasm_f64x2_splat(0.0); + do { + v128_t vacc0x0 = wasm_f32x4_replace_lane(vzero, 0, ((const float*) w)[0]); + v128_t vacc0x1 = wasm_f32x4_replace_lane(vzero, 0, ((const float*) w)[1]); + v128_t vacc0x2 = wasm_f32x4_replace_lane(vzero, 0, ((const float*) w)[2]); + v128_t vacc0x3 = wasm_f32x4_replace_lane(vzero, 0, ((const float*) w)[3]); + v128_t vacc1x0 = vacc0x0; + v128_t vacc1x1 = vacc0x1; + v128_t vacc1x2 = vacc0x2; + v128_t vacc1x3 = vacc0x3; + w = (const void*) ((uintptr_t) w + 4 * sizeof(int32_t)); + + size_t p = ks; + do { + const int8_t* restrict a0 = a[0]; + if XNN_UNPREDICTABLE(a0 != zero) { + a0 = (const int8_t*) ((uintptr_t) a0 + a_offset); + } + const int8_t* restrict a1 = a[1]; + if XNN_UNPREDICTABLE(a1 != zero) { + a1 = (const int8_t*) ((uintptr_t) a1 + a_offset); + } + a += 2; + + size_t k = 0; + while (k < kc) { + const v128_t vxa0 = wasm_i16x8_load_8x8(a0); + a0 += 8; + const v128_t vxa1 = wasm_i16x8_load_8x8(a1); + a1 += 8; + + const v128_t vb01 = wasm_v128_load(w); + const v128_t vxb0 = wasm_i16x8_widen_low_i8x16(vb01); + const v128_t vxb1 = wasm_i16x8_widen_high_i8x16(vb01); + + const v128_t vprod0x0 = wasm_i16x8_mul(vxb0, vxa0); + vacc0x0 = wasm_i32x4_add(vacc0x0, wasm_i32x4_widen_low_i16x8(vprod0x0)); + const v128_t vprod1x0 = wasm_i16x8_mul(vxb0, vxa1); + vacc1x0 = wasm_i32x4_add(vacc1x0, wasm_i32x4_widen_low_i16x8(vprod1x0)); + + const v128_t vprod0x1 = wasm_i16x8_mul(vxb1, vxa0); + vacc0x1 = wasm_i32x4_add(vacc0x1, wasm_i32x4_widen_low_i16x8(vprod0x1)); + vacc0x0 = wasm_i32x4_add(vacc0x0, wasm_i32x4_widen_high_i16x8(vprod0x0)); + const v128_t vprod1x1 = wasm_i16x8_mul(vxb1, vxa1); + vacc1x1 = wasm_i32x4_add(vacc1x1, wasm_i32x4_widen_low_i16x8(vprod1x1)); + vacc1x0 = wasm_i32x4_add(vacc1x0, wasm_i32x4_widen_high_i16x8(vprod1x0)); + + vacc0x1 = wasm_i32x4_add(vacc0x1, wasm_i32x4_widen_high_i16x8(vprod0x1)); + vacc1x1 = wasm_i32x4_add(vacc1x1, wasm_i32x4_widen_high_i16x8(vprod1x1)); + const v128_t vb23 = wasm_v128_load((const void*) ((uintptr_t) w + 16 * sizeof(int8_t))); + const v128_t vxb2 = wasm_i16x8_widen_low_i8x16(vb23); + const v128_t vxb3 = wasm_i16x8_widen_high_i8x16(vb23); + + const v128_t vprod0x2 = wasm_i16x8_mul(vxb2, vxa0); + vacc0x2 = wasm_i32x4_add(vacc0x2, wasm_i32x4_widen_low_i16x8(vprod0x2)); + const v128_t vprod1x2 = wasm_i16x8_mul(vxb2, vxa1); + vacc1x2 = wasm_i32x4_add(vacc1x2, wasm_i32x4_widen_low_i16x8(vprod1x2)); + + const v128_t vprod0x3 = wasm_i16x8_mul(vxb3, vxa0); + vacc0x3 = wasm_i32x4_add(vacc0x3, wasm_i32x4_widen_low_i16x8(vprod0x3)); + vacc0x2 = wasm_i32x4_add(vacc0x2, wasm_i32x4_widen_high_i16x8(vprod0x2)); + const v128_t vprod1x3 = wasm_i16x8_mul(vxb3, vxa1); + vacc1x3 = wasm_i32x4_add(vacc1x3, wasm_i32x4_widen_low_i16x8(vprod1x3)); + vacc1x2 = wasm_i32x4_add(vacc1x2, wasm_i32x4_widen_high_i16x8(vprod1x2)); + + vacc0x3 = wasm_i32x4_add(vacc0x3, wasm_i32x4_widen_high_i16x8(vprod0x3)); + vacc1x3 = wasm_i32x4_add(vacc1x3, wasm_i32x4_widen_high_i16x8(vprod1x3)); + + w = (const void*) ((uintptr_t) w + 32 * sizeof(int8_t)); + k += 8 * sizeof(int8_t); + } + p -= 2 * sizeof(void*); + } while (p != 0); + + const v128_t vacc0x02 = wasm_i32x4_add(wasm_v32x4_shuffle(vacc0x0, vacc0x2, 0, 4, 1, 5), wasm_v32x4_shuffle(vacc0x0, vacc0x2, 2, 6, 3, 7)); + const v128_t vacc0x13 = wasm_i32x4_add(wasm_v32x4_shuffle(vacc0x1, vacc0x3, 0, 4, 1, 5), wasm_v32x4_shuffle(vacc0x1, vacc0x3, 2, 6, 3, 7)); + const v128_t vacc1x02 = wasm_i32x4_add(wasm_v32x4_shuffle(vacc1x0, vacc1x2, 0, 4, 1, 5), wasm_v32x4_shuffle(vacc1x0, vacc1x2, 2, 6, 3, 7)); + const v128_t vacc1x13 = wasm_i32x4_add(wasm_v32x4_shuffle(vacc1x1, vacc1x3, 0, 4, 1, 5), wasm_v32x4_shuffle(vacc1x1, vacc1x3, 2, 6, 3, 7)); + + v128_t vacc0x0123 = wasm_i32x4_add(wasm_v32x4_shuffle(vacc0x02, vacc0x13, 0, 4, 1, 5), wasm_v32x4_shuffle(vacc0x02, vacc0x13, 2, 6, 3, 7)); + v128_t vacc1x0123 = wasm_i32x4_add(wasm_v32x4_shuffle(vacc1x02, vacc1x13, 0, 4, 1, 5), wasm_v32x4_shuffle(vacc1x02, vacc1x13, 2, 6, 3, 7)); + + const v128_t vsign0x0123 = wasm_i32x4_lt(vacc0x0123, vzero); + const v128_t vsign1x0123 = wasm_i32x4_lt(vacc1x0123, vzero); + + const v128_t vacc0x01 = wasm_v32x4_shuffle(vacc0x0123, vsign0x0123, 0, 4, 1, 5); + const v128_t vacc1x01 = wasm_v32x4_shuffle(vacc1x0123, vsign1x0123, 0, 4, 1, 5); + + const v128_t vmultiplier = wasm_v128_load(params->wasmsimd.multiplier); + const v128_t vrounding = wasm_v128_load(params->wasmsimd.rounding); + const v128_t vprod0x01 = wasm_i64x2_add(wasm_i64x2_mul(vacc0x01, vmultiplier), vrounding); + const v128_t vacc0x23 = wasm_v32x4_shuffle(vacc0x0123, vsign0x0123, 2, 6, 3, 7); + const v128_t vprod1x01 = wasm_i64x2_add(wasm_i64x2_mul(vacc1x01, vmultiplier), vrounding); + const v128_t vacc1x23 = wasm_v32x4_shuffle(vacc1x0123, vsign1x0123, 2, 6, 3, 7); + + const v128_t vprod0x23 = wasm_i64x2_add(wasm_i64x2_mul(vacc0x23, vmultiplier), vrounding); + const v128_t vprod1x23 = wasm_i64x2_add(wasm_i64x2_mul(vacc1x23, vmultiplier), vrounding); + + const v128_t vq31prod0x0123 = wasm_v32x4_shuffle(vprod0x01, vprod0x23, 1, 3, 5, 7); + const v128_t vq31prod1x0123 = wasm_v32x4_shuffle(vprod1x01, vprod1x23, 1, 3, 5, 7); + + const v128_t vremainder_mask = wasm_v128_load(params->wasmsimd.remainder_mask); + const v128_t vrem0x0123 = wasm_i32x4_add(wasm_v128_and(vq31prod0x0123, vremainder_mask), wasm_i32x4_lt(vq31prod0x0123, vzero)); + const v128_t vrem1x0123 = wasm_i32x4_add(wasm_v128_and(vq31prod1x0123, vremainder_mask), wasm_i32x4_lt(vq31prod1x0123, vzero)); + + const v128_t vthreshold = wasm_v128_load(params->wasmsimd.remainder_threshold); + const int32_t vshift = params->wasmsimd.shift; + vacc0x0123 = wasm_i32x4_sub(wasm_i32x4_shr(vq31prod0x0123, vshift), wasm_i32x4_gt(vrem0x0123, vthreshold)); + vacc1x0123 = wasm_i32x4_sub(wasm_i32x4_shr(vq31prod1x0123, vshift), wasm_i32x4_gt(vrem1x0123, vthreshold)); + + const v128_t voutput_zero_point = wasm_v128_load(params->wasmsimd.output_zero_point); + v128_t vacc01x0123 = wasm_i16x8_add_saturate(wasm_i16x8_narrow_i32x4(vacc0x0123, vacc1x0123), voutput_zero_point); + + v128_t vout = wasm_i8x16_narrow_i16x8(vacc01x0123, vacc01x0123); + + const v128_t voutput_min = wasm_v128_load(params->wasmsimd.output_min); + vout = wasm_i8x16_max(vout, voutput_min); + + const v128_t voutput_max = wasm_v128_load(params->wasmsimd.output_max); + vout = wasm_i8x16_min(vout, voutput_max); + + if (nc >= 4) { + *((float*) c1) = (float) wasm_f32x4_extract_lane(vout, 1); + *((float*) c0) = (float) wasm_f32x4_extract_lane(vout, 0); + + c1 = (int8_t*) ((uintptr_t) c1 + cn_stride); + c0 = (int8_t*) ((uintptr_t) c0 + cn_stride); + + a = (const int8_t**restrict) ((uintptr_t) a - ks); + + nc -= 4; + } else { + if (nc & 2) { + *((uint16_t*) c1) = (uint16_t) wasm_i16x8_extract_lane(vout, 2); + c1 += 2; + *((uint16_t*) c0) = (uint16_t) wasm_i16x8_extract_lane(vout, 0); + c0 += 2; + vout = wasm_u32x4_shr(vout, 16); + } + if (nc & 1) { + *c1 = (int8_t) wasm_i8x16_extract_lane(vout, 4); + *c0 = (int8_t) wasm_i8x16_extract_lane(vout, 0); + } + + nc = 0; + } + } while (nc != 0); +} diff --git a/src/qs8-igemm/gen/2x4c8-minmax-wasmsimd-ld64.c b/src/qs8-igemm/gen/2x4c8-minmax-wasmsimd-ld64.c new file mode 100644 index 000000000..f27c1f784 --- /dev/null +++ b/src/qs8-igemm/gen/2x4c8-minmax-wasmsimd-ld64.c @@ -0,0 +1,191 @@ +// Auto-generated file. Do not edit! +// Template: src/qs8-igemm/MRx4c8-minmax-wasmsimd.c.in +// Generator: tools/xngen +// +// Copyright 2020 Google LLC +// +// This source code is licensed under the BSD-style license found in the +// LICENSE file in the root directory of this source tree. + +#include <assert.h> + +#include <wasm_simd128.h> + +#include <xnnpack/gemm.h> + + +void xnn_qs8_igemm_minmax_ukernel_2x4c8__wasmsimd_ld64( + size_t mr, + size_t nc, + size_t kc, + size_t ks, + const int8_t** restrict a, + const void* restrict w, + int8_t* restrict c, + size_t cm_stride, + size_t cn_stride, + size_t a_offset, + const int8_t* zero, + const union xnn_qs8_gemm_params params[restrict XNN_MIN_ELEMENTS(1)]) XNN_DISABLE_TSAN +{ + assert(mr != 0); + assert(mr <= 2); + assert(nc != 0); + assert(kc != 0); + assert(ks != 0); + assert(ks % (2 * sizeof(void*)) == 0); + assert(a_offset % sizeof(int8_t) == 0); + assert(a != NULL); + assert(w != NULL); + assert(c != NULL); + + int8_t* c0 = c; + int8_t* c1 = (int8_t*) ((uintptr_t) c0 + cm_stride); + if XNN_UNPREDICTABLE(mr != 2) { + c1 = c0; + } + + const v128_t vzero = wasm_f64x2_splat(0.0); + do { + v128_t vacc0x0 = wasm_f32x4_replace_lane(vzero, 0, ((const float*) w)[0]); + v128_t vacc0x1 = wasm_f32x4_replace_lane(vzero, 0, ((const float*) w)[1]); + v128_t vacc0x2 = wasm_f32x4_replace_lane(vzero, 0, ((const float*) w)[2]); + v128_t vacc0x3 = wasm_f32x4_replace_lane(vzero, 0, ((const float*) w)[3]); + v128_t vacc1x0 = vacc0x0; + v128_t vacc1x1 = vacc0x1; + v128_t vacc1x2 = vacc0x2; + v128_t vacc1x3 = vacc0x3; + w = (const void*) ((uintptr_t) w + 4 * sizeof(int32_t)); + + size_t p = ks; + do { + const int8_t* restrict a0 = a[0]; + if XNN_UNPREDICTABLE(a0 != zero) { + a0 = (const int8_t*) ((uintptr_t) a0 + a_offset); + } + const int8_t* restrict a1 = a[1]; + if XNN_UNPREDICTABLE(a1 != zero) { + a1 = (const int8_t*) ((uintptr_t) a1 + a_offset); + } + a += 2; + + size_t k = 0; + while (k < kc) { + const v128_t vxa0 = wasm_i16x8_load_8x8(a0); + a0 += 8; + const v128_t vxa1 = wasm_i16x8_load_8x8(a1); + a1 += 8; + + const v128_t vxb0 = wasm_i16x8_load_8x8(w); + + const v128_t vprod0x0 = wasm_i16x8_mul(vxa0, vxb0); + vacc0x0 = wasm_i32x4_add(vacc0x0, wasm_i32x4_widen_low_i16x8(vprod0x0)); + vacc0x0 = wasm_i32x4_add(vacc0x0, wasm_i32x4_widen_high_i16x8(vprod0x0)); + const v128_t vprod1x0 = wasm_i16x8_mul(vxa1, vxb0); + vacc1x0 = wasm_i32x4_add(vacc1x0, wasm_i32x4_widen_low_i16x8(vprod1x0)); + vacc1x0 = wasm_i32x4_add(vacc1x0, wasm_i32x4_widen_high_i16x8(vprod1x0)); + const v128_t vxb1 = wasm_i16x8_load_8x8((const void*) ((uintptr_t) w + 8 * sizeof(int8_t))); + + const v128_t vprod0x1 = wasm_i16x8_mul(vxa0, vxb1); + vacc0x1 = wasm_i32x4_add(vacc0x1, wasm_i32x4_widen_low_i16x8(vprod0x1)); + vacc0x1 = wasm_i32x4_add(vacc0x1, wasm_i32x4_widen_high_i16x8(vprod0x1)); + const v128_t vprod1x1 = wasm_i16x8_mul(vxa1, vxb1); + vacc1x1 = wasm_i32x4_add(vacc1x1, wasm_i32x4_widen_low_i16x8(vprod1x1)); + vacc1x1 = wasm_i32x4_add(vacc1x1, wasm_i32x4_widen_high_i16x8(vprod1x1)); + const v128_t vxb2 = wasm_i16x8_load_8x8((const void*) ((uintptr_t) w + 16 * sizeof(int8_t))); + + const v128_t vprod0x2 = wasm_i16x8_mul(vxa0, vxb2); + vacc0x2 = wasm_i32x4_add(vacc0x2, wasm_i32x4_widen_low_i16x8(vprod0x2)); + vacc0x2 = wasm_i32x4_add(vacc0x2, wasm_i32x4_widen_high_i16x8(vprod0x2)); + const v128_t vprod1x2 = wasm_i16x8_mul(vxa1, vxb2); + vacc1x2 = wasm_i32x4_add(vacc1x2, wasm_i32x4_widen_low_i16x8(vprod1x2)); + vacc1x2 = wasm_i32x4_add(vacc1x2, wasm_i32x4_widen_high_i16x8(vprod1x2)); + const v128_t vxb3 = wasm_i16x8_load_8x8((const void*) ((uintptr_t) w + 24 * sizeof(int8_t))); + + const v128_t vprod0x3 = wasm_i16x8_mul(vxa0, vxb3); + vacc0x3 = wasm_i32x4_add(vacc0x3, wasm_i32x4_widen_low_i16x8(vprod0x3)); + vacc0x3 = wasm_i32x4_add(vacc0x3, wasm_i32x4_widen_high_i16x8(vprod0x3)); + const v128_t vprod1x3 = wasm_i16x8_mul(vxa1, vxb3); + vacc1x3 = wasm_i32x4_add(vacc1x3, wasm_i32x4_widen_low_i16x8(vprod1x3)); + vacc1x3 = wasm_i32x4_add(vacc1x3, wasm_i32x4_widen_high_i16x8(vprod1x3)); + + w = (const void*) ((uintptr_t) w + 32 * sizeof(int8_t)); + k += 8 * sizeof(int8_t); + } + p -= 2 * sizeof(void*); + } while (p != 0); + + const v128_t vacc0x02 = wasm_i32x4_add(wasm_v32x4_shuffle(vacc0x0, vacc0x2, 0, 4, 1, 5), wasm_v32x4_shuffle(vacc0x0, vacc0x2, 2, 6, 3, 7)); + const v128_t vacc0x13 = wasm_i32x4_add(wasm_v32x4_shuffle(vacc0x1, vacc0x3, 0, 4, 1, 5), wasm_v32x4_shuffle(vacc0x1, vacc0x3, 2, 6, 3, 7)); + const v128_t vacc1x02 = wasm_i32x4_add(wasm_v32x4_shuffle(vacc1x0, vacc1x2, 0, 4, 1, 5), wasm_v32x4_shuffle(vacc1x0, vacc1x2, 2, 6, 3, 7)); + const v128_t vacc1x13 = wasm_i32x4_add(wasm_v32x4_shuffle(vacc1x1, vacc1x3, 0, 4, 1, 5), wasm_v32x4_shuffle(vacc1x1, vacc1x3, 2, 6, 3, 7)); + + v128_t vacc0x0123 = wasm_i32x4_add(wasm_v32x4_shuffle(vacc0x02, vacc0x13, 0, 4, 1, 5), wasm_v32x4_shuffle(vacc0x02, vacc0x13, 2, 6, 3, 7)); + v128_t vacc1x0123 = wasm_i32x4_add(wasm_v32x4_shuffle(vacc1x02, vacc1x13, 0, 4, 1, 5), wasm_v32x4_shuffle(vacc1x02, vacc1x13, 2, 6, 3, 7)); + + const v128_t vsign0x0123 = wasm_i32x4_lt(vacc0x0123, vzero); + const v128_t vsign1x0123 = wasm_i32x4_lt(vacc1x0123, vzero); + + const v128_t vacc0x01 = wasm_v32x4_shuffle(vacc0x0123, vsign0x0123, 0, 4, 1, 5); + const v128_t vacc1x01 = wasm_v32x4_shuffle(vacc1x0123, vsign1x0123, 0, 4, 1, 5); + + const v128_t vmultiplier = wasm_v128_load(params->wasmsimd.multiplier); + const v128_t vrounding = wasm_v128_load(params->wasmsimd.rounding); + const v128_t vprod0x01 = wasm_i64x2_add(wasm_i64x2_mul(vacc0x01, vmultiplier), vrounding); + const v128_t vacc0x23 = wasm_v32x4_shuffle(vacc0x0123, vsign0x0123, 2, 6, 3, 7); + const v128_t vprod1x01 = wasm_i64x2_add(wasm_i64x2_mul(vacc1x01, vmultiplier), vrounding); + const v128_t vacc1x23 = wasm_v32x4_shuffle(vacc1x0123, vsign1x0123, 2, 6, 3, 7); + + const v128_t vprod0x23 = wasm_i64x2_add(wasm_i64x2_mul(vacc0x23, vmultiplier), vrounding); + const v128_t vprod1x23 = wasm_i64x2_add(wasm_i64x2_mul(vacc1x23, vmultiplier), vrounding); + + const v128_t vq31prod0x0123 = wasm_v32x4_shuffle(vprod0x01, vprod0x23, 1, 3, 5, 7); + const v128_t vq31prod1x0123 = wasm_v32x4_shuffle(vprod1x01, vprod1x23, 1, 3, 5, 7); + + const v128_t vremainder_mask = wasm_v128_load(params->wasmsimd.remainder_mask); + const v128_t vrem0x0123 = wasm_i32x4_add(wasm_v128_and(vq31prod0x0123, vremainder_mask), wasm_i32x4_lt(vq31prod0x0123, vzero)); + const v128_t vrem1x0123 = wasm_i32x4_add(wasm_v128_and(vq31prod1x0123, vremainder_mask), wasm_i32x4_lt(vq31prod1x0123, vzero)); + + const v128_t vthreshold = wasm_v128_load(params->wasmsimd.remainder_threshold); + const int32_t vshift = params->wasmsimd.shift; + vacc0x0123 = wasm_i32x4_sub(wasm_i32x4_shr(vq31prod0x0123, vshift), wasm_i32x4_gt(vrem0x0123, vthreshold)); + vacc1x0123 = wasm_i32x4_sub(wasm_i32x4_shr(vq31prod1x0123, vshift), wasm_i32x4_gt(vrem1x0123, vthreshold)); + + const v128_t voutput_zero_point = wasm_v128_load(params->wasmsimd.output_zero_point); + v128_t vacc01x0123 = wasm_i16x8_add_saturate(wasm_i16x8_narrow_i32x4(vacc0x0123, vacc1x0123), voutput_zero_point); + + v128_t vout = wasm_i8x16_narrow_i16x8(vacc01x0123, vacc01x0123); + + const v128_t voutput_min = wasm_v128_load(params->wasmsimd.output_min); + vout = wasm_i8x16_max(vout, voutput_min); + + const v128_t voutput_max = wasm_v128_load(params->wasmsimd.output_max); + vout = wasm_i8x16_min(vout, voutput_max); + + if (nc >= 4) { + *((float*) c1) = (float) wasm_f32x4_extract_lane(vout, 1); + *((float*) c0) = (float) wasm_f32x4_extract_lane(vout, 0); + + c1 = (int8_t*) ((uintptr_t) c1 + cn_stride); + c0 = (int8_t*) ((uintptr_t) c0 + cn_stride); + + a = (const int8_t**restrict) ((uintptr_t) a - ks); + + nc -= 4; + } else { + if (nc & 2) { + *((uint16_t*) c1) = (uint16_t) wasm_i16x8_extract_lane(vout, 2); + c1 += 2; + *((uint16_t*) c0) = (uint16_t) wasm_i16x8_extract_lane(vout, 0); + c0 += 2; + vout = wasm_u32x4_shr(vout, 16); + } + if (nc & 1) { + *c1 = (int8_t) wasm_i8x16_extract_lane(vout, 4); + *c0 = (int8_t) wasm_i8x16_extract_lane(vout, 0); + } + + nc = 0; + } + } while (nc != 0); +} diff --git a/src/qs8-igemm/gen/3x4c8-minmax-wasmsimd-ld128.c b/src/qs8-igemm/gen/3x4c8-minmax-wasmsimd-ld128.c new file mode 100644 index 000000000..efe7c1cf9 --- /dev/null +++ b/src/qs8-igemm/gen/3x4c8-minmax-wasmsimd-ld128.c @@ -0,0 +1,238 @@ +// Auto-generated file. Do not edit! +// Template: src/qs8-igemm/MRx4c8-minmax-wasmsimd.c.in +// Generator: tools/xngen +// +// Copyright 2020 Google LLC +// +// This source code is licensed under the BSD-style license found in the +// LICENSE file in the root directory of this source tree. + +#include <assert.h> + +#include <wasm_simd128.h> + +#include <xnnpack/gemm.h> + + +void xnn_qs8_igemm_minmax_ukernel_3x4c8__wasmsimd_ld128( + size_t mr, + size_t nc, + size_t kc, + size_t ks, + const int8_t** restrict a, + const void* restrict w, + int8_t* restrict c, + size_t cm_stride, + size_t cn_stride, + size_t a_offset, + const int8_t* zero, + const union xnn_qs8_gemm_params params[restrict XNN_MIN_ELEMENTS(1)]) XNN_DISABLE_TSAN +{ + assert(mr != 0); + assert(mr <= 3); + assert(nc != 0); + assert(kc != 0); + assert(ks != 0); + assert(ks % (3 * sizeof(void*)) == 0); + assert(a_offset % sizeof(int8_t) == 0); + assert(a != NULL); + assert(w != NULL); + assert(c != NULL); + + int8_t* c0 = c; + int8_t* c1 = (int8_t*) ((uintptr_t) c0 + cm_stride); + if XNN_UNPREDICTABLE(mr < 2) { + c1 = c0; + } + int8_t* c2 = (int8_t*) ((uintptr_t) c1 + cm_stride); + if XNN_UNPREDICTABLE(mr <= 2) { + c2 = c1; + } + + const v128_t vzero = wasm_f64x2_splat(0.0); + do { + v128_t vacc0x0 = wasm_f32x4_replace_lane(vzero, 0, ((const float*) w)[0]); + v128_t vacc0x1 = wasm_f32x4_replace_lane(vzero, 0, ((const float*) w)[1]); + v128_t vacc0x2 = wasm_f32x4_replace_lane(vzero, 0, ((const float*) w)[2]); + v128_t vacc0x3 = wasm_f32x4_replace_lane(vzero, 0, ((const float*) w)[3]); + v128_t vacc1x0 = vacc0x0; + v128_t vacc1x1 = vacc0x1; + v128_t vacc1x2 = vacc0x2; + v128_t vacc1x3 = vacc0x3; + v128_t vacc2x0 = vacc0x0; + v128_t vacc2x1 = vacc0x1; + v128_t vacc2x2 = vacc0x2; + v128_t vacc2x3 = vacc0x3; + w = (const void*) ((uintptr_t) w + 4 * sizeof(int32_t)); + + size_t p = ks; + do { + const int8_t* restrict a0 = a[0]; + if XNN_UNPREDICTABLE(a0 != zero) { + a0 = (const int8_t*) ((uintptr_t) a0 + a_offset); + } + const int8_t* restrict a1 = a[1]; + if XNN_UNPREDICTABLE(a1 != zero) { + a1 = (const int8_t*) ((uintptr_t) a1 + a_offset); + } + const int8_t* restrict a2 = a[2]; + if XNN_UNPREDICTABLE(a2 != zero) { + a2 = (const int8_t*) ((uintptr_t) a2 + a_offset); + } + a += 3; + + size_t k = 0; + while (k < kc) { + const v128_t vxa0 = wasm_i16x8_load_8x8(a0); + a0 += 8; + const v128_t vxa1 = wasm_i16x8_load_8x8(a1); + a1 += 8; + const v128_t vxa2 = wasm_i16x8_load_8x8(a2); + a2 += 8; + + const v128_t vb01 = wasm_v128_load(w); + const v128_t vxb0 = wasm_i16x8_widen_low_i8x16(vb01); + const v128_t vxb1 = wasm_i16x8_widen_high_i8x16(vb01); + + const v128_t vprod0x0 = wasm_i16x8_mul(vxb0, vxa0); + vacc0x0 = wasm_i32x4_add(vacc0x0, wasm_i32x4_widen_low_i16x8(vprod0x0)); + const v128_t vprod1x0 = wasm_i16x8_mul(vxb0, vxa1); + vacc1x0 = wasm_i32x4_add(vacc1x0, wasm_i32x4_widen_low_i16x8(vprod1x0)); + const v128_t vprod2x0 = wasm_i16x8_mul(vxb0, vxa2); + vacc2x0 = wasm_i32x4_add(vacc2x0, wasm_i32x4_widen_low_i16x8(vprod2x0)); + + const v128_t vprod0x1 = wasm_i16x8_mul(vxb1, vxa0); + vacc0x1 = wasm_i32x4_add(vacc0x1, wasm_i32x4_widen_low_i16x8(vprod0x1)); + vacc0x0 = wasm_i32x4_add(vacc0x0, wasm_i32x4_widen_high_i16x8(vprod0x0)); + const v128_t vprod1x1 = wasm_i16x8_mul(vxb1, vxa1); + vacc1x1 = wasm_i32x4_add(vacc1x1, wasm_i32x4_widen_low_i16x8(vprod1x1)); + vacc1x0 = wasm_i32x4_add(vacc1x0, wasm_i32x4_widen_high_i16x8(vprod1x0)); + const v128_t vprod2x1 = wasm_i16x8_mul(vxb1, vxa2); + vacc2x1 = wasm_i32x4_add(vacc2x1, wasm_i32x4_widen_low_i16x8(vprod2x1)); + vacc2x0 = wasm_i32x4_add(vacc2x0, wasm_i32x4_widen_high_i16x8(vprod2x0)); + + vacc0x1 = wasm_i32x4_add(vacc0x1, wasm_i32x4_widen_high_i16x8(vprod0x1)); + vacc1x1 = wasm_i32x4_add(vacc1x1, wasm_i32x4_widen_high_i16x8(vprod1x1)); + vacc2x1 = wasm_i32x4_add(vacc2x1, wasm_i32x4_widen_high_i16x8(vprod2x1)); + const v128_t vb23 = wasm_v128_load((const void*) ((uintptr_t) w + 16 * sizeof(int8_t))); + const v128_t vxb2 = wasm_i16x8_widen_low_i8x16(vb23); + const v128_t vxb3 = wasm_i16x8_widen_high_i8x16(vb23); + + const v128_t vprod0x2 = wasm_i16x8_mul(vxb2, vxa0); + vacc0x2 = wasm_i32x4_add(vacc0x2, wasm_i32x4_widen_low_i16x8(vprod0x2)); + const v128_t vprod1x2 = wasm_i16x8_mul(vxb2, vxa1); + vacc1x2 = wasm_i32x4_add(vacc1x2, wasm_i32x4_widen_low_i16x8(vprod1x2)); + const v128_t vprod2x2 = wasm_i16x8_mul(vxb2, vxa2); + vacc2x2 = wasm_i32x4_add(vacc2x2, wasm_i32x4_widen_low_i16x8(vprod2x2)); + + const v128_t vprod0x3 = wasm_i16x8_mul(vxb3, vxa0); + vacc0x3 = wasm_i32x4_add(vacc0x3, wasm_i32x4_widen_low_i16x8(vprod0x3)); + vacc0x2 = wasm_i32x4_add(vacc0x2, wasm_i32x4_widen_high_i16x8(vprod0x2)); + const v128_t vprod1x3 = wasm_i16x8_mul(vxb3, vxa1); + vacc1x3 = wasm_i32x4_add(vacc1x3, wasm_i32x4_widen_low_i16x8(vprod1x3)); + vacc1x2 = wasm_i32x4_add(vacc1x2, wasm_i32x4_widen_high_i16x8(vprod1x2)); + const v128_t vprod2x3 = wasm_i16x8_mul(vxb3, vxa2); + vacc2x3 = wasm_i32x4_add(vacc2x3, wasm_i32x4_widen_low_i16x8(vprod2x3)); + vacc2x2 = wasm_i32x4_add(vacc2x2, wasm_i32x4_widen_high_i16x8(vprod2x2)); + + vacc0x3 = wasm_i32x4_add(vacc0x3, wasm_i32x4_widen_high_i16x8(vprod0x3)); + vacc1x3 = wasm_i32x4_add(vacc1x3, wasm_i32x4_widen_high_i16x8(vprod1x3)); + vacc2x3 = wasm_i32x4_add(vacc2x3, wasm_i32x4_widen_high_i16x8(vprod2x3)); + + w = (const void*) ((uintptr_t) w + 32 * sizeof(int8_t)); + k += 8 * sizeof(int8_t); + } + p -= 3 * sizeof(void*); + } while (p != 0); + + const v128_t vacc0x02 = wasm_i32x4_add(wasm_v32x4_shuffle(vacc0x0, vacc0x2, 0, 4, 1, 5), wasm_v32x4_shuffle(vacc0x0, vacc0x2, 2, 6, 3, 7)); + const v128_t vacc0x13 = wasm_i32x4_add(wasm_v32x4_shuffle(vacc0x1, vacc0x3, 0, 4, 1, 5), wasm_v32x4_shuffle(vacc0x1, vacc0x3, 2, 6, 3, 7)); + const v128_t vacc1x02 = wasm_i32x4_add(wasm_v32x4_shuffle(vacc1x0, vacc1x2, 0, 4, 1, 5), wasm_v32x4_shuffle(vacc1x0, vacc1x2, 2, 6, 3, 7)); + const v128_t vacc1x13 = wasm_i32x4_add(wasm_v32x4_shuffle(vacc1x1, vacc1x3, 0, 4, 1, 5), wasm_v32x4_shuffle(vacc1x1, vacc1x3, 2, 6, 3, 7)); + const v128_t vacc2x02 = wasm_i32x4_add(wasm_v32x4_shuffle(vacc2x0, vacc2x2, 0, 4, 1, 5), wasm_v32x4_shuffle(vacc2x0, vacc2x2, 2, 6, 3, 7)); + const v128_t vacc2x13 = wasm_i32x4_add(wasm_v32x4_shuffle(vacc2x1, vacc2x3, 0, 4, 1, 5), wasm_v32x4_shuffle(vacc2x1, vacc2x3, 2, 6, 3, 7)); + + v128_t vacc0x0123 = wasm_i32x4_add(wasm_v32x4_shuffle(vacc0x02, vacc0x13, 0, 4, 1, 5), wasm_v32x4_shuffle(vacc0x02, vacc0x13, 2, 6, 3, 7)); + v128_t vacc1x0123 = wasm_i32x4_add(wasm_v32x4_shuffle(vacc1x02, vacc1x13, 0, 4, 1, 5), wasm_v32x4_shuffle(vacc1x02, vacc1x13, 2, 6, 3, 7)); + v128_t vacc2x0123 = wasm_i32x4_add(wasm_v32x4_shuffle(vacc2x02, vacc2x13, 0, 4, 1, 5), wasm_v32x4_shuffle(vacc2x02, vacc2x13, 2, 6, 3, 7)); + + const v128_t vsign0x0123 = wasm_i32x4_lt(vacc0x0123, vzero); + const v128_t vsign1x0123 = wasm_i32x4_lt(vacc1x0123, vzero); + const v128_t vsign2x0123 = wasm_i32x4_lt(vacc2x0123, vzero); + + const v128_t vacc0x01 = wasm_v32x4_shuffle(vacc0x0123, vsign0x0123, 0, 4, 1, 5); + const v128_t vacc1x01 = wasm_v32x4_shuffle(vacc1x0123, vsign1x0123, 0, 4, 1, 5); + const v128_t vacc2x01 = wasm_v32x4_shuffle(vacc2x0123, vsign2x0123, 0, 4, 1, 5); + + const v128_t vmultiplier = wasm_v128_load(params->wasmsimd.multiplier); + const v128_t vrounding = wasm_v128_load(params->wasmsimd.rounding); + const v128_t vprod0x01 = wasm_i64x2_add(wasm_i64x2_mul(vacc0x01, vmultiplier), vrounding); + const v128_t vacc0x23 = wasm_v32x4_shuffle(vacc0x0123, vsign0x0123, 2, 6, 3, 7); + const v128_t vprod1x01 = wasm_i64x2_add(wasm_i64x2_mul(vacc1x01, vmultiplier), vrounding); + const v128_t vacc1x23 = wasm_v32x4_shuffle(vacc1x0123, vsign1x0123, 2, 6, 3, 7); + const v128_t vprod2x01 = wasm_i64x2_add(wasm_i64x2_mul(vacc2x01, vmultiplier), vrounding); + const v128_t vacc2x23 = wasm_v32x4_shuffle(vacc2x0123, vsign2x0123, 2, 6, 3, 7); + + const v128_t vprod0x23 = wasm_i64x2_add(wasm_i64x2_mul(vacc0x23, vmultiplier), vrounding); + const v128_t vprod1x23 = wasm_i64x2_add(wasm_i64x2_mul(vacc1x23, vmultiplier), vrounding); + const v128_t vprod2x23 = wasm_i64x2_add(wasm_i64x2_mul(vacc2x23, vmultiplier), vrounding); + + const v128_t vq31prod0x0123 = wasm_v32x4_shuffle(vprod0x01, vprod0x23, 1, 3, 5, 7); + const v128_t vq31prod1x0123 = wasm_v32x4_shuffle(vprod1x01, vprod1x23, 1, 3, 5, 7); + const v128_t vq31prod2x0123 = wasm_v32x4_shuffle(vprod2x01, vprod2x23, 1, 3, 5, 7); + + const v128_t vremainder_mask = wasm_v128_load(params->wasmsimd.remainder_mask); + const v128_t vrem0x0123 = wasm_i32x4_add(wasm_v128_and(vq31prod0x0123, vremainder_mask), wasm_i32x4_lt(vq31prod0x0123, vzero)); + const v128_t vrem1x0123 = wasm_i32x4_add(wasm_v128_and(vq31prod1x0123, vremainder_mask), wasm_i32x4_lt(vq31prod1x0123, vzero)); + const v128_t vrem2x0123 = wasm_i32x4_add(wasm_v128_and(vq31prod2x0123, vremainder_mask), wasm_i32x4_lt(vq31prod2x0123, vzero)); + + const v128_t vthreshold = wasm_v128_load(params->wasmsimd.remainder_threshold); + const int32_t vshift = params->wasmsimd.shift; + vacc0x0123 = wasm_i32x4_sub(wasm_i32x4_shr(vq31prod0x0123, vshift), wasm_i32x4_gt(vrem0x0123, vthreshold)); + vacc1x0123 = wasm_i32x4_sub(wasm_i32x4_shr(vq31prod1x0123, vshift), wasm_i32x4_gt(vrem1x0123, vthreshold)); + vacc2x0123 = wasm_i32x4_sub(wasm_i32x4_shr(vq31prod2x0123, vshift), wasm_i32x4_gt(vrem2x0123, vthreshold)); + + const v128_t voutput_zero_point = wasm_v128_load(params->wasmsimd.output_zero_point); + v128_t vacc01x0123 = wasm_i16x8_add_saturate(wasm_i16x8_narrow_i32x4(vacc0x0123, vacc1x0123), voutput_zero_point); + v128_t vacc22x0123 = wasm_i16x8_add_saturate(wasm_i16x8_narrow_i32x4(vacc2x0123, vacc2x0123), voutput_zero_point); + + v128_t vout = wasm_i8x16_narrow_i16x8(vacc01x0123, vacc22x0123); + + const v128_t voutput_min = wasm_v128_load(params->wasmsimd.output_min); + vout = wasm_i8x16_max(vout, voutput_min); + + const v128_t voutput_max = wasm_v128_load(params->wasmsimd.output_max); + vout = wasm_i8x16_min(vout, voutput_max); + + if (nc >= 4) { + *((float*) c2) = (float) wasm_f32x4_extract_lane(vout, 2); + *((float*) c1) = (float) wasm_f32x4_extract_lane(vout, 1); + *((float*) c0) = (float) wasm_f32x4_extract_lane(vout, 0); + + c2 = (int8_t*) ((uintptr_t) c2 + cn_stride); + c1 = (int8_t*) ((uintptr_t) c1 + cn_stride); + c0 = (int8_t*) ((uintptr_t) c0 + cn_stride); + + a = (const int8_t**restrict) ((uintptr_t) a - ks); + + nc -= 4; + } else { + if (nc & 2) { + *((uint16_t*) c2) = (uint16_t) wasm_i16x8_extract_lane(vout, 4); + c2 += 2; + *((uint16_t*) c1) = (uint16_t) wasm_i16x8_extract_lane(vout, 2); + c1 += 2; + *((uint16_t*) c0) = (uint16_t) wasm_i16x8_extract_lane(vout, 0); + c0 += 2; + vout = wasm_u32x4_shr(vout, 16); + } + if (nc & 1) { + *c2 = (int8_t) wasm_i8x16_extract_lane(vout, 8); + *c1 = (int8_t) wasm_i8x16_extract_lane(vout, 4); + *c0 = (int8_t) wasm_i8x16_extract_lane(vout, 0); + } + + nc = 0; + } + } while (nc != 0); +} diff --git a/src/qs8-igemm/gen/3x4c8-minmax-wasmsimd-ld64.c b/src/qs8-igemm/gen/3x4c8-minmax-wasmsimd-ld64.c new file mode 100644 index 000000000..5f349127d --- /dev/null +++ b/src/qs8-igemm/gen/3x4c8-minmax-wasmsimd-ld64.c @@ -0,0 +1,234 @@ +// Auto-generated file. Do not edit! +// Template: src/qs8-igemm/MRx4c8-minmax-wasmsimd.c.in +// Generator: tools/xngen +// +// Copyright 2020 Google LLC +// +// This source code is licensed under the BSD-style license found in the +// LICENSE file in the root directory of this source tree. + +#include <assert.h> + +#include <wasm_simd128.h> + +#include <xnnpack/gemm.h> + + +void xnn_qs8_igemm_minmax_ukernel_3x4c8__wasmsimd_ld64( + size_t mr, + size_t nc, + size_t kc, + size_t ks, + const int8_t** restrict a, + const void* restrict w, + int8_t* restrict c, + size_t cm_stride, + size_t cn_stride, + size_t a_offset, + const int8_t* zero, + const union xnn_qs8_gemm_params params[restrict XNN_MIN_ELEMENTS(1)]) XNN_DISABLE_TSAN +{ + assert(mr != 0); + assert(mr <= 3); + assert(nc != 0); + assert(kc != 0); + assert(ks != 0); + assert(ks % (3 * sizeof(void*)) == 0); + assert(a_offset % sizeof(int8_t) == 0); + assert(a != NULL); + assert(w != NULL); + assert(c != NULL); + + int8_t* c0 = c; + int8_t* c1 = (int8_t*) ((uintptr_t) c0 + cm_stride); + if XNN_UNPREDICTABLE(mr < 2) { + c1 = c0; + } + int8_t* c2 = (int8_t*) ((uintptr_t) c1 + cm_stride); + if XNN_UNPREDICTABLE(mr <= 2) { + c2 = c1; + } + + const v128_t vzero = wasm_f64x2_splat(0.0); + do { + v128_t vacc0x0 = wasm_f32x4_replace_lane(vzero, 0, ((const float*) w)[0]); + v128_t vacc0x1 = wasm_f32x4_replace_lane(vzero, 0, ((const float*) w)[1]); + v128_t vacc0x2 = wasm_f32x4_replace_lane(vzero, 0, ((const float*) w)[2]); + v128_t vacc0x3 = wasm_f32x4_replace_lane(vzero, 0, ((const float*) w)[3]); + v128_t vacc1x0 = vacc0x0; + v128_t vacc1x1 = vacc0x1; + v128_t vacc1x2 = vacc0x2; + v128_t vacc1x3 = vacc0x3; + v128_t vacc2x0 = vacc0x0; + v128_t vacc2x1 = vacc0x1; + v128_t vacc2x2 = vacc0x2; + v128_t vacc2x3 = vacc0x3; + w = (const void*) ((uintptr_t) w + 4 * sizeof(int32_t)); + + size_t p = ks; + do { + const int8_t* restrict a0 = a[0]; + if XNN_UNPREDICTABLE(a0 != zero) { + a0 = (const int8_t*) ((uintptr_t) a0 + a_offset); + } + const int8_t* restrict a1 = a[1]; + if XNN_UNPREDICTABLE(a1 != zero) { + a1 = (const int8_t*) ((uintptr_t) a1 + a_offset); + } + const int8_t* restrict a2 = a[2]; + if XNN_UNPREDICTABLE(a2 != zero) { + a2 = (const int8_t*) ((uintptr_t) a2 + a_offset); + } + a += 3; + + size_t k = 0; + while (k < kc) { + const v128_t vxa0 = wasm_i16x8_load_8x8(a0); + a0 += 8; + const v128_t vxa1 = wasm_i16x8_load_8x8(a1); + a1 += 8; + const v128_t vxa2 = wasm_i16x8_load_8x8(a2); + a2 += 8; + + const v128_t vxb0 = wasm_i16x8_load_8x8(w); + + const v128_t vprod0x0 = wasm_i16x8_mul(vxa0, vxb0); + vacc0x0 = wasm_i32x4_add(vacc0x0, wasm_i32x4_widen_low_i16x8(vprod0x0)); + vacc0x0 = wasm_i32x4_add(vacc0x0, wasm_i32x4_widen_high_i16x8(vprod0x0)); + const v128_t vprod1x0 = wasm_i16x8_mul(vxa1, vxb0); + vacc1x0 = wasm_i32x4_add(vacc1x0, wasm_i32x4_widen_low_i16x8(vprod1x0)); + vacc1x0 = wasm_i32x4_add(vacc1x0, wasm_i32x4_widen_high_i16x8(vprod1x0)); + const v128_t vprod2x0 = wasm_i16x8_mul(vxa2, vxb0); + vacc2x0 = wasm_i32x4_add(vacc2x0, wasm_i32x4_widen_low_i16x8(vprod2x0)); + vacc2x0 = wasm_i32x4_add(vacc2x0, wasm_i32x4_widen_high_i16x8(vprod2x0)); + const v128_t vxb1 = wasm_i16x8_load_8x8((const void*) ((uintptr_t) w + 8 * sizeof(int8_t))); + + const v128_t vprod0x1 = wasm_i16x8_mul(vxa0, vxb1); + vacc0x1 = wasm_i32x4_add(vacc0x1, wasm_i32x4_widen_low_i16x8(vprod0x1)); + vacc0x1 = wasm_i32x4_add(vacc0x1, wasm_i32x4_widen_high_i16x8(vprod0x1)); + const v128_t vprod1x1 = wasm_i16x8_mul(vxa1, vxb1); + vacc1x1 = wasm_i32x4_add(vacc1x1, wasm_i32x4_widen_low_i16x8(vprod1x1)); + vacc1x1 = wasm_i32x4_add(vacc1x1, wasm_i32x4_widen_high_i16x8(vprod1x1)); + const v128_t vprod2x1 = wasm_i16x8_mul(vxa2, vxb1); + vacc2x1 = wasm_i32x4_add(vacc2x1, wasm_i32x4_widen_low_i16x8(vprod2x1)); + vacc2x1 = wasm_i32x4_add(vacc2x1, wasm_i32x4_widen_high_i16x8(vprod2x1)); + const v128_t vxb2 = wasm_i16x8_load_8x8((const void*) ((uintptr_t) w + 16 * sizeof(int8_t))); + + const v128_t vprod0x2 = wasm_i16x8_mul(vxa0, vxb2); + vacc0x2 = wasm_i32x4_add(vacc0x2, wasm_i32x4_widen_low_i16x8(vprod0x2)); + vacc0x2 = wasm_i32x4_add(vacc0x2, wasm_i32x4_widen_high_i16x8(vprod0x2)); + const v128_t vprod1x2 = wasm_i16x8_mul(vxa1, vxb2); + vacc1x2 = wasm_i32x4_add(vacc1x2, wasm_i32x4_widen_low_i16x8(vprod1x2)); + vacc1x2 = wasm_i32x4_add(vacc1x2, wasm_i32x4_widen_high_i16x8(vprod1x2)); + const v128_t vprod2x2 = wasm_i16x8_mul(vxa2, vxb2); + vacc2x2 = wasm_i32x4_add(vacc2x2, wasm_i32x4_widen_low_i16x8(vprod2x2)); + vacc2x2 = wasm_i32x4_add(vacc2x2, wasm_i32x4_widen_high_i16x8(vprod2x2)); + const v128_t vxb3 = wasm_i16x8_load_8x8((const void*) ((uintptr_t) w + 24 * sizeof(int8_t))); + + const v128_t vprod0x3 = wasm_i16x8_mul(vxa0, vxb3); + vacc0x3 = wasm_i32x4_add(vacc0x3, wasm_i32x4_widen_low_i16x8(vprod0x3)); + vacc0x3 = wasm_i32x4_add(vacc0x3, wasm_i32x4_widen_high_i16x8(vprod0x3)); + const v128_t vprod1x3 = wasm_i16x8_mul(vxa1, vxb3); + vacc1x3 = wasm_i32x4_add(vacc1x3, wasm_i32x4_widen_low_i16x8(vprod1x3)); + vacc1x3 = wasm_i32x4_add(vacc1x3, wasm_i32x4_widen_high_i16x8(vprod1x3)); + const v128_t vprod2x3 = wasm_i16x8_mul(vxa2, vxb3); + vacc2x3 = wasm_i32x4_add(vacc2x3, wasm_i32x4_widen_low_i16x8(vprod2x3)); + vacc2x3 = wasm_i32x4_add(vacc2x3, wasm_i32x4_widen_high_i16x8(vprod2x3)); + + w = (const void*) ((uintptr_t) w + 32 * sizeof(int8_t)); + k += 8 * sizeof(int8_t); + } + p -= 3 * sizeof(void*); + } while (p != 0); + + const v128_t vacc0x02 = wasm_i32x4_add(wasm_v32x4_shuffle(vacc0x0, vacc0x2, 0, 4, 1, 5), wasm_v32x4_shuffle(vacc0x0, vacc0x2, 2, 6, 3, 7)); + const v128_t vacc0x13 = wasm_i32x4_add(wasm_v32x4_shuffle(vacc0x1, vacc0x3, 0, 4, 1, 5), wasm_v32x4_shuffle(vacc0x1, vacc0x3, 2, 6, 3, 7)); + const v128_t vacc1x02 = wasm_i32x4_add(wasm_v32x4_shuffle(vacc1x0, vacc1x2, 0, 4, 1, 5), wasm_v32x4_shuffle(vacc1x0, vacc1x2, 2, 6, 3, 7)); + const v128_t vacc1x13 = wasm_i32x4_add(wasm_v32x4_shuffle(vacc1x1, vacc1x3, 0, 4, 1, 5), wasm_v32x4_shuffle(vacc1x1, vacc1x3, 2, 6, 3, 7)); + const v128_t vacc2x02 = wasm_i32x4_add(wasm_v32x4_shuffle(vacc2x0, vacc2x2, 0, 4, 1, 5), wasm_v32x4_shuffle(vacc2x0, vacc2x2, 2, 6, 3, 7)); + const v128_t vacc2x13 = wasm_i32x4_add(wasm_v32x4_shuffle(vacc2x1, vacc2x3, 0, 4, 1, 5), wasm_v32x4_shuffle(vacc2x1, vacc2x3, 2, 6, 3, 7)); + + v128_t vacc0x0123 = wasm_i32x4_add(wasm_v32x4_shuffle(vacc0x02, vacc0x13, 0, 4, 1, 5), wasm_v32x4_shuffle(vacc0x02, vacc0x13, 2, 6, 3, 7)); + v128_t vacc1x0123 = wasm_i32x4_add(wasm_v32x4_shuffle(vacc1x02, vacc1x13, 0, 4, 1, 5), wasm_v32x4_shuffle(vacc1x02, vacc1x13, 2, 6, 3, 7)); + v128_t vacc2x0123 = wasm_i32x4_add(wasm_v32x4_shuffle(vacc2x02, vacc2x13, 0, 4, 1, 5), wasm_v32x4_shuffle(vacc2x02, vacc2x13, 2, 6, 3, 7)); + + const v128_t vsign0x0123 = wasm_i32x4_lt(vacc0x0123, vzero); + const v128_t vsign1x0123 = wasm_i32x4_lt(vacc1x0123, vzero); + const v128_t vsign2x0123 = wasm_i32x4_lt(vacc2x0123, vzero); + + const v128_t vacc0x01 = wasm_v32x4_shuffle(vacc0x0123, vsign0x0123, 0, 4, 1, 5); + const v128_t vacc1x01 = wasm_v32x4_shuffle(vacc1x0123, vsign1x0123, 0, 4, 1, 5); + const v128_t vacc2x01 = wasm_v32x4_shuffle(vacc2x0123, vsign2x0123, 0, 4, 1, 5); + + const v128_t vmultiplier = wasm_v128_load(params->wasmsimd.multiplier); + const v128_t vrounding = wasm_v128_load(params->wasmsimd.rounding); + const v128_t vprod0x01 = wasm_i64x2_add(wasm_i64x2_mul(vacc0x01, vmultiplier), vrounding); + const v128_t vacc0x23 = wasm_v32x4_shuffle(vacc0x0123, vsign0x0123, 2, 6, 3, 7); + const v128_t vprod1x01 = wasm_i64x2_add(wasm_i64x2_mul(vacc1x01, vmultiplier), vrounding); + const v128_t vacc1x23 = wasm_v32x4_shuffle(vacc1x0123, vsign1x0123, 2, 6, 3, 7); + const v128_t vprod2x01 = wasm_i64x2_add(wasm_i64x2_mul(vacc2x01, vmultiplier), vrounding); + const v128_t vacc2x23 = wasm_v32x4_shuffle(vacc2x0123, vsign2x0123, 2, 6, 3, 7); + + const v128_t vprod0x23 = wasm_i64x2_add(wasm_i64x2_mul(vacc0x23, vmultiplier), vrounding); + const v128_t vprod1x23 = wasm_i64x2_add(wasm_i64x2_mul(vacc1x23, vmultiplier), vrounding); + const v128_t vprod2x23 = wasm_i64x2_add(wasm_i64x2_mul(vacc2x23, vmultiplier), vrounding); + + const v128_t vq31prod0x0123 = wasm_v32x4_shuffle(vprod0x01, vprod0x23, 1, 3, 5, 7); + const v128_t vq31prod1x0123 = wasm_v32x4_shuffle(vprod1x01, vprod1x23, 1, 3, 5, 7); + const v128_t vq31prod2x0123 = wasm_v32x4_shuffle(vprod2x01, vprod2x23, 1, 3, 5, 7); + + const v128_t vremainder_mask = wasm_v128_load(params->wasmsimd.remainder_mask); + const v128_t vrem0x0123 = wasm_i32x4_add(wasm_v128_and(vq31prod0x0123, vremainder_mask), wasm_i32x4_lt(vq31prod0x0123, vzero)); + const v128_t vrem1x0123 = wasm_i32x4_add(wasm_v128_and(vq31prod1x0123, vremainder_mask), wasm_i32x4_lt(vq31prod1x0123, vzero)); + const v128_t vrem2x0123 = wasm_i32x4_add(wasm_v128_and(vq31prod2x0123, vremainder_mask), wasm_i32x4_lt(vq31prod2x0123, vzero)); + + const v128_t vthreshold = wasm_v128_load(params->wasmsimd.remainder_threshold); + const int32_t vshift = params->wasmsimd.shift; + vacc0x0123 = wasm_i32x4_sub(wasm_i32x4_shr(vq31prod0x0123, vshift), wasm_i32x4_gt(vrem0x0123, vthreshold)); + vacc1x0123 = wasm_i32x4_sub(wasm_i32x4_shr(vq31prod1x0123, vshift), wasm_i32x4_gt(vrem1x0123, vthreshold)); + vacc2x0123 = wasm_i32x4_sub(wasm_i32x4_shr(vq31prod2x0123, vshift), wasm_i32x4_gt(vrem2x0123, vthreshold)); + + const v128_t voutput_zero_point = wasm_v128_load(params->wasmsimd.output_zero_point); + v128_t vacc01x0123 = wasm_i16x8_add_saturate(wasm_i16x8_narrow_i32x4(vacc0x0123, vacc1x0123), voutput_zero_point); + v128_t vacc22x0123 = wasm_i16x8_add_saturate(wasm_i16x8_narrow_i32x4(vacc2x0123, vacc2x0123), voutput_zero_point); + + v128_t vout = wasm_i8x16_narrow_i16x8(vacc01x0123, vacc22x0123); + + const v128_t voutput_min = wasm_v128_load(params->wasmsimd.output_min); + vout = wasm_i8x16_max(vout, voutput_min); + + const v128_t voutput_max = wasm_v128_load(params->wasmsimd.output_max); + vout = wasm_i8x16_min(vout, voutput_max); + + if (nc >= 4) { + *((float*) c2) = (float) wasm_f32x4_extract_lane(vout, 2); + *((float*) c1) = (float) wasm_f32x4_extract_lane(vout, 1); + *((float*) c0) = (float) wasm_f32x4_extract_lane(vout, 0); + + c2 = (int8_t*) ((uintptr_t) c2 + cn_stride); + c1 = (int8_t*) ((uintptr_t) c1 + cn_stride); + c0 = (int8_t*) ((uintptr_t) c0 + cn_stride); + + a = (const int8_t**restrict) ((uintptr_t) a - ks); + + nc -= 4; + } else { + if (nc & 2) { + *((uint16_t*) c2) = (uint16_t) wasm_i16x8_extract_lane(vout, 4); + c2 += 2; + *((uint16_t*) c1) = (uint16_t) wasm_i16x8_extract_lane(vout, 2); + c1 += 2; + *((uint16_t*) c0) = (uint16_t) wasm_i16x8_extract_lane(vout, 0); + c0 += 2; + vout = wasm_u32x4_shr(vout, 16); + } + if (nc & 1) { + *c2 = (int8_t) wasm_i8x16_extract_lane(vout, 8); + *c1 = (int8_t) wasm_i8x16_extract_lane(vout, 4); + *c0 = (int8_t) wasm_i8x16_extract_lane(vout, 0); + } + + nc = 0; + } + } while (nc != 0); +} diff --git a/src/xnnpack/gemm.h b/src/xnnpack/gemm.h index 76139931d..067034912 100644 --- a/src/xnnpack/gemm.h +++ b/src/xnnpack/gemm.h @@ -567,6 +567,14 @@ DECLARE_QS8_GEMM_MINMAX_UKERNEL_FUNCTION(xnn_qs8_gemm_minmax_ukernel_1x8c8__avx2 DECLARE_QS8_GEMM_MINMAX_UKERNEL_FUNCTION(xnn_qs8_gemm_minmax_ukernel_2x8c8__avx2) DECLARE_QS8_GEMM_MINMAX_UKERNEL_FUNCTION(xnn_qs8_gemm_minmax_ukernel_3x8c8__avx2) +DECLARE_QS8_GEMM_MINMAX_UKERNEL_FUNCTION(xnn_qs8_gemm_minmax_ukernel_1x4c8__wasmsimd_ld64) +DECLARE_QS8_GEMM_MINMAX_UKERNEL_FUNCTION(xnn_qs8_gemm_minmax_ukernel_2x4c8__wasmsimd_ld64) +DECLARE_QS8_GEMM_MINMAX_UKERNEL_FUNCTION(xnn_qs8_gemm_minmax_ukernel_3x4c8__wasmsimd_ld64) + +DECLARE_QS8_GEMM_MINMAX_UKERNEL_FUNCTION(xnn_qs8_gemm_minmax_ukernel_1x4c8__wasmsimd_ld128) +DECLARE_QS8_GEMM_MINMAX_UKERNEL_FUNCTION(xnn_qs8_gemm_minmax_ukernel_2x4c8__wasmsimd_ld128) +DECLARE_QS8_GEMM_MINMAX_UKERNEL_FUNCTION(xnn_qs8_gemm_minmax_ukernel_3x4c8__wasmsimd_ld128) + #define DECLARE_QS8_GEMM_XW_MINMAX_UKERNEL_FUNCTION(fn_name) \ XNN_INTERNAL void fn_name( \ @@ -613,6 +621,10 @@ DECLARE_QS8_GEMM_XW_MINMAX_UKERNEL_FUNCTION(xnn_qs8_gemm_xw_minmax_ukernel_1x8c8 DECLARE_QS8_GEMM_XW_MINMAX_UKERNEL_FUNCTION(xnn_qs8_gemm_xw_minmax_ukernel_2x8c8__avx2) DECLARE_QS8_GEMM_XW_MINMAX_UKERNEL_FUNCTION(xnn_qs8_gemm_xw_minmax_ukernel_3x8c8__avx2) +DECLARE_QS8_GEMM_XW_MINMAX_UKERNEL_FUNCTION(xnn_qs8_gemm_xw_minmax_ukernel_1x4c8__wasmsimd) +DECLARE_QS8_GEMM_XW_MINMAX_UKERNEL_FUNCTION(xnn_qs8_gemm_xw_minmax_ukernel_2x4c8__wasmsimd) +DECLARE_QS8_GEMM_XW_MINMAX_UKERNEL_FUNCTION(xnn_qs8_gemm_xw_minmax_ukernel_3x4c8__wasmsimd) + #ifdef __cplusplus } // extern "C" diff --git a/src/xnnpack/igemm.h b/src/xnnpack/igemm.h index 33e2c806b..5e829fc1f 100644 --- a/src/xnnpack/igemm.h +++ b/src/xnnpack/igemm.h @@ -382,6 +382,14 @@ DECLARE_QS8_IGEMM_MINMAX_UKERNEL_FUNCTION(xnn_qs8_igemm_minmax_ukernel_1x8c8__av DECLARE_QS8_IGEMM_MINMAX_UKERNEL_FUNCTION(xnn_qs8_igemm_minmax_ukernel_2x8c8__avx2) DECLARE_QS8_IGEMM_MINMAX_UKERNEL_FUNCTION(xnn_qs8_igemm_minmax_ukernel_3x8c8__avx2) +DECLARE_QS8_IGEMM_MINMAX_UKERNEL_FUNCTION(xnn_qs8_igemm_minmax_ukernel_1x4c8__wasmsimd_ld64) +DECLARE_QS8_IGEMM_MINMAX_UKERNEL_FUNCTION(xnn_qs8_igemm_minmax_ukernel_2x4c8__wasmsimd_ld64) +DECLARE_QS8_IGEMM_MINMAX_UKERNEL_FUNCTION(xnn_qs8_igemm_minmax_ukernel_3x4c8__wasmsimd_ld64) + +DECLARE_QS8_IGEMM_MINMAX_UKERNEL_FUNCTION(xnn_qs8_igemm_minmax_ukernel_1x4c8__wasmsimd_ld128) +DECLARE_QS8_IGEMM_MINMAX_UKERNEL_FUNCTION(xnn_qs8_igemm_minmax_ukernel_2x4c8__wasmsimd_ld128) +DECLARE_QS8_IGEMM_MINMAX_UKERNEL_FUNCTION(xnn_qs8_igemm_minmax_ukernel_3x4c8__wasmsimd_ld128) + #ifdef __cplusplus } // extern "C" diff --git a/src/xnnpack/params-init.h b/src/xnnpack/params-init.h index 255503a5a..dcde93d0e 100644 --- a/src/xnnpack/params-init.h +++ b/src/xnnpack/params-init.h @@ -221,6 +221,30 @@ static inline union xnn_qs8_gemm_params xnn_init_qs8_gemm_params( params.neon.output_zero_point = (int16_t) output_zero_point; params.neon.output_min = output_min; params.neon.output_max = output_max; + #elif XNN_ARCH_WASMSIMD + const int64_t twice_multiplier = INT64_C(2) * (int64_t) multiplier; + const uint32_t remainder_mask = (UINT32_C(1) << shift) - UINT32_C(1); + const uint32_t remainder_threshold = remainder_mask >> 1; + params.wasmsimd.multiplier[0] = twice_multiplier; + params.wasmsimd.multiplier[1] = twice_multiplier; + params.wasmsimd.rounding[0] = INT64_C(0x80000000); + params.wasmsimd.rounding[1] = INT64_C(0x80000000); + params.wasmsimd.remainder_mask[0] = (int32_t) remainder_mask; + params.wasmsimd.remainder_mask[1] = (int32_t) remainder_mask; + params.wasmsimd.remainder_mask[2] = (int32_t) remainder_mask; + params.wasmsimd.remainder_mask[3] = (int32_t) remainder_mask; + params.wasmsimd.remainder_threshold[0] = (int32_t) remainder_threshold; + params.wasmsimd.remainder_threshold[1] = (int32_t) remainder_threshold; + params.wasmsimd.remainder_threshold[2] = (int32_t) remainder_threshold; + params.wasmsimd.remainder_threshold[3] = (int32_t) remainder_threshold; + params.wasmsimd.shift = shift; + for (uint32_t i = 0; i < 8; i++) { + params.wasmsimd.output_zero_point[i] = (int16_t) output_zero_point; + } + for (uint32_t i = 0; i < 16; i++) { + params.wasmsimd.output_min[i] = output_min; + params.wasmsimd.output_max[i] = output_max; + } #else const uint32_t remainder_mask = (UINT32_C(1) << shift) - UINT32_C(1); const uint32_t remainder_threshold = remainder_mask >> 1; diff --git a/src/xnnpack/params.h b/src/xnnpack/params.h index aa6fbbbf7..58bb1ff84 100644 --- a/src/xnnpack/params.h +++ b/src/xnnpack/params.h @@ -293,6 +293,18 @@ union xnn_qs8_gemm_params { XNN_ALIGN(16) int16_t output_max[8]; } sse2; #endif // XNN_ARCH_X86 || XNN_ARCH_X86_64 +#if XNN_ARCH_WASMSIMD + struct { + XNN_ALIGN(16) int64_t multiplier[2]; + XNN_ALIGN(16) int64_t rounding[2]; + XNN_ALIGN(16) int32_t remainder_mask[4]; + XNN_ALIGN(16) int32_t remainder_threshold[4]; + int32_t shift; + XNN_ALIGN(16) int16_t output_zero_point[8]; + XNN_ALIGN(16) int8_t output_min[16]; + XNN_ALIGN(16) int8_t output_max[16]; + } wasmsimd; +#endif // XNN_ARCH_WASMSIMD }; union xnn_qs8_gemm_xw_params { @@ -326,6 +338,18 @@ union xnn_qs8_gemm_xw_params { XNN_ALIGN(16) int16_t output_max[8]; } sse2; #endif // XNN_ARCH_X86 || XNN_ARCH_X86_64 +#if XNN_ARCH_WASMSIMD + struct { + XNN_ALIGN(16) int64_t multiplier[2]; + XNN_ALIGN(16) int64_t rounding[2]; + XNN_ALIGN(16) int32_t remainder_mask[4]; + XNN_ALIGN(16) int32_t remainder_threshold[4]; + int32_t shift; + XNN_ALIGN(16) int16_t output_zero_point[8]; + XNN_ALIGN(16) int8_t output_min[16]; + XNN_ALIGN(16) int8_t output_max[16]; + } wasmsimd; +#endif // XNN_ARCH_WASMSIMD }; union xnn_qu8_add_params { diff --git a/test/qs8-gemm-minmax.cc b/test/qs8-gemm-minmax.cc index 1c97a4e3a..2805320a7 100644 --- a/test/qs8-gemm-minmax.cc +++ b/test/qs8-gemm-minmax.cc @@ -31296,3 +31296,3786 @@ .Test(xnn_qs8_gemm_xw_minmax_ukernel_3x8c8__avx2); } #endif // XNN_ARCH_X86 || XNN_ARCH_X86_64 + + +#if XNN_ARCH_WASMSIMD + TEST(QS8_GEMM_MINMAX_1X4C8__WASMSIMD_LD64, k_eq_8) { + GemmMicrokernelTester() + .mr(1) + .nr(4) + .kr(8) + .sr(1) + .m(1) + .n(4) + .k(8) + .Test(xnn_qs8_gemm_minmax_ukernel_1x4c8__wasmsimd_ld64); + } + + TEST(QS8_GEMM_MINMAX_1X4C8__WASMSIMD_LD64, strided_cn) { + GemmMicrokernelTester() + .mr(1) + .nr(4) + .kr(8) + .sr(1) + .m(1) + .n(4) + .k(8) + .cn_stride(7) + .Test(xnn_qs8_gemm_minmax_ukernel_1x4c8__wasmsimd_ld64); + } + + TEST(QS8_GEMM_MINMAX_1X4C8__WASMSIMD_LD64, k_eq_8_strided_a) { + GemmMicrokernelTester() + .mr(1) + .nr(4) + .kr(8) + .sr(1) + .m(1) + .n(4) + .k(8) + .a_stride(11) + .Test(xnn_qs8_gemm_minmax_ukernel_1x4c8__wasmsimd_ld64); + } + + TEST(QS8_GEMM_MINMAX_1X4C8__WASMSIMD_LD64, k_eq_8_subtile) { + for (uint32_t m = 1; m <= 1; m++) { + for (uint32_t n = 1; n <= 4; n++) { + GemmMicrokernelTester() + .mr(1) + .nr(4) + .kr(8) + .sr(1) + .m(m) + .n(n) + .k(8) + .iterations(1) + .Test(xnn_qs8_gemm_minmax_ukernel_1x4c8__wasmsimd_ld64); + } + } + } + + TEST(QS8_GEMM_MINMAX_1X4C8__WASMSIMD_LD64, k_eq_8_subtile_m) { + for (uint32_t m = 1; m <= 1; m++) { + GemmMicrokernelTester() + .mr(1) + .nr(4) + .kr(8) + .sr(1) + .m(m) + .n(4) + .k(8) + .iterations(1) + .Test(xnn_qs8_gemm_minmax_ukernel_1x4c8__wasmsimd_ld64); + } + } + + TEST(QS8_GEMM_MINMAX_1X4C8__WASMSIMD_LD64, k_eq_8_subtile_n) { + for (uint32_t n = 1; n <= 4; n++) { + GemmMicrokernelTester() + .mr(1) + .nr(4) + .kr(8) + .sr(1) + .m(1) + .n(n) + .k(8) + .iterations(1) + .Test(xnn_qs8_gemm_minmax_ukernel_1x4c8__wasmsimd_ld64); + } + } + + TEST(QS8_GEMM_MINMAX_1X4C8__WASMSIMD_LD64, k_lt_8) { + for (size_t k = 1; k < 8; k++) { + GemmMicrokernelTester() + .mr(1) + .nr(4) + .kr(8) + .sr(1) + .m(1) + .n(4) + .k(k) + .Test(xnn_qs8_gemm_minmax_ukernel_1x4c8__wasmsimd_ld64); + } + } + + TEST(QS8_GEMM_MINMAX_1X4C8__WASMSIMD_LD64, k_lt_8_strided_a) { + for (size_t k = 1; k < 8; k++) { + GemmMicrokernelTester() + .mr(1) + .nr(4) + .kr(8) + .sr(1) + .m(1) + .n(4) + .k(k) + .a_stride(11) + .Test(xnn_qs8_gemm_minmax_ukernel_1x4c8__wasmsimd_ld64); + } + } + + TEST(QS8_GEMM_MINMAX_1X4C8__WASMSIMD_LD64, k_lt_8_subtile) { + for (size_t k = 1; k < 8; k++) { + for (uint32_t m = 1; m <= 1; m++) { + for (uint32_t n = 1; n <= 4; n++) { + GemmMicrokernelTester() + .mr(1) + .nr(4) + .kr(8) + .sr(1) + .m(m) + .n(n) + .k(k) + .iterations(1) + .Test(xnn_qs8_gemm_minmax_ukernel_1x4c8__wasmsimd_ld64); + } + } + } + } + + TEST(QS8_GEMM_MINMAX_1X4C8__WASMSIMD_LD64, k_gt_8) { + for (size_t k = 9; k < 16; k++) { + GemmMicrokernelTester() + .mr(1) + .nr(4) + .kr(8) + .sr(1) + .m(1) + .n(4) + .k(k) + .Test(xnn_qs8_gemm_minmax_ukernel_1x4c8__wasmsimd_ld64); + } + } + + TEST(QS8_GEMM_MINMAX_1X4C8__WASMSIMD_LD64, k_gt_8_strided_a) { + for (size_t k = 9; k < 16; k++) { + GemmMicrokernelTester() + .mr(1) + .nr(4) + .kr(8) + .sr(1) + .m(1) + .n(4) + .k(k) + .a_stride(19) + .Test(xnn_qs8_gemm_minmax_ukernel_1x4c8__wasmsimd_ld64); + } + } + + TEST(QS8_GEMM_MINMAX_1X4C8__WASMSIMD_LD64, k_gt_8_subtile) { + for (size_t k = 9; k < 16; k++) { + for (uint32_t m = 1; m <= 1; m++) { + for (uint32_t n = 1; n <= 4; n++) { + GemmMicrokernelTester() + .mr(1) + .nr(4) + .kr(8) + .sr(1) + .m(m) + .n(n) + .k(k) + .iterations(1) + .Test(xnn_qs8_gemm_minmax_ukernel_1x4c8__wasmsimd_ld64); + } + } + } + } + + TEST(QS8_GEMM_MINMAX_1X4C8__WASMSIMD_LD64, k_div_8) { + for (size_t k = 16; k <= 80; k += 8) { + GemmMicrokernelTester() + .mr(1) + .nr(4) + .kr(8) + .sr(1) + .m(1) + .n(4) + .k(k) + .Test(xnn_qs8_gemm_minmax_ukernel_1x4c8__wasmsimd_ld64); + } + } + + TEST(QS8_GEMM_MINMAX_1X4C8__WASMSIMD_LD64, k_div_8_strided_a) { + for (size_t k = 16; k <= 80; k += 8) { + GemmMicrokernelTester() + .mr(1) + .nr(4) + .kr(8) + .sr(1) + .m(1) + .n(4) + .k(k) + .a_stride(83) + .Test(xnn_qs8_gemm_minmax_ukernel_1x4c8__wasmsimd_ld64); + } + } + + TEST(QS8_GEMM_MINMAX_1X4C8__WASMSIMD_LD64, k_div_8_subtile) { + for (size_t k = 16; k <= 80; k += 8) { + for (uint32_t m = 1; m <= 1; m++) { + for (uint32_t n = 1; n <= 4; n++) { + GemmMicrokernelTester() + .mr(1) + .nr(4) + .kr(8) + .sr(1) + .m(m) + .n(n) + .k(k) + .iterations(1) + .Test(xnn_qs8_gemm_minmax_ukernel_1x4c8__wasmsimd_ld64); + } + } + } + } + + TEST(QS8_GEMM_MINMAX_1X4C8__WASMSIMD_LD64, n_gt_4) { + for (uint32_t n = 5; n < 8; n++) { + for (size_t k = 1; k <= 40; k += 9) { + GemmMicrokernelTester() + .mr(1) + .nr(4) + .kr(8) + .sr(1) + .m(1) + .n(4) + .k(k) + .Test(xnn_qs8_gemm_minmax_ukernel_1x4c8__wasmsimd_ld64); + } + } + } + + TEST(QS8_GEMM_MINMAX_1X4C8__WASMSIMD_LD64, n_gt_4_strided_cn) { + for (uint32_t n = 5; n < 8; n++) { + for (size_t k = 1; k <= 40; k += 9) { + GemmMicrokernelTester() + .mr(1) + .nr(4) + .kr(8) + .sr(1) + .m(1) + .n(4) + .k(k) + .cn_stride(7) + .Test(xnn_qs8_gemm_minmax_ukernel_1x4c8__wasmsimd_ld64); + } + } + } + + TEST(QS8_GEMM_MINMAX_1X4C8__WASMSIMD_LD64, n_gt_4_strided_a) { + for (uint32_t n = 5; n < 8; n++) { + for (size_t k = 1; k <= 40; k += 9) { + GemmMicrokernelTester() + .mr(1) + .nr(4) + .kr(8) + .sr(1) + .m(1) + .n(n) + .k(k) + .a_stride(43) + .Test(xnn_qs8_gemm_minmax_ukernel_1x4c8__wasmsimd_ld64); + } + } + } + + TEST(QS8_GEMM_MINMAX_1X4C8__WASMSIMD_LD64, n_gt_4_subtile) { + for (uint32_t n = 5; n < 8; n++) { + for (size_t k = 1; k <= 40; k += 9) { + for (uint32_t m = 1; m <= 1; m++) { + GemmMicrokernelTester() + .mr(1) + .nr(4) + .kr(8) + .sr(1) + .m(m) + .n(n) + .k(k) + .iterations(1) + .Test(xnn_qs8_gemm_minmax_ukernel_1x4c8__wasmsimd_ld64); + } + } + } + } + + TEST(QS8_GEMM_MINMAX_1X4C8__WASMSIMD_LD64, n_div_4) { + for (uint32_t n = 8; n <= 12; n += 4) { + for (size_t k = 1; k <= 40; k += 9) { + GemmMicrokernelTester() + .mr(1) + .nr(4) + .kr(8) + .sr(1) + .m(1) + .n(4) + .k(k) + .Test(xnn_qs8_gemm_minmax_ukernel_1x4c8__wasmsimd_ld64); + } + } + } + + TEST(QS8_GEMM_MINMAX_1X4C8__WASMSIMD_LD64, n_div_4_strided_cn) { + for (uint32_t n = 8; n <= 12; n += 4) { + for (size_t k = 1; k <= 40; k += 9) { + GemmMicrokernelTester() + .mr(1) + .nr(4) + .kr(8) + .sr(1) + .m(1) + .n(n) + .k(k) + .cn_stride(7) + .Test(xnn_qs8_gemm_minmax_ukernel_1x4c8__wasmsimd_ld64); + } + } + } + + TEST(QS8_GEMM_MINMAX_1X4C8__WASMSIMD_LD64, n_div_4_strided_a) { + for (uint32_t n = 8; n <= 12; n += 4) { + for (size_t k = 1; k <= 40; k += 9) { + GemmMicrokernelTester() + .mr(1) + .nr(4) + .kr(8) + .sr(1) + .m(1) + .n(n) + .k(k) + .a_stride(43) + .Test(xnn_qs8_gemm_minmax_ukernel_1x4c8__wasmsimd_ld64); + } + } + } + + TEST(QS8_GEMM_MINMAX_1X4C8__WASMSIMD_LD64, n_div_4_subtile) { + for (uint32_t n = 8; n <= 12; n += 4) { + for (size_t k = 1; k <= 40; k += 9) { + for (uint32_t m = 1; m <= 1; m++) { + GemmMicrokernelTester() + .mr(1) + .nr(4) + .kr(8) + .sr(1) + .m(m) + .n(n) + .k(k) + .iterations(1) + .Test(xnn_qs8_gemm_minmax_ukernel_1x4c8__wasmsimd_ld64); + } + } + } + } + + TEST(QS8_GEMM_MINMAX_1X4C8__WASMSIMD_LD64, strided_cm_subtile) { + for (size_t k = 1; k <= 40; k += 9) { + for (uint32_t m = 1; m <= 1; m++) { + for (uint32_t n = 1; n <= 4; n++) { + GemmMicrokernelTester() + .mr(1) + .nr(4) + .kr(8) + .sr(1) + .m(m) + .n(n) + .k(k) + .cm_stride(7) + .iterations(1) + .Test(xnn_qs8_gemm_minmax_ukernel_1x4c8__wasmsimd_ld64); + } + } + } + } + + TEST(QS8_GEMM_MINMAX_1X4C8__WASMSIMD_LD64, qmin) { + GemmMicrokernelTester() + .mr(1) + .nr(4) + .kr(8) + .sr(1) + .m(1) + .n(4) + .k(8) + .qmin(128) + .Test(xnn_qs8_gemm_minmax_ukernel_1x4c8__wasmsimd_ld64); + } + + TEST(QS8_GEMM_MINMAX_1X4C8__WASMSIMD_LD64, qmax) { + GemmMicrokernelTester() + .mr(1) + .nr(4) + .kr(8) + .sr(1) + .m(1) + .n(4) + .k(8) + .qmax(128) + .Test(xnn_qs8_gemm_minmax_ukernel_1x4c8__wasmsimd_ld64); + } + + TEST(QS8_GEMM_MINMAX_1X4C8__WASMSIMD_LD64, strided_cm) { + GemmMicrokernelTester() + .mr(1) + .nr(4) + .kr(8) + .sr(1) + .m(1) + .n(4) + .k(8) + .cm_stride(7) + .Test(xnn_qs8_gemm_minmax_ukernel_1x4c8__wasmsimd_ld64); + } +#endif // XNN_ARCH_WASMSIMD + + +#if XNN_ARCH_WASMSIMD + TEST(QS8_GEMM_MINMAX_2X4C8__WASMSIMD_LD64, k_eq_8) { + GemmMicrokernelTester() + .mr(2) + .nr(4) + .kr(8) + .sr(1) + .m(2) + .n(4) + .k(8) + .Test(xnn_qs8_gemm_minmax_ukernel_2x4c8__wasmsimd_ld64); + } + + TEST(QS8_GEMM_MINMAX_2X4C8__WASMSIMD_LD64, strided_cn) { + GemmMicrokernelTester() + .mr(2) + .nr(4) + .kr(8) + .sr(1) + .m(2) + .n(4) + .k(8) + .cn_stride(7) + .Test(xnn_qs8_gemm_minmax_ukernel_2x4c8__wasmsimd_ld64); + } + + TEST(QS8_GEMM_MINMAX_2X4C8__WASMSIMD_LD64, k_eq_8_strided_a) { + GemmMicrokernelTester() + .mr(2) + .nr(4) + .kr(8) + .sr(1) + .m(2) + .n(4) + .k(8) + .a_stride(11) + .Test(xnn_qs8_gemm_minmax_ukernel_2x4c8__wasmsimd_ld64); + } + + TEST(QS8_GEMM_MINMAX_2X4C8__WASMSIMD_LD64, k_eq_8_subtile) { + for (uint32_t m = 1; m <= 2; m++) { + for (uint32_t n = 1; n <= 4; n++) { + GemmMicrokernelTester() + .mr(2) + .nr(4) + .kr(8) + .sr(1) + .m(m) + .n(n) + .k(8) + .iterations(1) + .Test(xnn_qs8_gemm_minmax_ukernel_2x4c8__wasmsimd_ld64); + } + } + } + + TEST(QS8_GEMM_MINMAX_2X4C8__WASMSIMD_LD64, k_eq_8_subtile_m) { + for (uint32_t m = 1; m <= 2; m++) { + GemmMicrokernelTester() + .mr(2) + .nr(4) + .kr(8) + .sr(1) + .m(m) + .n(4) + .k(8) + .iterations(1) + .Test(xnn_qs8_gemm_minmax_ukernel_2x4c8__wasmsimd_ld64); + } + } + + TEST(QS8_GEMM_MINMAX_2X4C8__WASMSIMD_LD64, k_eq_8_subtile_n) { + for (uint32_t n = 1; n <= 4; n++) { + GemmMicrokernelTester() + .mr(2) + .nr(4) + .kr(8) + .sr(1) + .m(2) + .n(n) + .k(8) + .iterations(1) + .Test(xnn_qs8_gemm_minmax_ukernel_2x4c8__wasmsimd_ld64); + } + } + + TEST(QS8_GEMM_MINMAX_2X4C8__WASMSIMD_LD64, k_lt_8) { + for (size_t k = 1; k < 8; k++) { + GemmMicrokernelTester() + .mr(2) + .nr(4) + .kr(8) + .sr(1) + .m(2) + .n(4) + .k(k) + .Test(xnn_qs8_gemm_minmax_ukernel_2x4c8__wasmsimd_ld64); + } + } + + TEST(QS8_GEMM_MINMAX_2X4C8__WASMSIMD_LD64, k_lt_8_strided_a) { + for (size_t k = 1; k < 8; k++) { + GemmMicrokernelTester() + .mr(2) + .nr(4) + .kr(8) + .sr(1) + .m(2) + .n(4) + .k(k) + .a_stride(11) + .Test(xnn_qs8_gemm_minmax_ukernel_2x4c8__wasmsimd_ld64); + } + } + + TEST(QS8_GEMM_MINMAX_2X4C8__WASMSIMD_LD64, k_lt_8_subtile) { + for (size_t k = 1; k < 8; k++) { + for (uint32_t m = 1; m <= 2; m++) { + for (uint32_t n = 1; n <= 4; n++) { + GemmMicrokernelTester() + .mr(2) + .nr(4) + .kr(8) + .sr(1) + .m(m) + .n(n) + .k(k) + .iterations(1) + .Test(xnn_qs8_gemm_minmax_ukernel_2x4c8__wasmsimd_ld64); + } + } + } + } + + TEST(QS8_GEMM_MINMAX_2X4C8__WASMSIMD_LD64, k_gt_8) { + for (size_t k = 9; k < 16; k++) { + GemmMicrokernelTester() + .mr(2) + .nr(4) + .kr(8) + .sr(1) + .m(2) + .n(4) + .k(k) + .Test(xnn_qs8_gemm_minmax_ukernel_2x4c8__wasmsimd_ld64); + } + } + + TEST(QS8_GEMM_MINMAX_2X4C8__WASMSIMD_LD64, k_gt_8_strided_a) { + for (size_t k = 9; k < 16; k++) { + GemmMicrokernelTester() + .mr(2) + .nr(4) + .kr(8) + .sr(1) + .m(2) + .n(4) + .k(k) + .a_stride(19) + .Test(xnn_qs8_gemm_minmax_ukernel_2x4c8__wasmsimd_ld64); + } + } + + TEST(QS8_GEMM_MINMAX_2X4C8__WASMSIMD_LD64, k_gt_8_subtile) { + for (size_t k = 9; k < 16; k++) { + for (uint32_t m = 1; m <= 2; m++) { + for (uint32_t n = 1; n <= 4; n++) { + GemmMicrokernelTester() + .mr(2) + .nr(4) + .kr(8) + .sr(1) + .m(m) + .n(n) + .k(k) + .iterations(1) + .Test(xnn_qs8_gemm_minmax_ukernel_2x4c8__wasmsimd_ld64); + } + } + } + } + + TEST(QS8_GEMM_MINMAX_2X4C8__WASMSIMD_LD64, k_div_8) { + for (size_t k = 16; k <= 80; k += 8) { + GemmMicrokernelTester() + .mr(2) + .nr(4) + .kr(8) + .sr(1) + .m(2) + .n(4) + .k(k) + .Test(xnn_qs8_gemm_minmax_ukernel_2x4c8__wasmsimd_ld64); + } + } + + TEST(QS8_GEMM_MINMAX_2X4C8__WASMSIMD_LD64, k_div_8_strided_a) { + for (size_t k = 16; k <= 80; k += 8) { + GemmMicrokernelTester() + .mr(2) + .nr(4) + .kr(8) + .sr(1) + .m(2) + .n(4) + .k(k) + .a_stride(83) + .Test(xnn_qs8_gemm_minmax_ukernel_2x4c8__wasmsimd_ld64); + } + } + + TEST(QS8_GEMM_MINMAX_2X4C8__WASMSIMD_LD64, k_div_8_subtile) { + for (size_t k = 16; k <= 80; k += 8) { + for (uint32_t m = 1; m <= 2; m++) { + for (uint32_t n = 1; n <= 4; n++) { + GemmMicrokernelTester() + .mr(2) + .nr(4) + .kr(8) + .sr(1) + .m(m) + .n(n) + .k(k) + .iterations(1) + .Test(xnn_qs8_gemm_minmax_ukernel_2x4c8__wasmsimd_ld64); + } + } + } + } + + TEST(QS8_GEMM_MINMAX_2X4C8__WASMSIMD_LD64, n_gt_4) { + for (uint32_t n = 5; n < 8; n++) { + for (size_t k = 1; k <= 40; k += 9) { + GemmMicrokernelTester() + .mr(2) + .nr(4) + .kr(8) + .sr(1) + .m(2) + .n(4) + .k(k) + .Test(xnn_qs8_gemm_minmax_ukernel_2x4c8__wasmsimd_ld64); + } + } + } + + TEST(QS8_GEMM_MINMAX_2X4C8__WASMSIMD_LD64, n_gt_4_strided_cn) { + for (uint32_t n = 5; n < 8; n++) { + for (size_t k = 1; k <= 40; k += 9) { + GemmMicrokernelTester() + .mr(2) + .nr(4) + .kr(8) + .sr(1) + .m(2) + .n(4) + .k(k) + .cn_stride(7) + .Test(xnn_qs8_gemm_minmax_ukernel_2x4c8__wasmsimd_ld64); + } + } + } + + TEST(QS8_GEMM_MINMAX_2X4C8__WASMSIMD_LD64, n_gt_4_strided_a) { + for (uint32_t n = 5; n < 8; n++) { + for (size_t k = 1; k <= 40; k += 9) { + GemmMicrokernelTester() + .mr(2) + .nr(4) + .kr(8) + .sr(1) + .m(2) + .n(n) + .k(k) + .a_stride(43) + .Test(xnn_qs8_gemm_minmax_ukernel_2x4c8__wasmsimd_ld64); + } + } + } + + TEST(QS8_GEMM_MINMAX_2X4C8__WASMSIMD_LD64, n_gt_4_subtile) { + for (uint32_t n = 5; n < 8; n++) { + for (size_t k = 1; k <= 40; k += 9) { + for (uint32_t m = 1; m <= 2; m++) { + GemmMicrokernelTester() + .mr(2) + .nr(4) + .kr(8) + .sr(1) + .m(m) + .n(n) + .k(k) + .iterations(1) + .Test(xnn_qs8_gemm_minmax_ukernel_2x4c8__wasmsimd_ld64); + } + } + } + } + + TEST(QS8_GEMM_MINMAX_2X4C8__WASMSIMD_LD64, n_div_4) { + for (uint32_t n = 8; n <= 12; n += 4) { + for (size_t k = 1; k <= 40; k += 9) { + GemmMicrokernelTester() + .mr(2) + .nr(4) + .kr(8) + .sr(1) + .m(2) + .n(4) + .k(k) + .Test(xnn_qs8_gemm_minmax_ukernel_2x4c8__wasmsimd_ld64); + } + } + } + + TEST(QS8_GEMM_MINMAX_2X4C8__WASMSIMD_LD64, n_div_4_strided_cn) { + for (uint32_t n = 8; n <= 12; n += 4) { + for (size_t k = 1; k <= 40; k += 9) { + GemmMicrokernelTester() + .mr(2) + .nr(4) + .kr(8) + .sr(1) + .m(2) + .n(n) + .k(k) + .cn_stride(7) + .Test(xnn_qs8_gemm_minmax_ukernel_2x4c8__wasmsimd_ld64); + } + } + } + + TEST(QS8_GEMM_MINMAX_2X4C8__WASMSIMD_LD64, n_div_4_strided_a) { + for (uint32_t n = 8; n <= 12; n += 4) { + for (size_t k = 1; k <= 40; k += 9) { + GemmMicrokernelTester() + .mr(2) + .nr(4) + .kr(8) + .sr(1) + .m(2) + .n(n) + .k(k) + .a_stride(43) + .Test(xnn_qs8_gemm_minmax_ukernel_2x4c8__wasmsimd_ld64); + } + } + } + + TEST(QS8_GEMM_MINMAX_2X4C8__WASMSIMD_LD64, n_div_4_subtile) { + for (uint32_t n = 8; n <= 12; n += 4) { + for (size_t k = 1; k <= 40; k += 9) { + for (uint32_t m = 1; m <= 2; m++) { + GemmMicrokernelTester() + .mr(2) + .nr(4) + .kr(8) + .sr(1) + .m(m) + .n(n) + .k(k) + .iterations(1) + .Test(xnn_qs8_gemm_minmax_ukernel_2x4c8__wasmsimd_ld64); + } + } + } + } + + TEST(QS8_GEMM_MINMAX_2X4C8__WASMSIMD_LD64, strided_cm_subtile) { + for (size_t k = 1; k <= 40; k += 9) { + for (uint32_t m = 1; m <= 2; m++) { + for (uint32_t n = 1; n <= 4; n++) { + GemmMicrokernelTester() + .mr(2) + .nr(4) + .kr(8) + .sr(1) + .m(m) + .n(n) + .k(k) + .cm_stride(7) + .iterations(1) + .Test(xnn_qs8_gemm_minmax_ukernel_2x4c8__wasmsimd_ld64); + } + } + } + } + + TEST(QS8_GEMM_MINMAX_2X4C8__WASMSIMD_LD64, qmin) { + GemmMicrokernelTester() + .mr(2) + .nr(4) + .kr(8) + .sr(1) + .m(2) + .n(4) + .k(8) + .qmin(128) + .Test(xnn_qs8_gemm_minmax_ukernel_2x4c8__wasmsimd_ld64); + } + + TEST(QS8_GEMM_MINMAX_2X4C8__WASMSIMD_LD64, qmax) { + GemmMicrokernelTester() + .mr(2) + .nr(4) + .kr(8) + .sr(1) + .m(2) + .n(4) + .k(8) + .qmax(128) + .Test(xnn_qs8_gemm_minmax_ukernel_2x4c8__wasmsimd_ld64); + } + + TEST(QS8_GEMM_MINMAX_2X4C8__WASMSIMD_LD64, strided_cm) { + GemmMicrokernelTester() + .mr(2) + .nr(4) + .kr(8) + .sr(1) + .m(2) + .n(4) + .k(8) + .cm_stride(7) + .Test(xnn_qs8_gemm_minmax_ukernel_2x4c8__wasmsimd_ld64); + } +#endif // XNN_ARCH_WASMSIMD + + +#if XNN_ARCH_WASMSIMD + TEST(QS8_GEMM_MINMAX_3X4C8__WASMSIMD_LD64, k_eq_8) { + GemmMicrokernelTester() + .mr(3) + .nr(4) + .kr(8) + .sr(1) + .m(3) + .n(4) + .k(8) + .Test(xnn_qs8_gemm_minmax_ukernel_3x4c8__wasmsimd_ld64); + } + + TEST(QS8_GEMM_MINMAX_3X4C8__WASMSIMD_LD64, strided_cn) { + GemmMicrokernelTester() + .mr(3) + .nr(4) + .kr(8) + .sr(1) + .m(3) + .n(4) + .k(8) + .cn_stride(7) + .Test(xnn_qs8_gemm_minmax_ukernel_3x4c8__wasmsimd_ld64); + } + + TEST(QS8_GEMM_MINMAX_3X4C8__WASMSIMD_LD64, k_eq_8_strided_a) { + GemmMicrokernelTester() + .mr(3) + .nr(4) + .kr(8) + .sr(1) + .m(3) + .n(4) + .k(8) + .a_stride(11) + .Test(xnn_qs8_gemm_minmax_ukernel_3x4c8__wasmsimd_ld64); + } + + TEST(QS8_GEMM_MINMAX_3X4C8__WASMSIMD_LD64, k_eq_8_subtile) { + for (uint32_t m = 1; m <= 3; m++) { + for (uint32_t n = 1; n <= 4; n++) { + GemmMicrokernelTester() + .mr(3) + .nr(4) + .kr(8) + .sr(1) + .m(m) + .n(n) + .k(8) + .iterations(1) + .Test(xnn_qs8_gemm_minmax_ukernel_3x4c8__wasmsimd_ld64); + } + } + } + + TEST(QS8_GEMM_MINMAX_3X4C8__WASMSIMD_LD64, k_eq_8_subtile_m) { + for (uint32_t m = 1; m <= 3; m++) { + GemmMicrokernelTester() + .mr(3) + .nr(4) + .kr(8) + .sr(1) + .m(m) + .n(4) + .k(8) + .iterations(1) + .Test(xnn_qs8_gemm_minmax_ukernel_3x4c8__wasmsimd_ld64); + } + } + + TEST(QS8_GEMM_MINMAX_3X4C8__WASMSIMD_LD64, k_eq_8_subtile_n) { + for (uint32_t n = 1; n <= 4; n++) { + GemmMicrokernelTester() + .mr(3) + .nr(4) + .kr(8) + .sr(1) + .m(3) + .n(n) + .k(8) + .iterations(1) + .Test(xnn_qs8_gemm_minmax_ukernel_3x4c8__wasmsimd_ld64); + } + } + + TEST(QS8_GEMM_MINMAX_3X4C8__WASMSIMD_LD64, k_lt_8) { + for (size_t k = 1; k < 8; k++) { + GemmMicrokernelTester() + .mr(3) + .nr(4) + .kr(8) + .sr(1) + .m(3) + .n(4) + .k(k) + .Test(xnn_qs8_gemm_minmax_ukernel_3x4c8__wasmsimd_ld64); + } + } + + TEST(QS8_GEMM_MINMAX_3X4C8__WASMSIMD_LD64, k_lt_8_strided_a) { + for (size_t k = 1; k < 8; k++) { + GemmMicrokernelTester() + .mr(3) + .nr(4) + .kr(8) + .sr(1) + .m(3) + .n(4) + .k(k) + .a_stride(11) + .Test(xnn_qs8_gemm_minmax_ukernel_3x4c8__wasmsimd_ld64); + } + } + + TEST(QS8_GEMM_MINMAX_3X4C8__WASMSIMD_LD64, k_lt_8_subtile) { + for (size_t k = 1; k < 8; k++) { + for (uint32_t m = 1; m <= 3; m++) { + for (uint32_t n = 1; n <= 4; n++) { + GemmMicrokernelTester() + .mr(3) + .nr(4) + .kr(8) + .sr(1) + .m(m) + .n(n) + .k(k) + .iterations(1) + .Test(xnn_qs8_gemm_minmax_ukernel_3x4c8__wasmsimd_ld64); + } + } + } + } + + TEST(QS8_GEMM_MINMAX_3X4C8__WASMSIMD_LD64, k_gt_8) { + for (size_t k = 9; k < 16; k++) { + GemmMicrokernelTester() + .mr(3) + .nr(4) + .kr(8) + .sr(1) + .m(3) + .n(4) + .k(k) + .Test(xnn_qs8_gemm_minmax_ukernel_3x4c8__wasmsimd_ld64); + } + } + + TEST(QS8_GEMM_MINMAX_3X4C8__WASMSIMD_LD64, k_gt_8_strided_a) { + for (size_t k = 9; k < 16; k++) { + GemmMicrokernelTester() + .mr(3) + .nr(4) + .kr(8) + .sr(1) + .m(3) + .n(4) + .k(k) + .a_stride(19) + .Test(xnn_qs8_gemm_minmax_ukernel_3x4c8__wasmsimd_ld64); + } + } + + TEST(QS8_GEMM_MINMAX_3X4C8__WASMSIMD_LD64, k_gt_8_subtile) { + for (size_t k = 9; k < 16; k++) { + for (uint32_t m = 1; m <= 3; m++) { + for (uint32_t n = 1; n <= 4; n++) { + GemmMicrokernelTester() + .mr(3) + .nr(4) + .kr(8) + .sr(1) + .m(m) + .n(n) + .k(k) + .iterations(1) + .Test(xnn_qs8_gemm_minmax_ukernel_3x4c8__wasmsimd_ld64); + } + } + } + } + + TEST(QS8_GEMM_MINMAX_3X4C8__WASMSIMD_LD64, k_div_8) { + for (size_t k = 16; k <= 80; k += 8) { + GemmMicrokernelTester() + .mr(3) + .nr(4) + .kr(8) + .sr(1) + .m(3) + .n(4) + .k(k) + .Test(xnn_qs8_gemm_minmax_ukernel_3x4c8__wasmsimd_ld64); + } + } + + TEST(QS8_GEMM_MINMAX_3X4C8__WASMSIMD_LD64, k_div_8_strided_a) { + for (size_t k = 16; k <= 80; k += 8) { + GemmMicrokernelTester() + .mr(3) + .nr(4) + .kr(8) + .sr(1) + .m(3) + .n(4) + .k(k) + .a_stride(83) + .Test(xnn_qs8_gemm_minmax_ukernel_3x4c8__wasmsimd_ld64); + } + } + + TEST(QS8_GEMM_MINMAX_3X4C8__WASMSIMD_LD64, k_div_8_subtile) { + for (size_t k = 16; k <= 80; k += 8) { + for (uint32_t m = 1; m <= 3; m++) { + for (uint32_t n = 1; n <= 4; n++) { + GemmMicrokernelTester() + .mr(3) + .nr(4) + .kr(8) + .sr(1) + .m(m) + .n(n) + .k(k) + .iterations(1) + .Test(xnn_qs8_gemm_minmax_ukernel_3x4c8__wasmsimd_ld64); + } + } + } + } + + TEST(QS8_GEMM_MINMAX_3X4C8__WASMSIMD_LD64, n_gt_4) { + for (uint32_t n = 5; n < 8; n++) { + for (size_t k = 1; k <= 40; k += 9) { + GemmMicrokernelTester() + .mr(3) + .nr(4) + .kr(8) + .sr(1) + .m(3) + .n(4) + .k(k) + .Test(xnn_qs8_gemm_minmax_ukernel_3x4c8__wasmsimd_ld64); + } + } + } + + TEST(QS8_GEMM_MINMAX_3X4C8__WASMSIMD_LD64, n_gt_4_strided_cn) { + for (uint32_t n = 5; n < 8; n++) { + for (size_t k = 1; k <= 40; k += 9) { + GemmMicrokernelTester() + .mr(3) + .nr(4) + .kr(8) + .sr(1) + .m(3) + .n(4) + .k(k) + .cn_stride(7) + .Test(xnn_qs8_gemm_minmax_ukernel_3x4c8__wasmsimd_ld64); + } + } + } + + TEST(QS8_GEMM_MINMAX_3X4C8__WASMSIMD_LD64, n_gt_4_strided_a) { + for (uint32_t n = 5; n < 8; n++) { + for (size_t k = 1; k <= 40; k += 9) { + GemmMicrokernelTester() + .mr(3) + .nr(4) + .kr(8) + .sr(1) + .m(3) + .n(n) + .k(k) + .a_stride(43) + .Test(xnn_qs8_gemm_minmax_ukernel_3x4c8__wasmsimd_ld64); + } + } + } + + TEST(QS8_GEMM_MINMAX_3X4C8__WASMSIMD_LD64, n_gt_4_subtile) { + for (uint32_t n = 5; n < 8; n++) { + for (size_t k = 1; k <= 40; k += 9) { + for (uint32_t m = 1; m <= 3; m++) { + GemmMicrokernelTester() + .mr(3) + .nr(4) + .kr(8) + .sr(1) + .m(m) + .n(n) + .k(k) + .iterations(1) + .Test(xnn_qs8_gemm_minmax_ukernel_3x4c8__wasmsimd_ld64); + } + } + } + } + + TEST(QS8_GEMM_MINMAX_3X4C8__WASMSIMD_LD64, n_div_4) { + for (uint32_t n = 8; n <= 12; n += 4) { + for (size_t k = 1; k <= 40; k += 9) { + GemmMicrokernelTester() + .mr(3) + .nr(4) + .kr(8) + .sr(1) + .m(3) + .n(4) + .k(k) + .Test(xnn_qs8_gemm_minmax_ukernel_3x4c8__wasmsimd_ld64); + } + } + } + + TEST(QS8_GEMM_MINMAX_3X4C8__WASMSIMD_LD64, n_div_4_strided_cn) { + for (uint32_t n = 8; n <= 12; n += 4) { + for (size_t k = 1; k <= 40; k += 9) { + GemmMicrokernelTester() + .mr(3) + .nr(4) + .kr(8) + .sr(1) + .m(3) + .n(n) + .k(k) + .cn_stride(7) + .Test(xnn_qs8_gemm_minmax_ukernel_3x4c8__wasmsimd_ld64); + } + } + } + + TEST(QS8_GEMM_MINMAX_3X4C8__WASMSIMD_LD64, n_div_4_strided_a) { + for (uint32_t n = 8; n <= 12; n += 4) { + for (size_t k = 1; k <= 40; k += 9) { + GemmMicrokernelTester() + .mr(3) + .nr(4) + .kr(8) + .sr(1) + .m(3) + .n(n) + .k(k) + .a_stride(43) + .Test(xnn_qs8_gemm_minmax_ukernel_3x4c8__wasmsimd_ld64); + } + } + } + + TEST(QS8_GEMM_MINMAX_3X4C8__WASMSIMD_LD64, n_div_4_subtile) { + for (uint32_t n = 8; n <= 12; n += 4) { + for (size_t k = 1; k <= 40; k += 9) { + for (uint32_t m = 1; m <= 3; m++) { + GemmMicrokernelTester() + .mr(3) + .nr(4) + .kr(8) + .sr(1) + .m(m) + .n(n) + .k(k) + .iterations(1) + .Test(xnn_qs8_gemm_minmax_ukernel_3x4c8__wasmsimd_ld64); + } + } + } + } + + TEST(QS8_GEMM_MINMAX_3X4C8__WASMSIMD_LD64, strided_cm_subtile) { + for (size_t k = 1; k <= 40; k += 9) { + for (uint32_t m = 1; m <= 3; m++) { + for (uint32_t n = 1; n <= 4; n++) { + GemmMicrokernelTester() + .mr(3) + .nr(4) + .kr(8) + .sr(1) + .m(m) + .n(n) + .k(k) + .cm_stride(7) + .iterations(1) + .Test(xnn_qs8_gemm_minmax_ukernel_3x4c8__wasmsimd_ld64); + } + } + } + } + + TEST(QS8_GEMM_MINMAX_3X4C8__WASMSIMD_LD64, qmin) { + GemmMicrokernelTester() + .mr(3) + .nr(4) + .kr(8) + .sr(1) + .m(3) + .n(4) + .k(8) + .qmin(128) + .Test(xnn_qs8_gemm_minmax_ukernel_3x4c8__wasmsimd_ld64); + } + + TEST(QS8_GEMM_MINMAX_3X4C8__WASMSIMD_LD64, qmax) { + GemmMicrokernelTester() + .mr(3) + .nr(4) + .kr(8) + .sr(1) + .m(3) + .n(4) + .k(8) + .qmax(128) + .Test(xnn_qs8_gemm_minmax_ukernel_3x4c8__wasmsimd_ld64); + } + + TEST(QS8_GEMM_MINMAX_3X4C8__WASMSIMD_LD64, strided_cm) { + GemmMicrokernelTester() + .mr(3) + .nr(4) + .kr(8) + .sr(1) + .m(3) + .n(4) + .k(8) + .cm_stride(7) + .Test(xnn_qs8_gemm_minmax_ukernel_3x4c8__wasmsimd_ld64); + } +#endif // XNN_ARCH_WASMSIMD + + +#if XNN_ARCH_WASMSIMD + TEST(QS8_GEMM_MINMAX_1X4C8__WASMSIMD_LD128, k_eq_8) { + GemmMicrokernelTester() + .mr(1) + .nr(4) + .kr(8) + .sr(1) + .m(1) + .n(4) + .k(8) + .Test(xnn_qs8_gemm_minmax_ukernel_1x4c8__wasmsimd_ld128); + } + + TEST(QS8_GEMM_MINMAX_1X4C8__WASMSIMD_LD128, strided_cn) { + GemmMicrokernelTester() + .mr(1) + .nr(4) + .kr(8) + .sr(1) + .m(1) + .n(4) + .k(8) + .cn_stride(7) + .Test(xnn_qs8_gemm_minmax_ukernel_1x4c8__wasmsimd_ld128); + } + + TEST(QS8_GEMM_MINMAX_1X4C8__WASMSIMD_LD128, k_eq_8_strided_a) { + GemmMicrokernelTester() + .mr(1) + .nr(4) + .kr(8) + .sr(1) + .m(1) + .n(4) + .k(8) + .a_stride(11) + .Test(xnn_qs8_gemm_minmax_ukernel_1x4c8__wasmsimd_ld128); + } + + TEST(QS8_GEMM_MINMAX_1X4C8__WASMSIMD_LD128, k_eq_8_subtile) { + for (uint32_t m = 1; m <= 1; m++) { + for (uint32_t n = 1; n <= 4; n++) { + GemmMicrokernelTester() + .mr(1) + .nr(4) + .kr(8) + .sr(1) + .m(m) + .n(n) + .k(8) + .iterations(1) + .Test(xnn_qs8_gemm_minmax_ukernel_1x4c8__wasmsimd_ld128); + } + } + } + + TEST(QS8_GEMM_MINMAX_1X4C8__WASMSIMD_LD128, k_eq_8_subtile_m) { + for (uint32_t m = 1; m <= 1; m++) { + GemmMicrokernelTester() + .mr(1) + .nr(4) + .kr(8) + .sr(1) + .m(m) + .n(4) + .k(8) + .iterations(1) + .Test(xnn_qs8_gemm_minmax_ukernel_1x4c8__wasmsimd_ld128); + } + } + + TEST(QS8_GEMM_MINMAX_1X4C8__WASMSIMD_LD128, k_eq_8_subtile_n) { + for (uint32_t n = 1; n <= 4; n++) { + GemmMicrokernelTester() + .mr(1) + .nr(4) + .kr(8) + .sr(1) + .m(1) + .n(n) + .k(8) + .iterations(1) + .Test(xnn_qs8_gemm_minmax_ukernel_1x4c8__wasmsimd_ld128); + } + } + + TEST(QS8_GEMM_MINMAX_1X4C8__WASMSIMD_LD128, k_lt_8) { + for (size_t k = 1; k < 8; k++) { + GemmMicrokernelTester() + .mr(1) + .nr(4) + .kr(8) + .sr(1) + .m(1) + .n(4) + .k(k) + .Test(xnn_qs8_gemm_minmax_ukernel_1x4c8__wasmsimd_ld128); + } + } + + TEST(QS8_GEMM_MINMAX_1X4C8__WASMSIMD_LD128, k_lt_8_strided_a) { + for (size_t k = 1; k < 8; k++) { + GemmMicrokernelTester() + .mr(1) + .nr(4) + .kr(8) + .sr(1) + .m(1) + .n(4) + .k(k) + .a_stride(11) + .Test(xnn_qs8_gemm_minmax_ukernel_1x4c8__wasmsimd_ld128); + } + } + + TEST(QS8_GEMM_MINMAX_1X4C8__WASMSIMD_LD128, k_lt_8_subtile) { + for (size_t k = 1; k < 8; k++) { + for (uint32_t m = 1; m <= 1; m++) { + for (uint32_t n = 1; n <= 4; n++) { + GemmMicrokernelTester() + .mr(1) + .nr(4) + .kr(8) + .sr(1) + .m(m) + .n(n) + .k(k) + .iterations(1) + .Test(xnn_qs8_gemm_minmax_ukernel_1x4c8__wasmsimd_ld128); + } + } + } + } + + TEST(QS8_GEMM_MINMAX_1X4C8__WASMSIMD_LD128, k_gt_8) { + for (size_t k = 9; k < 16; k++) { + GemmMicrokernelTester() + .mr(1) + .nr(4) + .kr(8) + .sr(1) + .m(1) + .n(4) + .k(k) + .Test(xnn_qs8_gemm_minmax_ukernel_1x4c8__wasmsimd_ld128); + } + } + + TEST(QS8_GEMM_MINMAX_1X4C8__WASMSIMD_LD128, k_gt_8_strided_a) { + for (size_t k = 9; k < 16; k++) { + GemmMicrokernelTester() + .mr(1) + .nr(4) + .kr(8) + .sr(1) + .m(1) + .n(4) + .k(k) + .a_stride(19) + .Test(xnn_qs8_gemm_minmax_ukernel_1x4c8__wasmsimd_ld128); + } + } + + TEST(QS8_GEMM_MINMAX_1X4C8__WASMSIMD_LD128, k_gt_8_subtile) { + for (size_t k = 9; k < 16; k++) { + for (uint32_t m = 1; m <= 1; m++) { + for (uint32_t n = 1; n <= 4; n++) { + GemmMicrokernelTester() + .mr(1) + .nr(4) + .kr(8) + .sr(1) + .m(m) + .n(n) + .k(k) + .iterations(1) + .Test(xnn_qs8_gemm_minmax_ukernel_1x4c8__wasmsimd_ld128); + } + } + } + } + + TEST(QS8_GEMM_MINMAX_1X4C8__WASMSIMD_LD128, k_div_8) { + for (size_t k = 16; k <= 80; k += 8) { + GemmMicrokernelTester() + .mr(1) + .nr(4) + .kr(8) + .sr(1) + .m(1) + .n(4) + .k(k) + .Test(xnn_qs8_gemm_minmax_ukernel_1x4c8__wasmsimd_ld128); + } + } + + TEST(QS8_GEMM_MINMAX_1X4C8__WASMSIMD_LD128, k_div_8_strided_a) { + for (size_t k = 16; k <= 80; k += 8) { + GemmMicrokernelTester() + .mr(1) + .nr(4) + .kr(8) + .sr(1) + .m(1) + .n(4) + .k(k) + .a_stride(83) + .Test(xnn_qs8_gemm_minmax_ukernel_1x4c8__wasmsimd_ld128); + } + } + + TEST(QS8_GEMM_MINMAX_1X4C8__WASMSIMD_LD128, k_div_8_subtile) { + for (size_t k = 16; k <= 80; k += 8) { + for (uint32_t m = 1; m <= 1; m++) { + for (uint32_t n = 1; n <= 4; n++) { + GemmMicrokernelTester() + .mr(1) + .nr(4) + .kr(8) + .sr(1) + .m(m) + .n(n) + .k(k) + .iterations(1) + .Test(xnn_qs8_gemm_minmax_ukernel_1x4c8__wasmsimd_ld128); + } + } + } + } + + TEST(QS8_GEMM_MINMAX_1X4C8__WASMSIMD_LD128, n_gt_4) { + for (uint32_t n = 5; n < 8; n++) { + for (size_t k = 1; k <= 40; k += 9) { + GemmMicrokernelTester() + .mr(1) + .nr(4) + .kr(8) + .sr(1) + .m(1) + .n(4) + .k(k) + .Test(xnn_qs8_gemm_minmax_ukernel_1x4c8__wasmsimd_ld128); + } + } + } + + TEST(QS8_GEMM_MINMAX_1X4C8__WASMSIMD_LD128, n_gt_4_strided_cn) { + for (uint32_t n = 5; n < 8; n++) { + for (size_t k = 1; k <= 40; k += 9) { + GemmMicrokernelTester() + .mr(1) + .nr(4) + .kr(8) + .sr(1) + .m(1) + .n(4) + .k(k) + .cn_stride(7) + .Test(xnn_qs8_gemm_minmax_ukernel_1x4c8__wasmsimd_ld128); + } + } + } + + TEST(QS8_GEMM_MINMAX_1X4C8__WASMSIMD_LD128, n_gt_4_strided_a) { + for (uint32_t n = 5; n < 8; n++) { + for (size_t k = 1; k <= 40; k += 9) { + GemmMicrokernelTester() + .mr(1) + .nr(4) + .kr(8) + .sr(1) + .m(1) + .n(n) + .k(k) + .a_stride(43) + .Test(xnn_qs8_gemm_minmax_ukernel_1x4c8__wasmsimd_ld128); + } + } + } + + TEST(QS8_GEMM_MINMAX_1X4C8__WASMSIMD_LD128, n_gt_4_subtile) { + for (uint32_t n = 5; n < 8; n++) { + for (size_t k = 1; k <= 40; k += 9) { + for (uint32_t m = 1; m <= 1; m++) { + GemmMicrokernelTester() + .mr(1) + .nr(4) + .kr(8) + .sr(1) + .m(m) + .n(n) + .k(k) + .iterations(1) + .Test(xnn_qs8_gemm_minmax_ukernel_1x4c8__wasmsimd_ld128); + } + } + } + } + + TEST(QS8_GEMM_MINMAX_1X4C8__WASMSIMD_LD128, n_div_4) { + for (uint32_t n = 8; n <= 12; n += 4) { + for (size_t k = 1; k <= 40; k += 9) { + GemmMicrokernelTester() + .mr(1) + .nr(4) + .kr(8) + .sr(1) + .m(1) + .n(4) + .k(k) + .Test(xnn_qs8_gemm_minmax_ukernel_1x4c8__wasmsimd_ld128); + } + } + } + + TEST(QS8_GEMM_MINMAX_1X4C8__WASMSIMD_LD128, n_div_4_strided_cn) { + for (uint32_t n = 8; n <= 12; n += 4) { + for (size_t k = 1; k <= 40; k += 9) { + GemmMicrokernelTester() + .mr(1) + .nr(4) + .kr(8) + .sr(1) + .m(1) + .n(n) + .k(k) + .cn_stride(7) + .Test(xnn_qs8_gemm_minmax_ukernel_1x4c8__wasmsimd_ld128); + } + } + } + + TEST(QS8_GEMM_MINMAX_1X4C8__WASMSIMD_LD128, n_div_4_strided_a) { + for (uint32_t n = 8; n <= 12; n += 4) { + for (size_t k = 1; k <= 40; k += 9) { + GemmMicrokernelTester() + .mr(1) + .nr(4) + .kr(8) + .sr(1) + .m(1) + .n(n) + .k(k) + .a_stride(43) + .Test(xnn_qs8_gemm_minmax_ukernel_1x4c8__wasmsimd_ld128); + } + } + } + + TEST(QS8_GEMM_MINMAX_1X4C8__WASMSIMD_LD128, n_div_4_subtile) { + for (uint32_t n = 8; n <= 12; n += 4) { + for (size_t k = 1; k <= 40; k += 9) { + for (uint32_t m = 1; m <= 1; m++) { + GemmMicrokernelTester() + .mr(1) + .nr(4) + .kr(8) + .sr(1) + .m(m) + .n(n) + .k(k) + .iterations(1) + .Test(xnn_qs8_gemm_minmax_ukernel_1x4c8__wasmsimd_ld128); + } + } + } + } + + TEST(QS8_GEMM_MINMAX_1X4C8__WASMSIMD_LD128, strided_cm_subtile) { + for (size_t k = 1; k <= 40; k += 9) { + for (uint32_t m = 1; m <= 1; m++) { + for (uint32_t n = 1; n <= 4; n++) { + GemmMicrokernelTester() + .mr(1) + .nr(4) + .kr(8) + .sr(1) + .m(m) + .n(n) + .k(k) + .cm_stride(7) + .iterations(1) + .Test(xnn_qs8_gemm_minmax_ukernel_1x4c8__wasmsimd_ld128); + } + } + } + } + + TEST(QS8_GEMM_MINMAX_1X4C8__WASMSIMD_LD128, qmin) { + GemmMicrokernelTester() + .mr(1) + .nr(4) + .kr(8) + .sr(1) + .m(1) + .n(4) + .k(8) + .qmin(128) + .Test(xnn_qs8_gemm_minmax_ukernel_1x4c8__wasmsimd_ld128); + } + + TEST(QS8_GEMM_MINMAX_1X4C8__WASMSIMD_LD128, qmax) { + GemmMicrokernelTester() + .mr(1) + .nr(4) + .kr(8) + .sr(1) + .m(1) + .n(4) + .k(8) + .qmax(128) + .Test(xnn_qs8_gemm_minmax_ukernel_1x4c8__wasmsimd_ld128); + } + + TEST(QS8_GEMM_MINMAX_1X4C8__WASMSIMD_LD128, strided_cm) { + GemmMicrokernelTester() + .mr(1) + .nr(4) + .kr(8) + .sr(1) + .m(1) + .n(4) + .k(8) + .cm_stride(7) + .Test(xnn_qs8_gemm_minmax_ukernel_1x4c8__wasmsimd_ld128); + } +#endif // XNN_ARCH_WASMSIMD + + +#if XNN_ARCH_WASMSIMD + TEST(QS8_GEMM_MINMAX_2X4C8__WASMSIMD_LD128, k_eq_8) { + GemmMicrokernelTester() + .mr(2) + .nr(4) + .kr(8) + .sr(1) + .m(2) + .n(4) + .k(8) + .Test(xnn_qs8_gemm_minmax_ukernel_2x4c8__wasmsimd_ld128); + } + + TEST(QS8_GEMM_MINMAX_2X4C8__WASMSIMD_LD128, strided_cn) { + GemmMicrokernelTester() + .mr(2) + .nr(4) + .kr(8) + .sr(1) + .m(2) + .n(4) + .k(8) + .cn_stride(7) + .Test(xnn_qs8_gemm_minmax_ukernel_2x4c8__wasmsimd_ld128); + } + + TEST(QS8_GEMM_MINMAX_2X4C8__WASMSIMD_LD128, k_eq_8_strided_a) { + GemmMicrokernelTester() + .mr(2) + .nr(4) + .kr(8) + .sr(1) + .m(2) + .n(4) + .k(8) + .a_stride(11) + .Test(xnn_qs8_gemm_minmax_ukernel_2x4c8__wasmsimd_ld128); + } + + TEST(QS8_GEMM_MINMAX_2X4C8__WASMSIMD_LD128, k_eq_8_subtile) { + for (uint32_t m = 1; m <= 2; m++) { + for (uint32_t n = 1; n <= 4; n++) { + GemmMicrokernelTester() + .mr(2) + .nr(4) + .kr(8) + .sr(1) + .m(m) + .n(n) + .k(8) + .iterations(1) + .Test(xnn_qs8_gemm_minmax_ukernel_2x4c8__wasmsimd_ld128); + } + } + } + + TEST(QS8_GEMM_MINMAX_2X4C8__WASMSIMD_LD128, k_eq_8_subtile_m) { + for (uint32_t m = 1; m <= 2; m++) { + GemmMicrokernelTester() + .mr(2) + .nr(4) + .kr(8) + .sr(1) + .m(m) + .n(4) + .k(8) + .iterations(1) + .Test(xnn_qs8_gemm_minmax_ukernel_2x4c8__wasmsimd_ld128); + } + } + + TEST(QS8_GEMM_MINMAX_2X4C8__WASMSIMD_LD128, k_eq_8_subtile_n) { + for (uint32_t n = 1; n <= 4; n++) { + GemmMicrokernelTester() + .mr(2) + .nr(4) + .kr(8) + .sr(1) + .m(2) + .n(n) + .k(8) + .iterations(1) + .Test(xnn_qs8_gemm_minmax_ukernel_2x4c8__wasmsimd_ld128); + } + } + + TEST(QS8_GEMM_MINMAX_2X4C8__WASMSIMD_LD128, k_lt_8) { + for (size_t k = 1; k < 8; k++) { + GemmMicrokernelTester() + .mr(2) + .nr(4) + .kr(8) + .sr(1) + .m(2) + .n(4) + .k(k) + .Test(xnn_qs8_gemm_minmax_ukernel_2x4c8__wasmsimd_ld128); + } + } + + TEST(QS8_GEMM_MINMAX_2X4C8__WASMSIMD_LD128, k_lt_8_strided_a) { + for (size_t k = 1; k < 8; k++) { + GemmMicrokernelTester() + .mr(2) + .nr(4) + .kr(8) + .sr(1) + .m(2) + .n(4) + .k(k) + .a_stride(11) + .Test(xnn_qs8_gemm_minmax_ukernel_2x4c8__wasmsimd_ld128); + } + } + + TEST(QS8_GEMM_MINMAX_2X4C8__WASMSIMD_LD128, k_lt_8_subtile) { + for (size_t k = 1; k < 8; k++) { + for (uint32_t m = 1; m <= 2; m++) { + for (uint32_t n = 1; n <= 4; n++) { + GemmMicrokernelTester() + .mr(2) + .nr(4) + .kr(8) + .sr(1) + .m(m) + .n(n) + .k(k) + .iterations(1) + .Test(xnn_qs8_gemm_minmax_ukernel_2x4c8__wasmsimd_ld128); + } + } + } + } + + TEST(QS8_GEMM_MINMAX_2X4C8__WASMSIMD_LD128, k_gt_8) { + for (size_t k = 9; k < 16; k++) { + GemmMicrokernelTester() + .mr(2) + .nr(4) + .kr(8) + .sr(1) + .m(2) + .n(4) + .k(k) + .Test(xnn_qs8_gemm_minmax_ukernel_2x4c8__wasmsimd_ld128); + } + } + + TEST(QS8_GEMM_MINMAX_2X4C8__WASMSIMD_LD128, k_gt_8_strided_a) { + for (size_t k = 9; k < 16; k++) { + GemmMicrokernelTester() + .mr(2) + .nr(4) + .kr(8) + .sr(1) + .m(2) + .n(4) + .k(k) + .a_stride(19) + .Test(xnn_qs8_gemm_minmax_ukernel_2x4c8__wasmsimd_ld128); + } + } + + TEST(QS8_GEMM_MINMAX_2X4C8__WASMSIMD_LD128, k_gt_8_subtile) { + for (size_t k = 9; k < 16; k++) { + for (uint32_t m = 1; m <= 2; m++) { + for (uint32_t n = 1; n <= 4; n++) { + GemmMicrokernelTester() + .mr(2) + .nr(4) + .kr(8) + .sr(1) + .m(m) + .n(n) + .k(k) + .iterations(1) + .Test(xnn_qs8_gemm_minmax_ukernel_2x4c8__wasmsimd_ld128); + } + } + } + } + + TEST(QS8_GEMM_MINMAX_2X4C8__WASMSIMD_LD128, k_div_8) { + for (size_t k = 16; k <= 80; k += 8) { + GemmMicrokernelTester() + .mr(2) + .nr(4) + .kr(8) + .sr(1) + .m(2) + .n(4) + .k(k) + .Test(xnn_qs8_gemm_minmax_ukernel_2x4c8__wasmsimd_ld128); + } + } + + TEST(QS8_GEMM_MINMAX_2X4C8__WASMSIMD_LD128, k_div_8_strided_a) { + for (size_t k = 16; k <= 80; k += 8) { + GemmMicrokernelTester() + .mr(2) + .nr(4) + .kr(8) + .sr(1) + .m(2) + .n(4) + .k(k) + .a_stride(83) + .Test(xnn_qs8_gemm_minmax_ukernel_2x4c8__wasmsimd_ld128); + } + } + + TEST(QS8_GEMM_MINMAX_2X4C8__WASMSIMD_LD128, k_div_8_subtile) { + for (size_t k = 16; k <= 80; k += 8) { + for (uint32_t m = 1; m <= 2; m++) { + for (uint32_t n = 1; n <= 4; n++) { + GemmMicrokernelTester() + .mr(2) + .nr(4) + .kr(8) + .sr(1) + .m(m) + .n(n) + .k(k) + .iterations(1) + .Test(xnn_qs8_gemm_minmax_ukernel_2x4c8__wasmsimd_ld128); + } + } + } + } + + TEST(QS8_GEMM_MINMAX_2X4C8__WASMSIMD_LD128, n_gt_4) { + for (uint32_t n = 5; n < 8; n++) { + for (size_t k = 1; k <= 40; k += 9) { + GemmMicrokernelTester() + .mr(2) + .nr(4) + .kr(8) + .sr(1) + .m(2) + .n(4) + .k(k) + .Test(xnn_qs8_gemm_minmax_ukernel_2x4c8__wasmsimd_ld128); + } + } + } + + TEST(QS8_GEMM_MINMAX_2X4C8__WASMSIMD_LD128, n_gt_4_strided_cn) { + for (uint32_t n = 5; n < 8; n++) { + for (size_t k = 1; k <= 40; k += 9) { + GemmMicrokernelTester() + .mr(2) + .nr(4) + .kr(8) + .sr(1) + .m(2) + .n(4) + .k(k) + .cn_stride(7) + .Test(xnn_qs8_gemm_minmax_ukernel_2x4c8__wasmsimd_ld128); + } + } + } + + TEST(QS8_GEMM_MINMAX_2X4C8__WASMSIMD_LD128, n_gt_4_strided_a) { + for (uint32_t n = 5; n < 8; n++) { + for (size_t k = 1; k <= 40; k += 9) { + GemmMicrokernelTester() + .mr(2) + .nr(4) + .kr(8) + .sr(1) + .m(2) + .n(n) + .k(k) + .a_stride(43) + .Test(xnn_qs8_gemm_minmax_ukernel_2x4c8__wasmsimd_ld128); + } + } + } + + TEST(QS8_GEMM_MINMAX_2X4C8__WASMSIMD_LD128, n_gt_4_subtile) { + for (uint32_t n = 5; n < 8; n++) { + for (size_t k = 1; k <= 40; k += 9) { + for (uint32_t m = 1; m <= 2; m++) { + GemmMicrokernelTester() + .mr(2) + .nr(4) + .kr(8) + .sr(1) + .m(m) + .n(n) + .k(k) + .iterations(1) + .Test(xnn_qs8_gemm_minmax_ukernel_2x4c8__wasmsimd_ld128); + } + } + } + } + + TEST(QS8_GEMM_MINMAX_2X4C8__WASMSIMD_LD128, n_div_4) { + for (uint32_t n = 8; n <= 12; n += 4) { + for (size_t k = 1; k <= 40; k += 9) { + GemmMicrokernelTester() + .mr(2) + .nr(4) + .kr(8) + .sr(1) + .m(2) + .n(4) + .k(k) + .Test(xnn_qs8_gemm_minmax_ukernel_2x4c8__wasmsimd_ld128); + } + } + } + + TEST(QS8_GEMM_MINMAX_2X4C8__WASMSIMD_LD128, n_div_4_strided_cn) { + for (uint32_t n = 8; n <= 12; n += 4) { + for (size_t k = 1; k <= 40; k += 9) { + GemmMicrokernelTester() + .mr(2) + .nr(4) + .kr(8) + .sr(1) + .m(2) + .n(n) + .k(k) + .cn_stride(7) + .Test(xnn_qs8_gemm_minmax_ukernel_2x4c8__wasmsimd_ld128); + } + } + } + + TEST(QS8_GEMM_MINMAX_2X4C8__WASMSIMD_LD128, n_div_4_strided_a) { + for (uint32_t n = 8; n <= 12; n += 4) { + for (size_t k = 1; k <= 40; k += 9) { + GemmMicrokernelTester() + .mr(2) + .nr(4) + .kr(8) + .sr(1) + .m(2) + .n(n) + .k(k) + .a_stride(43) + .Test(xnn_qs8_gemm_minmax_ukernel_2x4c8__wasmsimd_ld128); + } + } + } + + TEST(QS8_GEMM_MINMAX_2X4C8__WASMSIMD_LD128, n_div_4_subtile) { + for (uint32_t n = 8; n <= 12; n += 4) { + for (size_t k = 1; k <= 40; k += 9) { + for (uint32_t m = 1; m <= 2; m++) { + GemmMicrokernelTester() + .mr(2) + .nr(4) + .kr(8) + .sr(1) + .m(m) + .n(n) + .k(k) + .iterations(1) + .Test(xnn_qs8_gemm_minmax_ukernel_2x4c8__wasmsimd_ld128); + } + } + } + } + + TEST(QS8_GEMM_MINMAX_2X4C8__WASMSIMD_LD128, strided_cm_subtile) { + for (size_t k = 1; k <= 40; k += 9) { + for (uint32_t m = 1; m <= 2; m++) { + for (uint32_t n = 1; n <= 4; n++) { + GemmMicrokernelTester() + .mr(2) + .nr(4) + .kr(8) + .sr(1) + .m(m) + .n(n) + .k(k) + .cm_stride(7) + .iterations(1) + .Test(xnn_qs8_gemm_minmax_ukernel_2x4c8__wasmsimd_ld128); + } + } + } + } + + TEST(QS8_GEMM_MINMAX_2X4C8__WASMSIMD_LD128, qmin) { + GemmMicrokernelTester() + .mr(2) + .nr(4) + .kr(8) + .sr(1) + .m(2) + .n(4) + .k(8) + .qmin(128) + .Test(xnn_qs8_gemm_minmax_ukernel_2x4c8__wasmsimd_ld128); + } + + TEST(QS8_GEMM_MINMAX_2X4C8__WASMSIMD_LD128, qmax) { + GemmMicrokernelTester() + .mr(2) + .nr(4) + .kr(8) + .sr(1) + .m(2) + .n(4) + .k(8) + .qmax(128) + .Test(xnn_qs8_gemm_minmax_ukernel_2x4c8__wasmsimd_ld128); + } + + TEST(QS8_GEMM_MINMAX_2X4C8__WASMSIMD_LD128, strided_cm) { + GemmMicrokernelTester() + .mr(2) + .nr(4) + .kr(8) + .sr(1) + .m(2) + .n(4) + .k(8) + .cm_stride(7) + .Test(xnn_qs8_gemm_minmax_ukernel_2x4c8__wasmsimd_ld128); + } +#endif // XNN_ARCH_WASMSIMD + + +#if XNN_ARCH_WASMSIMD + TEST(QS8_GEMM_MINMAX_3X4C8__WASMSIMD_LD128, k_eq_8) { + GemmMicrokernelTester() + .mr(3) + .nr(4) + .kr(8) + .sr(1) + .m(3) + .n(4) + .k(8) + .Test(xnn_qs8_gemm_minmax_ukernel_3x4c8__wasmsimd_ld128); + } + + TEST(QS8_GEMM_MINMAX_3X4C8__WASMSIMD_LD128, strided_cn) { + GemmMicrokernelTester() + .mr(3) + .nr(4) + .kr(8) + .sr(1) + .m(3) + .n(4) + .k(8) + .cn_stride(7) + .Test(xnn_qs8_gemm_minmax_ukernel_3x4c8__wasmsimd_ld128); + } + + TEST(QS8_GEMM_MINMAX_3X4C8__WASMSIMD_LD128, k_eq_8_strided_a) { + GemmMicrokernelTester() + .mr(3) + .nr(4) + .kr(8) + .sr(1) + .m(3) + .n(4) + .k(8) + .a_stride(11) + .Test(xnn_qs8_gemm_minmax_ukernel_3x4c8__wasmsimd_ld128); + } + + TEST(QS8_GEMM_MINMAX_3X4C8__WASMSIMD_LD128, k_eq_8_subtile) { + for (uint32_t m = 1; m <= 3; m++) { + for (uint32_t n = 1; n <= 4; n++) { + GemmMicrokernelTester() + .mr(3) + .nr(4) + .kr(8) + .sr(1) + .m(m) + .n(n) + .k(8) + .iterations(1) + .Test(xnn_qs8_gemm_minmax_ukernel_3x4c8__wasmsimd_ld128); + } + } + } + + TEST(QS8_GEMM_MINMAX_3X4C8__WASMSIMD_LD128, k_eq_8_subtile_m) { + for (uint32_t m = 1; m <= 3; m++) { + GemmMicrokernelTester() + .mr(3) + .nr(4) + .kr(8) + .sr(1) + .m(m) + .n(4) + .k(8) + .iterations(1) + .Test(xnn_qs8_gemm_minmax_ukernel_3x4c8__wasmsimd_ld128); + } + } + + TEST(QS8_GEMM_MINMAX_3X4C8__WASMSIMD_LD128, k_eq_8_subtile_n) { + for (uint32_t n = 1; n <= 4; n++) { + GemmMicrokernelTester() + .mr(3) + .nr(4) + .kr(8) + .sr(1) + .m(3) + .n(n) + .k(8) + .iterations(1) + .Test(xnn_qs8_gemm_minmax_ukernel_3x4c8__wasmsimd_ld128); + } + } + + TEST(QS8_GEMM_MINMAX_3X4C8__WASMSIMD_LD128, k_lt_8) { + for (size_t k = 1; k < 8; k++) { + GemmMicrokernelTester() + .mr(3) + .nr(4) + .kr(8) + .sr(1) + .m(3) + .n(4) + .k(k) + .Test(xnn_qs8_gemm_minmax_ukernel_3x4c8__wasmsimd_ld128); + } + } + + TEST(QS8_GEMM_MINMAX_3X4C8__WASMSIMD_LD128, k_lt_8_strided_a) { + for (size_t k = 1; k < 8; k++) { + GemmMicrokernelTester() + .mr(3) + .nr(4) + .kr(8) + .sr(1) + .m(3) + .n(4) + .k(k) + .a_stride(11) + .Test(xnn_qs8_gemm_minmax_ukernel_3x4c8__wasmsimd_ld128); + } + } + + TEST(QS8_GEMM_MINMAX_3X4C8__WASMSIMD_LD128, k_lt_8_subtile) { + for (size_t k = 1; k < 8; k++) { + for (uint32_t m = 1; m <= 3; m++) { + for (uint32_t n = 1; n <= 4; n++) { + GemmMicrokernelTester() + .mr(3) + .nr(4) + .kr(8) + .sr(1) + .m(m) + .n(n) + .k(k) + .iterations(1) + .Test(xnn_qs8_gemm_minmax_ukernel_3x4c8__wasmsimd_ld128); + } + } + } + } + + TEST(QS8_GEMM_MINMAX_3X4C8__WASMSIMD_LD128, k_gt_8) { + for (size_t k = 9; k < 16; k++) { + GemmMicrokernelTester() + .mr(3) + .nr(4) + .kr(8) + .sr(1) + .m(3) + .n(4) + .k(k) + .Test(xnn_qs8_gemm_minmax_ukernel_3x4c8__wasmsimd_ld128); + } + } + + TEST(QS8_GEMM_MINMAX_3X4C8__WASMSIMD_LD128, k_gt_8_strided_a) { + for (size_t k = 9; k < 16; k++) { + GemmMicrokernelTester() + .mr(3) + .nr(4) + .kr(8) + .sr(1) + .m(3) + .n(4) + .k(k) + .a_stride(19) + .Test(xnn_qs8_gemm_minmax_ukernel_3x4c8__wasmsimd_ld128); + } + } + + TEST(QS8_GEMM_MINMAX_3X4C8__WASMSIMD_LD128, k_gt_8_subtile) { + for (size_t k = 9; k < 16; k++) { + for (uint32_t m = 1; m <= 3; m++) { + for (uint32_t n = 1; n <= 4; n++) { + GemmMicrokernelTester() + .mr(3) + .nr(4) + .kr(8) + .sr(1) + .m(m) + .n(n) + .k(k) + .iterations(1) + .Test(xnn_qs8_gemm_minmax_ukernel_3x4c8__wasmsimd_ld128); + } + } + } + } + + TEST(QS8_GEMM_MINMAX_3X4C8__WASMSIMD_LD128, k_div_8) { + for (size_t k = 16; k <= 80; k += 8) { + GemmMicrokernelTester() + .mr(3) + .nr(4) + .kr(8) + .sr(1) + .m(3) + .n(4) + .k(k) + .Test(xnn_qs8_gemm_minmax_ukernel_3x4c8__wasmsimd_ld128); + } + } + + TEST(QS8_GEMM_MINMAX_3X4C8__WASMSIMD_LD128, k_div_8_strided_a) { + for (size_t k = 16; k <= 80; k += 8) { + GemmMicrokernelTester() + .mr(3) + .nr(4) + .kr(8) + .sr(1) + .m(3) + .n(4) + .k(k) + .a_stride(83) + .Test(xnn_qs8_gemm_minmax_ukernel_3x4c8__wasmsimd_ld128); + } + } + + TEST(QS8_GEMM_MINMAX_3X4C8__WASMSIMD_LD128, k_div_8_subtile) { + for (size_t k = 16; k <= 80; k += 8) { + for (uint32_t m = 1; m <= 3; m++) { + for (uint32_t n = 1; n <= 4; n++) { + GemmMicrokernelTester() + .mr(3) + .nr(4) + .kr(8) + .sr(1) + .m(m) + .n(n) + .k(k) + .iterations(1) + .Test(xnn_qs8_gemm_minmax_ukernel_3x4c8__wasmsimd_ld128); + } + } + } + } + + TEST(QS8_GEMM_MINMAX_3X4C8__WASMSIMD_LD128, n_gt_4) { + for (uint32_t n = 5; n < 8; n++) { + for (size_t k = 1; k <= 40; k += 9) { + GemmMicrokernelTester() + .mr(3) + .nr(4) + .kr(8) + .sr(1) + .m(3) + .n(4) + .k(k) + .Test(xnn_qs8_gemm_minmax_ukernel_3x4c8__wasmsimd_ld128); + } + } + } + + TEST(QS8_GEMM_MINMAX_3X4C8__WASMSIMD_LD128, n_gt_4_strided_cn) { + for (uint32_t n = 5; n < 8; n++) { + for (size_t k = 1; k <= 40; k += 9) { + GemmMicrokernelTester() + .mr(3) + .nr(4) + .kr(8) + .sr(1) + .m(3) + .n(4) + .k(k) + .cn_stride(7) + .Test(xnn_qs8_gemm_minmax_ukernel_3x4c8__wasmsimd_ld128); + } + } + } + + TEST(QS8_GEMM_MINMAX_3X4C8__WASMSIMD_LD128, n_gt_4_strided_a) { + for (uint32_t n = 5; n < 8; n++) { + for (size_t k = 1; k <= 40; k += 9) { + GemmMicrokernelTester() + .mr(3) + .nr(4) + .kr(8) + .sr(1) + .m(3) + .n(n) + .k(k) + .a_stride(43) + .Test(xnn_qs8_gemm_minmax_ukernel_3x4c8__wasmsimd_ld128); + } + } + } + + TEST(QS8_GEMM_MINMAX_3X4C8__WASMSIMD_LD128, n_gt_4_subtile) { + for (uint32_t n = 5; n < 8; n++) { + for (size_t k = 1; k <= 40; k += 9) { + for (uint32_t m = 1; m <= 3; m++) { + GemmMicrokernelTester() + .mr(3) + .nr(4) + .kr(8) + .sr(1) + .m(m) + .n(n) + .k(k) + .iterations(1) + .Test(xnn_qs8_gemm_minmax_ukernel_3x4c8__wasmsimd_ld128); + } + } + } + } + + TEST(QS8_GEMM_MINMAX_3X4C8__WASMSIMD_LD128, n_div_4) { + for (uint32_t n = 8; n <= 12; n += 4) { + for (size_t k = 1; k <= 40; k += 9) { + GemmMicrokernelTester() + .mr(3) + .nr(4) + .kr(8) + .sr(1) + .m(3) + .n(4) + .k(k) + .Test(xnn_qs8_gemm_minmax_ukernel_3x4c8__wasmsimd_ld128); + } + } + } + + TEST(QS8_GEMM_MINMAX_3X4C8__WASMSIMD_LD128, n_div_4_strided_cn) { + for (uint32_t n = 8; n <= 12; n += 4) { + for (size_t k = 1; k <= 40; k += 9) { + GemmMicrokernelTester() + .mr(3) + .nr(4) + .kr(8) + .sr(1) + .m(3) + .n(n) + .k(k) + .cn_stride(7) + .Test(xnn_qs8_gemm_minmax_ukernel_3x4c8__wasmsimd_ld128); + } + } + } + + TEST(QS8_GEMM_MINMAX_3X4C8__WASMSIMD_LD128, n_div_4_strided_a) { + for (uint32_t n = 8; n <= 12; n += 4) { + for (size_t k = 1; k <= 40; k += 9) { + GemmMicrokernelTester() + .mr(3) + .nr(4) + .kr(8) + .sr(1) + .m(3) + .n(n) + .k(k) + .a_stride(43) + .Test(xnn_qs8_gemm_minmax_ukernel_3x4c8__wasmsimd_ld128); + } + } + } + + TEST(QS8_GEMM_MINMAX_3X4C8__WASMSIMD_LD128, n_div_4_subtile) { + for (uint32_t n = 8; n <= 12; n += 4) { + for (size_t k = 1; k <= 40; k += 9) { + for (uint32_t m = 1; m <= 3; m++) { + GemmMicrokernelTester() + .mr(3) + .nr(4) + .kr(8) + .sr(1) + .m(m) + .n(n) + .k(k) + .iterations(1) + .Test(xnn_qs8_gemm_minmax_ukernel_3x4c8__wasmsimd_ld128); + } + } + } + } + + TEST(QS8_GEMM_MINMAX_3X4C8__WASMSIMD_LD128, strided_cm_subtile) { + for (size_t k = 1; k <= 40; k += 9) { + for (uint32_t m = 1; m <= 3; m++) { + for (uint32_t n = 1; n <= 4; n++) { + GemmMicrokernelTester() + .mr(3) + .nr(4) + .kr(8) + .sr(1) + .m(m) + .n(n) + .k(k) + .cm_stride(7) + .iterations(1) + .Test(xnn_qs8_gemm_minmax_ukernel_3x4c8__wasmsimd_ld128); + } + } + } + } + + TEST(QS8_GEMM_MINMAX_3X4C8__WASMSIMD_LD128, qmin) { + GemmMicrokernelTester() + .mr(3) + .nr(4) + .kr(8) + .sr(1) + .m(3) + .n(4) + .k(8) + .qmin(128) + .Test(xnn_qs8_gemm_minmax_ukernel_3x4c8__wasmsimd_ld128); + } + + TEST(QS8_GEMM_MINMAX_3X4C8__WASMSIMD_LD128, qmax) { + GemmMicrokernelTester() + .mr(3) + .nr(4) + .kr(8) + .sr(1) + .m(3) + .n(4) + .k(8) + .qmax(128) + .Test(xnn_qs8_gemm_minmax_ukernel_3x4c8__wasmsimd_ld128); + } + + TEST(QS8_GEMM_MINMAX_3X4C8__WASMSIMD_LD128, strided_cm) { + GemmMicrokernelTester() + .mr(3) + .nr(4) + .kr(8) + .sr(1) + .m(3) + .n(4) + .k(8) + .cm_stride(7) + .Test(xnn_qs8_gemm_minmax_ukernel_3x4c8__wasmsimd_ld128); + } +#endif // XNN_ARCH_WASMSIMD + + +#if XNN_ARCH_WASMSIMD + TEST(QS8_GEMM_XW_MINMAX_1X4C8__WASMSIMD, k_eq_8) { + GemmMicrokernelTester() + .mr(1) + .nr(4) + .kr(8) + .sr(1) + .m(1) + .n(4) + .k(8) + .Test(xnn_qs8_gemm_xw_minmax_ukernel_1x4c8__wasmsimd); + } + + TEST(QS8_GEMM_XW_MINMAX_1X4C8__WASMSIMD, strided_cn) { + GemmMicrokernelTester() + .mr(1) + .nr(4) + .kr(8) + .sr(1) + .m(1) + .n(4) + .k(8) + .cn_stride(7) + .Test(xnn_qs8_gemm_xw_minmax_ukernel_1x4c8__wasmsimd); + } + + TEST(QS8_GEMM_XW_MINMAX_1X4C8__WASMSIMD, k_eq_8_strided_a) { + GemmMicrokernelTester() + .mr(1) + .nr(4) + .kr(8) + .sr(1) + .m(1) + .n(4) + .k(8) + .a_stride(11) + .Test(xnn_qs8_gemm_xw_minmax_ukernel_1x4c8__wasmsimd); + } + + TEST(QS8_GEMM_XW_MINMAX_1X4C8__WASMSIMD, k_eq_8_subtile) { + for (uint32_t m = 1; m <= 1; m++) { + for (uint32_t n = 1; n <= 4; n++) { + GemmMicrokernelTester() + .mr(1) + .nr(4) + .kr(8) + .sr(1) + .m(m) + .n(n) + .k(8) + .iterations(1) + .Test(xnn_qs8_gemm_xw_minmax_ukernel_1x4c8__wasmsimd); + } + } + } + + TEST(QS8_GEMM_XW_MINMAX_1X4C8__WASMSIMD, k_eq_8_subtile_m) { + for (uint32_t m = 1; m <= 1; m++) { + GemmMicrokernelTester() + .mr(1) + .nr(4) + .kr(8) + .sr(1) + .m(m) + .n(4) + .k(8) + .iterations(1) + .Test(xnn_qs8_gemm_xw_minmax_ukernel_1x4c8__wasmsimd); + } + } + + TEST(QS8_GEMM_XW_MINMAX_1X4C8__WASMSIMD, k_eq_8_subtile_n) { + for (uint32_t n = 1; n <= 4; n++) { + GemmMicrokernelTester() + .mr(1) + .nr(4) + .kr(8) + .sr(1) + .m(1) + .n(n) + .k(8) + .iterations(1) + .Test(xnn_qs8_gemm_xw_minmax_ukernel_1x4c8__wasmsimd); + } + } + + TEST(QS8_GEMM_XW_MINMAX_1X4C8__WASMSIMD, k_lt_8) { + for (size_t k = 1; k < 8; k++) { + GemmMicrokernelTester() + .mr(1) + .nr(4) + .kr(8) + .sr(1) + .m(1) + .n(4) + .k(k) + .Test(xnn_qs8_gemm_xw_minmax_ukernel_1x4c8__wasmsimd); + } + } + + TEST(QS8_GEMM_XW_MINMAX_1X4C8__WASMSIMD, k_lt_8_strided_a) { + for (size_t k = 1; k < 8; k++) { + GemmMicrokernelTester() + .mr(1) + .nr(4) + .kr(8) + .sr(1) + .m(1) + .n(4) + .k(k) + .a_stride(11) + .Test(xnn_qs8_gemm_xw_minmax_ukernel_1x4c8__wasmsimd); + } + } + + TEST(QS8_GEMM_XW_MINMAX_1X4C8__WASMSIMD, k_lt_8_subtile) { + for (size_t k = 1; k < 8; k++) { + for (uint32_t m = 1; m <= 1; m++) { + for (uint32_t n = 1; n <= 4; n++) { + GemmMicrokernelTester() + .mr(1) + .nr(4) + .kr(8) + .sr(1) + .m(m) + .n(n) + .k(k) + .iterations(1) + .Test(xnn_qs8_gemm_xw_minmax_ukernel_1x4c8__wasmsimd); + } + } + } + } + + TEST(QS8_GEMM_XW_MINMAX_1X4C8__WASMSIMD, k_gt_8) { + for (size_t k = 9; k < 16; k++) { + GemmMicrokernelTester() + .mr(1) + .nr(4) + .kr(8) + .sr(1) + .m(1) + .n(4) + .k(k) + .Test(xnn_qs8_gemm_xw_minmax_ukernel_1x4c8__wasmsimd); + } + } + + TEST(QS8_GEMM_XW_MINMAX_1X4C8__WASMSIMD, k_gt_8_strided_a) { + for (size_t k = 9; k < 16; k++) { + GemmMicrokernelTester() + .mr(1) + .nr(4) + .kr(8) + .sr(1) + .m(1) + .n(4) + .k(k) + .a_stride(19) + .Test(xnn_qs8_gemm_xw_minmax_ukernel_1x4c8__wasmsimd); + } + } + + TEST(QS8_GEMM_XW_MINMAX_1X4C8__WASMSIMD, k_gt_8_subtile) { + for (size_t k = 9; k < 16; k++) { + for (uint32_t m = 1; m <= 1; m++) { + for (uint32_t n = 1; n <= 4; n++) { + GemmMicrokernelTester() + .mr(1) + .nr(4) + .kr(8) + .sr(1) + .m(m) + .n(n) + .k(k) + .iterations(1) + .Test(xnn_qs8_gemm_xw_minmax_ukernel_1x4c8__wasmsimd); + } + } + } + } + + TEST(QS8_GEMM_XW_MINMAX_1X4C8__WASMSIMD, k_div_8) { + for (size_t k = 16; k <= 80; k += 8) { + GemmMicrokernelTester() + .mr(1) + .nr(4) + .kr(8) + .sr(1) + .m(1) + .n(4) + .k(k) + .Test(xnn_qs8_gemm_xw_minmax_ukernel_1x4c8__wasmsimd); + } + } + + TEST(QS8_GEMM_XW_MINMAX_1X4C8__WASMSIMD, k_div_8_strided_a) { + for (size_t k = 16; k <= 80; k += 8) { + GemmMicrokernelTester() + .mr(1) + .nr(4) + .kr(8) + .sr(1) + .m(1) + .n(4) + .k(k) + .a_stride(83) + .Test(xnn_qs8_gemm_xw_minmax_ukernel_1x4c8__wasmsimd); + } + } + + TEST(QS8_GEMM_XW_MINMAX_1X4C8__WASMSIMD, k_div_8_subtile) { + for (size_t k = 16; k <= 80; k += 8) { + for (uint32_t m = 1; m <= 1; m++) { + for (uint32_t n = 1; n <= 4; n++) { + GemmMicrokernelTester() + .mr(1) + .nr(4) + .kr(8) + .sr(1) + .m(m) + .n(n) + .k(k) + .iterations(1) + .Test(xnn_qs8_gemm_xw_minmax_ukernel_1x4c8__wasmsimd); + } + } + } + } + + TEST(QS8_GEMM_XW_MINMAX_1X4C8__WASMSIMD, n_gt_4) { + for (uint32_t n = 5; n < 8; n++) { + for (size_t k = 1; k <= 40; k += 9) { + GemmMicrokernelTester() + .mr(1) + .nr(4) + .kr(8) + .sr(1) + .m(1) + .n(4) + .k(k) + .Test(xnn_qs8_gemm_xw_minmax_ukernel_1x4c8__wasmsimd); + } + } + } + + TEST(QS8_GEMM_XW_MINMAX_1X4C8__WASMSIMD, n_gt_4_strided_cn) { + for (uint32_t n = 5; n < 8; n++) { + for (size_t k = 1; k <= 40; k += 9) { + GemmMicrokernelTester() + .mr(1) + .nr(4) + .kr(8) + .sr(1) + .m(1) + .n(4) + .k(k) + .cn_stride(7) + .Test(xnn_qs8_gemm_xw_minmax_ukernel_1x4c8__wasmsimd); + } + } + } + + TEST(QS8_GEMM_XW_MINMAX_1X4C8__WASMSIMD, n_gt_4_strided_a) { + for (uint32_t n = 5; n < 8; n++) { + for (size_t k = 1; k <= 40; k += 9) { + GemmMicrokernelTester() + .mr(1) + .nr(4) + .kr(8) + .sr(1) + .m(1) + .n(n) + .k(k) + .a_stride(43) + .Test(xnn_qs8_gemm_xw_minmax_ukernel_1x4c8__wasmsimd); + } + } + } + + TEST(QS8_GEMM_XW_MINMAX_1X4C8__WASMSIMD, n_gt_4_subtile) { + for (uint32_t n = 5; n < 8; n++) { + for (size_t k = 1; k <= 40; k += 9) { + for (uint32_t m = 1; m <= 1; m++) { + GemmMicrokernelTester() + .mr(1) + .nr(4) + .kr(8) + .sr(1) + .m(m) + .n(n) + .k(k) + .iterations(1) + .Test(xnn_qs8_gemm_xw_minmax_ukernel_1x4c8__wasmsimd); + } + } + } + } + + TEST(QS8_GEMM_XW_MINMAX_1X4C8__WASMSIMD, n_div_4) { + for (uint32_t n = 8; n <= 12; n += 4) { + for (size_t k = 1; k <= 40; k += 9) { + GemmMicrokernelTester() + .mr(1) + .nr(4) + .kr(8) + .sr(1) + .m(1) + .n(4) + .k(k) + .Test(xnn_qs8_gemm_xw_minmax_ukernel_1x4c8__wasmsimd); + } + } + } + + TEST(QS8_GEMM_XW_MINMAX_1X4C8__WASMSIMD, n_div_4_strided_cn) { + for (uint32_t n = 8; n <= 12; n += 4) { + for (size_t k = 1; k <= 40; k += 9) { + GemmMicrokernelTester() + .mr(1) + .nr(4) + .kr(8) + .sr(1) + .m(1) + .n(n) + .k(k) + .cn_stride(7) + .Test(xnn_qs8_gemm_xw_minmax_ukernel_1x4c8__wasmsimd); + } + } + } + + TEST(QS8_GEMM_XW_MINMAX_1X4C8__WASMSIMD, n_div_4_strided_a) { + for (uint32_t n = 8; n <= 12; n += 4) { + for (size_t k = 1; k <= 40; k += 9) { + GemmMicrokernelTester() + .mr(1) + .nr(4) + .kr(8) + .sr(1) + .m(1) + .n(n) + .k(k) + .a_stride(43) + .Test(xnn_qs8_gemm_xw_minmax_ukernel_1x4c8__wasmsimd); + } + } + } + + TEST(QS8_GEMM_XW_MINMAX_1X4C8__WASMSIMD, n_div_4_subtile) { + for (uint32_t n = 8; n <= 12; n += 4) { + for (size_t k = 1; k <= 40; k += 9) { + for (uint32_t m = 1; m <= 1; m++) { + GemmMicrokernelTester() + .mr(1) + .nr(4) + .kr(8) + .sr(1) + .m(m) + .n(n) + .k(k) + .iterations(1) + .Test(xnn_qs8_gemm_xw_minmax_ukernel_1x4c8__wasmsimd); + } + } + } + } + + TEST(QS8_GEMM_XW_MINMAX_1X4C8__WASMSIMD, strided_cm_subtile) { + for (size_t k = 1; k <= 40; k += 9) { + for (uint32_t m = 1; m <= 1; m++) { + for (uint32_t n = 1; n <= 4; n++) { + GemmMicrokernelTester() + .mr(1) + .nr(4) + .kr(8) + .sr(1) + .m(m) + .n(n) + .k(k) + .cm_stride(7) + .iterations(1) + .Test(xnn_qs8_gemm_xw_minmax_ukernel_1x4c8__wasmsimd); + } + } + } + } + + TEST(QS8_GEMM_XW_MINMAX_1X4C8__WASMSIMD, strided_cm) { + GemmMicrokernelTester() + .mr(1) + .nr(4) + .kr(8) + .sr(1) + .m(1) + .n(4) + .k(8) + .cm_stride(7) + .Test(xnn_qs8_gemm_xw_minmax_ukernel_1x4c8__wasmsimd); + } +#endif // XNN_ARCH_WASMSIMD + + +#if XNN_ARCH_WASMSIMD + TEST(QS8_GEMM_XW_MINMAX_2X4C8__WASMSIMD, k_eq_8) { + GemmMicrokernelTester() + .mr(2) + .nr(4) + .kr(8) + .sr(1) + .m(2) + .n(4) + .k(8) + .Test(xnn_qs8_gemm_xw_minmax_ukernel_2x4c8__wasmsimd); + } + + TEST(QS8_GEMM_XW_MINMAX_2X4C8__WASMSIMD, strided_cn) { + GemmMicrokernelTester() + .mr(2) + .nr(4) + .kr(8) + .sr(1) + .m(2) + .n(4) + .k(8) + .cn_stride(7) + .Test(xnn_qs8_gemm_xw_minmax_ukernel_2x4c8__wasmsimd); + } + + TEST(QS8_GEMM_XW_MINMAX_2X4C8__WASMSIMD, k_eq_8_strided_a) { + GemmMicrokernelTester() + .mr(2) + .nr(4) + .kr(8) + .sr(1) + .m(2) + .n(4) + .k(8) + .a_stride(11) + .Test(xnn_qs8_gemm_xw_minmax_ukernel_2x4c8__wasmsimd); + } + + TEST(QS8_GEMM_XW_MINMAX_2X4C8__WASMSIMD, k_eq_8_subtile) { + for (uint32_t m = 1; m <= 2; m++) { + for (uint32_t n = 1; n <= 4; n++) { + GemmMicrokernelTester() + .mr(2) + .nr(4) + .kr(8) + .sr(1) + .m(m) + .n(n) + .k(8) + .iterations(1) + .Test(xnn_qs8_gemm_xw_minmax_ukernel_2x4c8__wasmsimd); + } + } + } + + TEST(QS8_GEMM_XW_MINMAX_2X4C8__WASMSIMD, k_eq_8_subtile_m) { + for (uint32_t m = 1; m <= 2; m++) { + GemmMicrokernelTester() + .mr(2) + .nr(4) + .kr(8) + .sr(1) + .m(m) + .n(4) + .k(8) + .iterations(1) + .Test(xnn_qs8_gemm_xw_minmax_ukernel_2x4c8__wasmsimd); + } + } + + TEST(QS8_GEMM_XW_MINMAX_2X4C8__WASMSIMD, k_eq_8_subtile_n) { + for (uint32_t n = 1; n <= 4; n++) { + GemmMicrokernelTester() + .mr(2) + .nr(4) + .kr(8) + .sr(1) + .m(2) + .n(n) + .k(8) + .iterations(1) + .Test(xnn_qs8_gemm_xw_minmax_ukernel_2x4c8__wasmsimd); + } + } + + TEST(QS8_GEMM_XW_MINMAX_2X4C8__WASMSIMD, k_lt_8) { + for (size_t k = 1; k < 8; k++) { + GemmMicrokernelTester() + .mr(2) + .nr(4) + .kr(8) + .sr(1) + .m(2) + .n(4) + .k(k) + .Test(xnn_qs8_gemm_xw_minmax_ukernel_2x4c8__wasmsimd); + } + } + + TEST(QS8_GEMM_XW_MINMAX_2X4C8__WASMSIMD, k_lt_8_strided_a) { + for (size_t k = 1; k < 8; k++) { + GemmMicrokernelTester() + .mr(2) + .nr(4) + .kr(8) + .sr(1) + .m(2) + .n(4) + .k(k) + .a_stride(11) + .Test(xnn_qs8_gemm_xw_minmax_ukernel_2x4c8__wasmsimd); + } + } + + TEST(QS8_GEMM_XW_MINMAX_2X4C8__WASMSIMD, k_lt_8_subtile) { + for (size_t k = 1; k < 8; k++) { + for (uint32_t m = 1; m <= 2; m++) { + for (uint32_t n = 1; n <= 4; n++) { + GemmMicrokernelTester() + .mr(2) + .nr(4) + .kr(8) + .sr(1) + .m(m) + .n(n) + .k(k) + .iterations(1) + .Test(xnn_qs8_gemm_xw_minmax_ukernel_2x4c8__wasmsimd); + } + } + } + } + + TEST(QS8_GEMM_XW_MINMAX_2X4C8__WASMSIMD, k_gt_8) { + for (size_t k = 9; k < 16; k++) { + GemmMicrokernelTester() + .mr(2) + .nr(4) + .kr(8) + .sr(1) + .m(2) + .n(4) + .k(k) + .Test(xnn_qs8_gemm_xw_minmax_ukernel_2x4c8__wasmsimd); + } + } + + TEST(QS8_GEMM_XW_MINMAX_2X4C8__WASMSIMD, k_gt_8_strided_a) { + for (size_t k = 9; k < 16; k++) { + GemmMicrokernelTester() + .mr(2) + .nr(4) + .kr(8) + .sr(1) + .m(2) + .n(4) + .k(k) + .a_stride(19) + .Test(xnn_qs8_gemm_xw_minmax_ukernel_2x4c8__wasmsimd); + } + } + + TEST(QS8_GEMM_XW_MINMAX_2X4C8__WASMSIMD, k_gt_8_subtile) { + for (size_t k = 9; k < 16; k++) { + for (uint32_t m = 1; m <= 2; m++) { + for (uint32_t n = 1; n <= 4; n++) { + GemmMicrokernelTester() + .mr(2) + .nr(4) + .kr(8) + .sr(1) + .m(m) + .n(n) + .k(k) + .iterations(1) + .Test(xnn_qs8_gemm_xw_minmax_ukernel_2x4c8__wasmsimd); + } + } + } + } + + TEST(QS8_GEMM_XW_MINMAX_2X4C8__WASMSIMD, k_div_8) { + for (size_t k = 16; k <= 80; k += 8) { + GemmMicrokernelTester() + .mr(2) + .nr(4) + .kr(8) + .sr(1) + .m(2) + .n(4) + .k(k) + .Test(xnn_qs8_gemm_xw_minmax_ukernel_2x4c8__wasmsimd); + } + } + + TEST(QS8_GEMM_XW_MINMAX_2X4C8__WASMSIMD, k_div_8_strided_a) { + for (size_t k = 16; k <= 80; k += 8) { + GemmMicrokernelTester() + .mr(2) + .nr(4) + .kr(8) + .sr(1) + .m(2) + .n(4) + .k(k) + .a_stride(83) + .Test(xnn_qs8_gemm_xw_minmax_ukernel_2x4c8__wasmsimd); + } + } + + TEST(QS8_GEMM_XW_MINMAX_2X4C8__WASMSIMD, k_div_8_subtile) { + for (size_t k = 16; k <= 80; k += 8) { + for (uint32_t m = 1; m <= 2; m++) { + for (uint32_t n = 1; n <= 4; n++) { + GemmMicrokernelTester() + .mr(2) + .nr(4) + .kr(8) + .sr(1) + .m(m) + .n(n) + .k(k) + .iterations(1) + .Test(xnn_qs8_gemm_xw_minmax_ukernel_2x4c8__wasmsimd); + } + } + } + } + + TEST(QS8_GEMM_XW_MINMAX_2X4C8__WASMSIMD, n_gt_4) { + for (uint32_t n = 5; n < 8; n++) { + for (size_t k = 1; k <= 40; k += 9) { + GemmMicrokernelTester() + .mr(2) + .nr(4) + .kr(8) + .sr(1) + .m(2) + .n(4) + .k(k) + .Test(xnn_qs8_gemm_xw_minmax_ukernel_2x4c8__wasmsimd); + } + } + } + + TEST(QS8_GEMM_XW_MINMAX_2X4C8__WASMSIMD, n_gt_4_strided_cn) { + for (uint32_t n = 5; n < 8; n++) { + for (size_t k = 1; k <= 40; k += 9) { + GemmMicrokernelTester() + .mr(2) + .nr(4) + .kr(8) + .sr(1) + .m(2) + .n(4) + .k(k) + .cn_stride(7) + .Test(xnn_qs8_gemm_xw_minmax_ukernel_2x4c8__wasmsimd); + } + } + } + + TEST(QS8_GEMM_XW_MINMAX_2X4C8__WASMSIMD, n_gt_4_strided_a) { + for (uint32_t n = 5; n < 8; n++) { + for (size_t k = 1; k <= 40; k += 9) { + GemmMicrokernelTester() + .mr(2) + .nr(4) + .kr(8) + .sr(1) + .m(2) + .n(n) + .k(k) + .a_stride(43) + .Test(xnn_qs8_gemm_xw_minmax_ukernel_2x4c8__wasmsimd); + } + } + } + + TEST(QS8_GEMM_XW_MINMAX_2X4C8__WASMSIMD, n_gt_4_subtile) { + for (uint32_t n = 5; n < 8; n++) { + for (size_t k = 1; k <= 40; k += 9) { + for (uint32_t m = 1; m <= 2; m++) { + GemmMicrokernelTester() + .mr(2) + .nr(4) + .kr(8) + .sr(1) + .m(m) + .n(n) + .k(k) + .iterations(1) + .Test(xnn_qs8_gemm_xw_minmax_ukernel_2x4c8__wasmsimd); + } + } + } + } + + TEST(QS8_GEMM_XW_MINMAX_2X4C8__WASMSIMD, n_div_4) { + for (uint32_t n = 8; n <= 12; n += 4) { + for (size_t k = 1; k <= 40; k += 9) { + GemmMicrokernelTester() + .mr(2) + .nr(4) + .kr(8) + .sr(1) + .m(2) + .n(4) + .k(k) + .Test(xnn_qs8_gemm_xw_minmax_ukernel_2x4c8__wasmsimd); + } + } + } + + TEST(QS8_GEMM_XW_MINMAX_2X4C8__WASMSIMD, n_div_4_strided_cn) { + for (uint32_t n = 8; n <= 12; n += 4) { + for (size_t k = 1; k <= 40; k += 9) { + GemmMicrokernelTester() + .mr(2) + .nr(4) + .kr(8) + .sr(1) + .m(2) + .n(n) + .k(k) + .cn_stride(7) + .Test(xnn_qs8_gemm_xw_minmax_ukernel_2x4c8__wasmsimd); + } + } + } + + TEST(QS8_GEMM_XW_MINMAX_2X4C8__WASMSIMD, n_div_4_strided_a) { + for (uint32_t n = 8; n <= 12; n += 4) { + for (size_t k = 1; k <= 40; k += 9) { + GemmMicrokernelTester() + .mr(2) + .nr(4) + .kr(8) + .sr(1) + .m(2) + .n(n) + .k(k) + .a_stride(43) + .Test(xnn_qs8_gemm_xw_minmax_ukernel_2x4c8__wasmsimd); + } + } + } + + TEST(QS8_GEMM_XW_MINMAX_2X4C8__WASMSIMD, n_div_4_subtile) { + for (uint32_t n = 8; n <= 12; n += 4) { + for (size_t k = 1; k <= 40; k += 9) { + for (uint32_t m = 1; m <= 2; m++) { + GemmMicrokernelTester() + .mr(2) + .nr(4) + .kr(8) + .sr(1) + .m(m) + .n(n) + .k(k) + .iterations(1) + .Test(xnn_qs8_gemm_xw_minmax_ukernel_2x4c8__wasmsimd); + } + } + } + } + + TEST(QS8_GEMM_XW_MINMAX_2X4C8__WASMSIMD, strided_cm_subtile) { + for (size_t k = 1; k <= 40; k += 9) { + for (uint32_t m = 1; m <= 2; m++) { + for (uint32_t n = 1; n <= 4; n++) { + GemmMicrokernelTester() + .mr(2) + .nr(4) + .kr(8) + .sr(1) + .m(m) + .n(n) + .k(k) + .cm_stride(7) + .iterations(1) + .Test(xnn_qs8_gemm_xw_minmax_ukernel_2x4c8__wasmsimd); + } + } + } + } + + TEST(QS8_GEMM_XW_MINMAX_2X4C8__WASMSIMD, strided_cm) { + GemmMicrokernelTester() + .mr(2) + .nr(4) + .kr(8) + .sr(1) + .m(2) + .n(4) + .k(8) + .cm_stride(7) + .Test(xnn_qs8_gemm_xw_minmax_ukernel_2x4c8__wasmsimd); + } +#endif // XNN_ARCH_WASMSIMD + + +#if XNN_ARCH_WASMSIMD + TEST(QS8_GEMM_XW_MINMAX_3X4C8__WASMSIMD, k_eq_8) { + GemmMicrokernelTester() + .mr(3) + .nr(4) + .kr(8) + .sr(1) + .m(3) + .n(4) + .k(8) + .Test(xnn_qs8_gemm_xw_minmax_ukernel_3x4c8__wasmsimd); + } + + TEST(QS8_GEMM_XW_MINMAX_3X4C8__WASMSIMD, strided_cn) { + GemmMicrokernelTester() + .mr(3) + .nr(4) + .kr(8) + .sr(1) + .m(3) + .n(4) + .k(8) + .cn_stride(7) + .Test(xnn_qs8_gemm_xw_minmax_ukernel_3x4c8__wasmsimd); + } + + TEST(QS8_GEMM_XW_MINMAX_3X4C8__WASMSIMD, k_eq_8_strided_a) { + GemmMicrokernelTester() + .mr(3) + .nr(4) + .kr(8) + .sr(1) + .m(3) + .n(4) + .k(8) + .a_stride(11) + .Test(xnn_qs8_gemm_xw_minmax_ukernel_3x4c8__wasmsimd); + } + + TEST(QS8_GEMM_XW_MINMAX_3X4C8__WASMSIMD, k_eq_8_subtile) { + for (uint32_t m = 1; m <= 3; m++) { + for (uint32_t n = 1; n <= 4; n++) { + GemmMicrokernelTester() + .mr(3) + .nr(4) + .kr(8) + .sr(1) + .m(m) + .n(n) + .k(8) + .iterations(1) + .Test(xnn_qs8_gemm_xw_minmax_ukernel_3x4c8__wasmsimd); + } + } + } + + TEST(QS8_GEMM_XW_MINMAX_3X4C8__WASMSIMD, k_eq_8_subtile_m) { + for (uint32_t m = 1; m <= 3; m++) { + GemmMicrokernelTester() + .mr(3) + .nr(4) + .kr(8) + .sr(1) + .m(m) + .n(4) + .k(8) + .iterations(1) + .Test(xnn_qs8_gemm_xw_minmax_ukernel_3x4c8__wasmsimd); + } + } + + TEST(QS8_GEMM_XW_MINMAX_3X4C8__WASMSIMD, k_eq_8_subtile_n) { + for (uint32_t n = 1; n <= 4; n++) { + GemmMicrokernelTester() + .mr(3) + .nr(4) + .kr(8) + .sr(1) + .m(3) + .n(n) + .k(8) + .iterations(1) + .Test(xnn_qs8_gemm_xw_minmax_ukernel_3x4c8__wasmsimd); + } + } + + TEST(QS8_GEMM_XW_MINMAX_3X4C8__WASMSIMD, k_lt_8) { + for (size_t k = 1; k < 8; k++) { + GemmMicrokernelTester() + .mr(3) + .nr(4) + .kr(8) + .sr(1) + .m(3) + .n(4) + .k(k) + .Test(xnn_qs8_gemm_xw_minmax_ukernel_3x4c8__wasmsimd); + } + } + + TEST(QS8_GEMM_XW_MINMAX_3X4C8__WASMSIMD, k_lt_8_strided_a) { + for (size_t k = 1; k < 8; k++) { + GemmMicrokernelTester() + .mr(3) + .nr(4) + .kr(8) + .sr(1) + .m(3) + .n(4) + .k(k) + .a_stride(11) + .Test(xnn_qs8_gemm_xw_minmax_ukernel_3x4c8__wasmsimd); + } + } + + TEST(QS8_GEMM_XW_MINMAX_3X4C8__WASMSIMD, k_lt_8_subtile) { + for (size_t k = 1; k < 8; k++) { + for (uint32_t m = 1; m <= 3; m++) { + for (uint32_t n = 1; n <= 4; n++) { + GemmMicrokernelTester() + .mr(3) + .nr(4) + .kr(8) + .sr(1) + .m(m) + .n(n) + .k(k) + .iterations(1) + .Test(xnn_qs8_gemm_xw_minmax_ukernel_3x4c8__wasmsimd); + } + } + } + } + + TEST(QS8_GEMM_XW_MINMAX_3X4C8__WASMSIMD, k_gt_8) { + for (size_t k = 9; k < 16; k++) { + GemmMicrokernelTester() + .mr(3) + .nr(4) + .kr(8) + .sr(1) + .m(3) + .n(4) + .k(k) + .Test(xnn_qs8_gemm_xw_minmax_ukernel_3x4c8__wasmsimd); + } + } + + TEST(QS8_GEMM_XW_MINMAX_3X4C8__WASMSIMD, k_gt_8_strided_a) { + for (size_t k = 9; k < 16; k++) { + GemmMicrokernelTester() + .mr(3) + .nr(4) + .kr(8) + .sr(1) + .m(3) + .n(4) + .k(k) + .a_stride(19) + .Test(xnn_qs8_gemm_xw_minmax_ukernel_3x4c8__wasmsimd); + } + } + + TEST(QS8_GEMM_XW_MINMAX_3X4C8__WASMSIMD, k_gt_8_subtile) { + for (size_t k = 9; k < 16; k++) { + for (uint32_t m = 1; m <= 3; m++) { + for (uint32_t n = 1; n <= 4; n++) { + GemmMicrokernelTester() + .mr(3) + .nr(4) + .kr(8) + .sr(1) + .m(m) + .n(n) + .k(k) + .iterations(1) + .Test(xnn_qs8_gemm_xw_minmax_ukernel_3x4c8__wasmsimd); + } + } + } + } + + TEST(QS8_GEMM_XW_MINMAX_3X4C8__WASMSIMD, k_div_8) { + for (size_t k = 16; k <= 80; k += 8) { + GemmMicrokernelTester() + .mr(3) + .nr(4) + .kr(8) + .sr(1) + .m(3) + .n(4) + .k(k) + .Test(xnn_qs8_gemm_xw_minmax_ukernel_3x4c8__wasmsimd); + } + } + + TEST(QS8_GEMM_XW_MINMAX_3X4C8__WASMSIMD, k_div_8_strided_a) { + for (size_t k = 16; k <= 80; k += 8) { + GemmMicrokernelTester() + .mr(3) + .nr(4) + .kr(8) + .sr(1) + .m(3) + .n(4) + .k(k) + .a_stride(83) + .Test(xnn_qs8_gemm_xw_minmax_ukernel_3x4c8__wasmsimd); + } + } + + TEST(QS8_GEMM_XW_MINMAX_3X4C8__WASMSIMD, k_div_8_subtile) { + for (size_t k = 16; k <= 80; k += 8) { + for (uint32_t m = 1; m <= 3; m++) { + for (uint32_t n = 1; n <= 4; n++) { + GemmMicrokernelTester() + .mr(3) + .nr(4) + .kr(8) + .sr(1) + .m(m) + .n(n) + .k(k) + .iterations(1) + .Test(xnn_qs8_gemm_xw_minmax_ukernel_3x4c8__wasmsimd); + } + } + } + } + + TEST(QS8_GEMM_XW_MINMAX_3X4C8__WASMSIMD, n_gt_4) { + for (uint32_t n = 5; n < 8; n++) { + for (size_t k = 1; k <= 40; k += 9) { + GemmMicrokernelTester() + .mr(3) + .nr(4) + .kr(8) + .sr(1) + .m(3) + .n(4) + .k(k) + .Test(xnn_qs8_gemm_xw_minmax_ukernel_3x4c8__wasmsimd); + } + } + } + + TEST(QS8_GEMM_XW_MINMAX_3X4C8__WASMSIMD, n_gt_4_strided_cn) { + for (uint32_t n = 5; n < 8; n++) { + for (size_t k = 1; k <= 40; k += 9) { + GemmMicrokernelTester() + .mr(3) + .nr(4) + .kr(8) + .sr(1) + .m(3) + .n(4) + .k(k) + .cn_stride(7) + .Test(xnn_qs8_gemm_xw_minmax_ukernel_3x4c8__wasmsimd); + } + } + } + + TEST(QS8_GEMM_XW_MINMAX_3X4C8__WASMSIMD, n_gt_4_strided_a) { + for (uint32_t n = 5; n < 8; n++) { + for (size_t k = 1; k <= 40; k += 9) { + GemmMicrokernelTester() + .mr(3) + .nr(4) + .kr(8) + .sr(1) + .m(3) + .n(n) + .k(k) + .a_stride(43) + .Test(xnn_qs8_gemm_xw_minmax_ukernel_3x4c8__wasmsimd); + } + } + } + + TEST(QS8_GEMM_XW_MINMAX_3X4C8__WASMSIMD, n_gt_4_subtile) { + for (uint32_t n = 5; n < 8; n++) { + for (size_t k = 1; k <= 40; k += 9) { + for (uint32_t m = 1; m <= 3; m++) { + GemmMicrokernelTester() + .mr(3) + .nr(4) + .kr(8) + .sr(1) + .m(m) + .n(n) + .k(k) + .iterations(1) + .Test(xnn_qs8_gemm_xw_minmax_ukernel_3x4c8__wasmsimd); + } + } + } + } + + TEST(QS8_GEMM_XW_MINMAX_3X4C8__WASMSIMD, n_div_4) { + for (uint32_t n = 8; n <= 12; n += 4) { + for (size_t k = 1; k <= 40; k += 9) { + GemmMicrokernelTester() + .mr(3) + .nr(4) + .kr(8) + .sr(1) + .m(3) + .n(4) + .k(k) + .Test(xnn_qs8_gemm_xw_minmax_ukernel_3x4c8__wasmsimd); + } + } + } + + TEST(QS8_GEMM_XW_MINMAX_3X4C8__WASMSIMD, n_div_4_strided_cn) { + for (uint32_t n = 8; n <= 12; n += 4) { + for (size_t k = 1; k <= 40; k += 9) { + GemmMicrokernelTester() + .mr(3) + .nr(4) + .kr(8) + .sr(1) + .m(3) + .n(n) + .k(k) + .cn_stride(7) + .Test(xnn_qs8_gemm_xw_minmax_ukernel_3x4c8__wasmsimd); + } + } + } + + TEST(QS8_GEMM_XW_MINMAX_3X4C8__WASMSIMD, n_div_4_strided_a) { + for (uint32_t n = 8; n <= 12; n += 4) { + for (size_t k = 1; k <= 40; k += 9) { + GemmMicrokernelTester() + .mr(3) + .nr(4) + .kr(8) + .sr(1) + .m(3) + .n(n) + .k(k) + .a_stride(43) + .Test(xnn_qs8_gemm_xw_minmax_ukernel_3x4c8__wasmsimd); + } + } + } + + TEST(QS8_GEMM_XW_MINMAX_3X4C8__WASMSIMD, n_div_4_subtile) { + for (uint32_t n = 8; n <= 12; n += 4) { + for (size_t k = 1; k <= 40; k += 9) { + for (uint32_t m = 1; m <= 3; m++) { + GemmMicrokernelTester() + .mr(3) + .nr(4) + .kr(8) + .sr(1) + .m(m) + .n(n) + .k(k) + .iterations(1) + .Test(xnn_qs8_gemm_xw_minmax_ukernel_3x4c8__wasmsimd); + } + } + } + } + + TEST(QS8_GEMM_XW_MINMAX_3X4C8__WASMSIMD, strided_cm_subtile) { + for (size_t k = 1; k <= 40; k += 9) { + for (uint32_t m = 1; m <= 3; m++) { + for (uint32_t n = 1; n <= 4; n++) { + GemmMicrokernelTester() + .mr(3) + .nr(4) + .kr(8) + .sr(1) + .m(m) + .n(n) + .k(k) + .cm_stride(7) + .iterations(1) + .Test(xnn_qs8_gemm_xw_minmax_ukernel_3x4c8__wasmsimd); + } + } + } + } + + TEST(QS8_GEMM_XW_MINMAX_3X4C8__WASMSIMD, strided_cm) { + GemmMicrokernelTester() + .mr(3) + .nr(4) + .kr(8) + .sr(1) + .m(3) + .n(4) + .k(8) + .cm_stride(7) + .Test(xnn_qs8_gemm_xw_minmax_ukernel_3x4c8__wasmsimd); + } +#endif // XNN_ARCH_WASMSIMD diff --git a/test/qs8-gemm-minmax.yaml b/test/qs8-gemm-minmax.yaml index 77075d5b8..7933bd390 100644 --- a/test/qs8-gemm-minmax.yaml +++ b/test/qs8-gemm-minmax.yaml @@ -142,3 +142,21 @@ k-block: 8 - name: xnn_qs8_gemm_xw_minmax_ukernel_3x8c8__avx2 k-block: 8 +- name: xnn_qs8_gemm_minmax_ukernel_1x4c8__wasmsimd_ld64 + k-block: 8 +- name: xnn_qs8_gemm_minmax_ukernel_2x4c8__wasmsimd_ld64 + k-block: 8 +- name: xnn_qs8_gemm_minmax_ukernel_3x4c8__wasmsimd_ld64 + k-block: 8 +- name: xnn_qs8_gemm_minmax_ukernel_1x4c8__wasmsimd_ld128 + k-block: 8 +- name: xnn_qs8_gemm_minmax_ukernel_2x4c8__wasmsimd_ld128 + k-block: 8 +- name: xnn_qs8_gemm_minmax_ukernel_3x4c8__wasmsimd_ld128 + k-block: 8 +- name: xnn_qs8_gemm_xw_minmax_ukernel_1x4c8__wasmsimd + k-block: 8 +- name: xnn_qs8_gemm_xw_minmax_ukernel_2x4c8__wasmsimd + k-block: 8 +- name: xnn_qs8_gemm_xw_minmax_ukernel_3x4c8__wasmsimd + k-block: 8 diff --git a/test/qs8-igemm-minmax.cc b/test/qs8-igemm-minmax.cc index 2096db3f6..c301084b8 100644 --- a/test/qs8-igemm-minmax.cc +++ b/test/qs8-igemm-minmax.cc @@ -22016,3 +22016,2649 @@ .Test(xnn_qs8_igemm_minmax_ukernel_3x8c8__avx2); } #endif // XNN_ARCH_X86 || XNN_ARCH_X86_64 + + +#if XNN_ARCH_WASMSIMD + TEST(QS8_IGEMM_MINMAX_1X4C8__WASMSIMD_LD64, k_eq_8) { + GemmMicrokernelTester() + .mr(1) + .nr(4) + .kr(8) + .sr(1) + .m(1) + .n(4) + .k(8) + .Test(xnn_qs8_igemm_minmax_ukernel_1x4c8__wasmsimd_ld64); + } + + TEST(QS8_IGEMM_MINMAX_1X4C8__WASMSIMD_LD64, strided_cn) { + GemmMicrokernelTester() + .mr(1) + .nr(4) + .kr(8) + .sr(1) + .m(1) + .n(4) + .k(8) + .cn_stride(7) + .Test(xnn_qs8_igemm_minmax_ukernel_1x4c8__wasmsimd_ld64); + } + + TEST(QS8_IGEMM_MINMAX_1X4C8__WASMSIMD_LD64, k_eq_8_subtile) { + for (uint32_t m = 1; m <= 1; m++) { + for (uint32_t n = 1; n <= 4; n++) { + GemmMicrokernelTester() + .mr(1) + .nr(4) + .kr(8) + .sr(1) + .m(m) + .n(n) + .k(8) + .iterations(1) + .Test(xnn_qs8_igemm_minmax_ukernel_1x4c8__wasmsimd_ld64); + } + } + } + + TEST(QS8_IGEMM_MINMAX_1X4C8__WASMSIMD_LD64, k_eq_8_subtile_m) { + for (uint32_t m = 1; m <= 1; m++) { + GemmMicrokernelTester() + .mr(1) + .nr(4) + .kr(8) + .sr(1) + .m(m) + .n(4) + .k(8) + .iterations(1) + .Test(xnn_qs8_igemm_minmax_ukernel_1x4c8__wasmsimd_ld64); + } + } + + TEST(QS8_IGEMM_MINMAX_1X4C8__WASMSIMD_LD64, k_eq_8_subtile_n) { + for (uint32_t n = 1; n <= 4; n++) { + GemmMicrokernelTester() + .mr(1) + .nr(4) + .kr(8) + .sr(1) + .m(1) + .n(n) + .k(8) + .iterations(1) + .Test(xnn_qs8_igemm_minmax_ukernel_1x4c8__wasmsimd_ld64); + } + } + + TEST(QS8_IGEMM_MINMAX_1X4C8__WASMSIMD_LD64, k_lt_8) { + for (size_t k = 1; k < 8; k++) { + GemmMicrokernelTester() + .mr(1) + .nr(4) + .kr(8) + .sr(1) + .m(1) + .n(4) + .k(k) + .Test(xnn_qs8_igemm_minmax_ukernel_1x4c8__wasmsimd_ld64); + } + } + + TEST(QS8_IGEMM_MINMAX_1X4C8__WASMSIMD_LD64, k_lt_8_subtile) { + for (size_t k = 1; k < 8; k++) { + for (uint32_t m = 1; m <= 1; m++) { + for (uint32_t n = 1; n <= 4; n++) { + GemmMicrokernelTester() + .mr(1) + .nr(4) + .kr(8) + .sr(1) + .m(m) + .n(n) + .k(k) + .iterations(1) + .Test(xnn_qs8_igemm_minmax_ukernel_1x4c8__wasmsimd_ld64); + } + } + } + } + + TEST(QS8_IGEMM_MINMAX_1X4C8__WASMSIMD_LD64, k_gt_8) { + for (size_t k = 9; k < 16; k++) { + GemmMicrokernelTester() + .mr(1) + .nr(4) + .kr(8) + .sr(1) + .m(1) + .n(4) + .k(k) + .Test(xnn_qs8_igemm_minmax_ukernel_1x4c8__wasmsimd_ld64); + } + } + + TEST(QS8_IGEMM_MINMAX_1X4C8__WASMSIMD_LD64, k_gt_8_subtile) { + for (size_t k = 9; k < 16; k++) { + for (uint32_t m = 1; m <= 1; m++) { + for (uint32_t n = 1; n <= 4; n++) { + GemmMicrokernelTester() + .mr(1) + .nr(4) + .kr(8) + .sr(1) + .m(m) + .n(n) + .k(k) + .iterations(1) + .Test(xnn_qs8_igemm_minmax_ukernel_1x4c8__wasmsimd_ld64); + } + } + } + } + + TEST(QS8_IGEMM_MINMAX_1X4C8__WASMSIMD_LD64, k_div_8) { + for (size_t k = 16; k <= 80; k += 8) { + GemmMicrokernelTester() + .mr(1) + .nr(4) + .kr(8) + .sr(1) + .m(1) + .n(4) + .k(k) + .Test(xnn_qs8_igemm_minmax_ukernel_1x4c8__wasmsimd_ld64); + } + } + + TEST(QS8_IGEMM_MINMAX_1X4C8__WASMSIMD_LD64, k_div_8_subtile) { + for (size_t k = 16; k <= 80; k += 8) { + for (uint32_t m = 1; m <= 1; m++) { + for (uint32_t n = 1; n <= 4; n++) { + GemmMicrokernelTester() + .mr(1) + .nr(4) + .kr(8) + .sr(1) + .m(m) + .n(n) + .k(k) + .iterations(1) + .Test(xnn_qs8_igemm_minmax_ukernel_1x4c8__wasmsimd_ld64); + } + } + } + } + + TEST(QS8_IGEMM_MINMAX_1X4C8__WASMSIMD_LD64, n_gt_4) { + for (uint32_t n = 5; n < 8; n++) { + for (size_t k = 1; k <= 40; k += 9) { + GemmMicrokernelTester() + .mr(1) + .nr(4) + .kr(8) + .sr(1) + .m(1) + .n(4) + .k(k) + .Test(xnn_qs8_igemm_minmax_ukernel_1x4c8__wasmsimd_ld64); + } + } + } + + TEST(QS8_IGEMM_MINMAX_1X4C8__WASMSIMD_LD64, n_gt_4_strided_cn) { + for (uint32_t n = 5; n < 8; n++) { + for (size_t k = 1; k <= 40; k += 9) { + GemmMicrokernelTester() + .mr(1) + .nr(4) + .kr(8) + .sr(1) + .m(1) + .n(4) + .k(k) + .cn_stride(7) + .Test(xnn_qs8_igemm_minmax_ukernel_1x4c8__wasmsimd_ld64); + } + } + } + + TEST(QS8_IGEMM_MINMAX_1X4C8__WASMSIMD_LD64, n_gt_4_subtile) { + for (uint32_t n = 5; n < 8; n++) { + for (size_t k = 1; k <= 40; k += 9) { + for (uint32_t m = 1; m <= 1; m++) { + GemmMicrokernelTester() + .mr(1) + .nr(4) + .kr(8) + .sr(1) + .m(m) + .n(n) + .k(k) + .iterations(1) + .Test(xnn_qs8_igemm_minmax_ukernel_1x4c8__wasmsimd_ld64); + } + } + } + } + + TEST(QS8_IGEMM_MINMAX_1X4C8__WASMSIMD_LD64, n_div_4) { + for (uint32_t n = 8; n <= 12; n += 4) { + for (size_t k = 1; k <= 40; k += 9) { + GemmMicrokernelTester() + .mr(1) + .nr(4) + .kr(8) + .sr(1) + .m(1) + .n(4) + .k(k) + .Test(xnn_qs8_igemm_minmax_ukernel_1x4c8__wasmsimd_ld64); + } + } + } + + TEST(QS8_IGEMM_MINMAX_1X4C8__WASMSIMD_LD64, n_div_4_strided_cn) { + for (uint32_t n = 8; n <= 12; n += 4) { + for (size_t k = 1; k <= 40; k += 9) { + GemmMicrokernelTester() + .mr(1) + .nr(4) + .kr(8) + .sr(1) + .m(1) + .n(n) + .k(k) + .cn_stride(7) + .Test(xnn_qs8_igemm_minmax_ukernel_1x4c8__wasmsimd_ld64); + } + } + } + + TEST(QS8_IGEMM_MINMAX_1X4C8__WASMSIMD_LD64, n_div_4_subtile) { + for (uint32_t n = 8; n <= 12; n += 4) { + for (size_t k = 1; k <= 40; k += 9) { + for (uint32_t m = 1; m <= 1; m++) { + GemmMicrokernelTester() + .mr(1) + .nr(4) + .kr(8) + .sr(1) + .m(m) + .n(n) + .k(k) + .iterations(1) + .Test(xnn_qs8_igemm_minmax_ukernel_1x4c8__wasmsimd_ld64); + } + } + } + } + + TEST(QS8_IGEMM_MINMAX_1X4C8__WASMSIMD_LD64, small_kernel) { + for (size_t k = 1; k <= 40; k += 9) { + GemmMicrokernelTester() + .mr(1) + .nr(4) + .kr(8) + .sr(1) + .m(1) + .n(4) + .k(k) + .ks(3) + .Test(xnn_qs8_igemm_minmax_ukernel_1x4c8__wasmsimd_ld64); + } + } + + TEST(QS8_IGEMM_MINMAX_1X4C8__WASMSIMD_LD64, small_kernel_subtile) { + for (size_t k = 1; k <= 40; k += 9) { + for (uint32_t m = 1; m <= 1; m++) { + for (uint32_t n = 1; n <= 4; n++) { + GemmMicrokernelTester() + .mr(1) + .nr(4) + .kr(8) + .sr(1) + .m(m) + .n(n) + .k(k) + .ks(3) + .iterations(1) + .Test(xnn_qs8_igemm_minmax_ukernel_1x4c8__wasmsimd_ld64); + } + } + } + } + + TEST(QS8_IGEMM_MINMAX_1X4C8__WASMSIMD_LD64, n_gt_4_small_kernel) { + for (uint32_t n = 5; n < 8; n++) { + for (size_t k = 1; k <= 40; k += 9) { + GemmMicrokernelTester() + .mr(1) + .nr(4) + .kr(8) + .sr(1) + .m(1) + .n(4) + .k(k) + .ks(3) + .Test(xnn_qs8_igemm_minmax_ukernel_1x4c8__wasmsimd_ld64); + } + } + } + + TEST(QS8_IGEMM_MINMAX_1X4C8__WASMSIMD_LD64, n_div_4_small_kernel) { + for (uint32_t n = 8; n <= 12; n += 4) { + for (size_t k = 1; k <= 40; k += 9) { + GemmMicrokernelTester() + .mr(1) + .nr(4) + .kr(8) + .sr(1) + .m(1) + .n(4) + .k(k) + .ks(3) + .Test(xnn_qs8_igemm_minmax_ukernel_1x4c8__wasmsimd_ld64); + } + } + } + + TEST(QS8_IGEMM_MINMAX_1X4C8__WASMSIMD_LD64, strided_cm_subtile) { + for (size_t k = 1; k <= 40; k += 9) { + for (uint32_t m = 1; m <= 1; m++) { + for (uint32_t n = 1; n <= 4; n++) { + GemmMicrokernelTester() + .mr(1) + .nr(4) + .kr(8) + .sr(1) + .m(m) + .n(n) + .k(k) + .cm_stride(7) + .iterations(1) + .Test(xnn_qs8_igemm_minmax_ukernel_1x4c8__wasmsimd_ld64); + } + } + } + } + + TEST(QS8_IGEMM_MINMAX_1X4C8__WASMSIMD_LD64, a_offset) { + for (size_t k = 1; k <= 40; k += 9) { + GemmMicrokernelTester() + .mr(1) + .nr(4) + .kr(8) + .sr(1) + .m(1) + .n(4) + .k(k) + .ks(3) + .a_offset(43) + .Test(xnn_qs8_igemm_minmax_ukernel_1x4c8__wasmsimd_ld64); + } + } + + TEST(QS8_IGEMM_MINMAX_1X4C8__WASMSIMD_LD64, zero) { + for (uint32_t mz = 0; mz < 1; mz++) { + for (size_t k = 1; k <= 40; k += 9) { + GemmMicrokernelTester() + .mr(1) + .nr(4) + .kr(8) + .sr(1) + .m(1) + .n(4) + .k(k) + .ks(3) + .a_offset(43) + .zero_index(mz) + .Test(xnn_qs8_igemm_minmax_ukernel_1x4c8__wasmsimd_ld64); + } + } + } + + TEST(QS8_IGEMM_MINMAX_1X4C8__WASMSIMD_LD64, qmin) { + GemmMicrokernelTester() + .mr(1) + .nr(4) + .kr(8) + .sr(1) + .m(1) + .n(4) + .k(8) + .qmin(128) + .Test(xnn_qs8_igemm_minmax_ukernel_1x4c8__wasmsimd_ld64); + } + + TEST(QS8_IGEMM_MINMAX_1X4C8__WASMSIMD_LD64, qmax) { + GemmMicrokernelTester() + .mr(1) + .nr(4) + .kr(8) + .sr(1) + .m(1) + .n(4) + .k(8) + .qmax(128) + .Test(xnn_qs8_igemm_minmax_ukernel_1x4c8__wasmsimd_ld64); + } + + TEST(QS8_IGEMM_MINMAX_1X4C8__WASMSIMD_LD64, strided_cm) { + GemmMicrokernelTester() + .mr(1) + .nr(4) + .kr(8) + .sr(1) + .m(1) + .n(4) + .k(8) + .cm_stride(7) + .Test(xnn_qs8_igemm_minmax_ukernel_1x4c8__wasmsimd_ld64); + } +#endif // XNN_ARCH_WASMSIMD + + +#if XNN_ARCH_WASMSIMD + TEST(QS8_IGEMM_MINMAX_2X4C8__WASMSIMD_LD64, k_eq_8) { + GemmMicrokernelTester() + .mr(2) + .nr(4) + .kr(8) + .sr(1) + .m(2) + .n(4) + .k(8) + .Test(xnn_qs8_igemm_minmax_ukernel_2x4c8__wasmsimd_ld64); + } + + TEST(QS8_IGEMM_MINMAX_2X4C8__WASMSIMD_LD64, strided_cn) { + GemmMicrokernelTester() + .mr(2) + .nr(4) + .kr(8) + .sr(1) + .m(2) + .n(4) + .k(8) + .cn_stride(7) + .Test(xnn_qs8_igemm_minmax_ukernel_2x4c8__wasmsimd_ld64); + } + + TEST(QS8_IGEMM_MINMAX_2X4C8__WASMSIMD_LD64, k_eq_8_subtile) { + for (uint32_t m = 1; m <= 2; m++) { + for (uint32_t n = 1; n <= 4; n++) { + GemmMicrokernelTester() + .mr(2) + .nr(4) + .kr(8) + .sr(1) + .m(m) + .n(n) + .k(8) + .iterations(1) + .Test(xnn_qs8_igemm_minmax_ukernel_2x4c8__wasmsimd_ld64); + } + } + } + + TEST(QS8_IGEMM_MINMAX_2X4C8__WASMSIMD_LD64, k_eq_8_subtile_m) { + for (uint32_t m = 1; m <= 2; m++) { + GemmMicrokernelTester() + .mr(2) + .nr(4) + .kr(8) + .sr(1) + .m(m) + .n(4) + .k(8) + .iterations(1) + .Test(xnn_qs8_igemm_minmax_ukernel_2x4c8__wasmsimd_ld64); + } + } + + TEST(QS8_IGEMM_MINMAX_2X4C8__WASMSIMD_LD64, k_eq_8_subtile_n) { + for (uint32_t n = 1; n <= 4; n++) { + GemmMicrokernelTester() + .mr(2) + .nr(4) + .kr(8) + .sr(1) + .m(2) + .n(n) + .k(8) + .iterations(1) + .Test(xnn_qs8_igemm_minmax_ukernel_2x4c8__wasmsimd_ld64); + } + } + + TEST(QS8_IGEMM_MINMAX_2X4C8__WASMSIMD_LD64, k_lt_8) { + for (size_t k = 1; k < 8; k++) { + GemmMicrokernelTester() + .mr(2) + .nr(4) + .kr(8) + .sr(1) + .m(2) + .n(4) + .k(k) + .Test(xnn_qs8_igemm_minmax_ukernel_2x4c8__wasmsimd_ld64); + } + } + + TEST(QS8_IGEMM_MINMAX_2X4C8__WASMSIMD_LD64, k_lt_8_subtile) { + for (size_t k = 1; k < 8; k++) { + for (uint32_t m = 1; m <= 2; m++) { + for (uint32_t n = 1; n <= 4; n++) { + GemmMicrokernelTester() + .mr(2) + .nr(4) + .kr(8) + .sr(1) + .m(m) + .n(n) + .k(k) + .iterations(1) + .Test(xnn_qs8_igemm_minmax_ukernel_2x4c8__wasmsimd_ld64); + } + } + } + } + + TEST(QS8_IGEMM_MINMAX_2X4C8__WASMSIMD_LD64, k_gt_8) { + for (size_t k = 9; k < 16; k++) { + GemmMicrokernelTester() + .mr(2) + .nr(4) + .kr(8) + .sr(1) + .m(2) + .n(4) + .k(k) + .Test(xnn_qs8_igemm_minmax_ukernel_2x4c8__wasmsimd_ld64); + } + } + + TEST(QS8_IGEMM_MINMAX_2X4C8__WASMSIMD_LD64, k_gt_8_subtile) { + for (size_t k = 9; k < 16; k++) { + for (uint32_t m = 1; m <= 2; m++) { + for (uint32_t n = 1; n <= 4; n++) { + GemmMicrokernelTester() + .mr(2) + .nr(4) + .kr(8) + .sr(1) + .m(m) + .n(n) + .k(k) + .iterations(1) + .Test(xnn_qs8_igemm_minmax_ukernel_2x4c8__wasmsimd_ld64); + } + } + } + } + + TEST(QS8_IGEMM_MINMAX_2X4C8__WASMSIMD_LD64, k_div_8) { + for (size_t k = 16; k <= 80; k += 8) { + GemmMicrokernelTester() + .mr(2) + .nr(4) + .kr(8) + .sr(1) + .m(2) + .n(4) + .k(k) + .Test(xnn_qs8_igemm_minmax_ukernel_2x4c8__wasmsimd_ld64); + } + } + + TEST(QS8_IGEMM_MINMAX_2X4C8__WASMSIMD_LD64, k_div_8_subtile) { + for (size_t k = 16; k <= 80; k += 8) { + for (uint32_t m = 1; m <= 2; m++) { + for (uint32_t n = 1; n <= 4; n++) { + GemmMicrokernelTester() + .mr(2) + .nr(4) + .kr(8) + .sr(1) + .m(m) + .n(n) + .k(k) + .iterations(1) + .Test(xnn_qs8_igemm_minmax_ukernel_2x4c8__wasmsimd_ld64); + } + } + } + } + + TEST(QS8_IGEMM_MINMAX_2X4C8__WASMSIMD_LD64, n_gt_4) { + for (uint32_t n = 5; n < 8; n++) { + for (size_t k = 1; k <= 40; k += 9) { + GemmMicrokernelTester() + .mr(2) + .nr(4) + .kr(8) + .sr(1) + .m(2) + .n(4) + .k(k) + .Test(xnn_qs8_igemm_minmax_ukernel_2x4c8__wasmsimd_ld64); + } + } + } + + TEST(QS8_IGEMM_MINMAX_2X4C8__WASMSIMD_LD64, n_gt_4_strided_cn) { + for (uint32_t n = 5; n < 8; n++) { + for (size_t k = 1; k <= 40; k += 9) { + GemmMicrokernelTester() + .mr(2) + .nr(4) + .kr(8) + .sr(1) + .m(2) + .n(4) + .k(k) + .cn_stride(7) + .Test(xnn_qs8_igemm_minmax_ukernel_2x4c8__wasmsimd_ld64); + } + } + } + + TEST(QS8_IGEMM_MINMAX_2X4C8__WASMSIMD_LD64, n_gt_4_subtile) { + for (uint32_t n = 5; n < 8; n++) { + for (size_t k = 1; k <= 40; k += 9) { + for (uint32_t m = 1; m <= 2; m++) { + GemmMicrokernelTester() + .mr(2) + .nr(4) + .kr(8) + .sr(1) + .m(m) + .n(n) + .k(k) + .iterations(1) + .Test(xnn_qs8_igemm_minmax_ukernel_2x4c8__wasmsimd_ld64); + } + } + } + } + + TEST(QS8_IGEMM_MINMAX_2X4C8__WASMSIMD_LD64, n_div_4) { + for (uint32_t n = 8; n <= 12; n += 4) { + for (size_t k = 1; k <= 40; k += 9) { + GemmMicrokernelTester() + .mr(2) + .nr(4) + .kr(8) + .sr(1) + .m(2) + .n(4) + .k(k) + .Test(xnn_qs8_igemm_minmax_ukernel_2x4c8__wasmsimd_ld64); + } + } + } + + TEST(QS8_IGEMM_MINMAX_2X4C8__WASMSIMD_LD64, n_div_4_strided_cn) { + for (uint32_t n = 8; n <= 12; n += 4) { + for (size_t k = 1; k <= 40; k += 9) { + GemmMicrokernelTester() + .mr(2) + .nr(4) + .kr(8) + .sr(1) + .m(2) + .n(n) + .k(k) + .cn_stride(7) + .Test(xnn_qs8_igemm_minmax_ukernel_2x4c8__wasmsimd_ld64); + } + } + } + + TEST(QS8_IGEMM_MINMAX_2X4C8__WASMSIMD_LD64, n_div_4_subtile) { + for (uint32_t n = 8; n <= 12; n += 4) { + for (size_t k = 1; k <= 40; k += 9) { + for (uint32_t m = 1; m <= 2; m++) { + GemmMicrokernelTester() + .mr(2) + .nr(4) + .kr(8) + .sr(1) + .m(m) + .n(n) + .k(k) + .iterations(1) + .Test(xnn_qs8_igemm_minmax_ukernel_2x4c8__wasmsimd_ld64); + } + } + } + } + + TEST(QS8_IGEMM_MINMAX_2X4C8__WASMSIMD_LD64, small_kernel) { + for (size_t k = 1; k <= 40; k += 9) { + GemmMicrokernelTester() + .mr(2) + .nr(4) + .kr(8) + .sr(1) + .m(2) + .n(4) + .k(k) + .ks(3) + .Test(xnn_qs8_igemm_minmax_ukernel_2x4c8__wasmsimd_ld64); + } + } + + TEST(QS8_IGEMM_MINMAX_2X4C8__WASMSIMD_LD64, small_kernel_subtile) { + for (size_t k = 1; k <= 40; k += 9) { + for (uint32_t m = 1; m <= 2; m++) { + for (uint32_t n = 1; n <= 4; n++) { + GemmMicrokernelTester() + .mr(2) + .nr(4) + .kr(8) + .sr(1) + .m(m) + .n(n) + .k(k) + .ks(3) + .iterations(1) + .Test(xnn_qs8_igemm_minmax_ukernel_2x4c8__wasmsimd_ld64); + } + } + } + } + + TEST(QS8_IGEMM_MINMAX_2X4C8__WASMSIMD_LD64, n_gt_4_small_kernel) { + for (uint32_t n = 5; n < 8; n++) { + for (size_t k = 1; k <= 40; k += 9) { + GemmMicrokernelTester() + .mr(2) + .nr(4) + .kr(8) + .sr(1) + .m(2) + .n(4) + .k(k) + .ks(3) + .Test(xnn_qs8_igemm_minmax_ukernel_2x4c8__wasmsimd_ld64); + } + } + } + + TEST(QS8_IGEMM_MINMAX_2X4C8__WASMSIMD_LD64, n_div_4_small_kernel) { + for (uint32_t n = 8; n <= 12; n += 4) { + for (size_t k = 1; k <= 40; k += 9) { + GemmMicrokernelTester() + .mr(2) + .nr(4) + .kr(8) + .sr(1) + .m(2) + .n(4) + .k(k) + .ks(3) + .Test(xnn_qs8_igemm_minmax_ukernel_2x4c8__wasmsimd_ld64); + } + } + } + + TEST(QS8_IGEMM_MINMAX_2X4C8__WASMSIMD_LD64, strided_cm_subtile) { + for (size_t k = 1; k <= 40; k += 9) { + for (uint32_t m = 1; m <= 2; m++) { + for (uint32_t n = 1; n <= 4; n++) { + GemmMicrokernelTester() + .mr(2) + .nr(4) + .kr(8) + .sr(1) + .m(m) + .n(n) + .k(k) + .cm_stride(7) + .iterations(1) + .Test(xnn_qs8_igemm_minmax_ukernel_2x4c8__wasmsimd_ld64); + } + } + } + } + + TEST(QS8_IGEMM_MINMAX_2X4C8__WASMSIMD_LD64, a_offset) { + for (size_t k = 1; k <= 40; k += 9) { + GemmMicrokernelTester() + .mr(2) + .nr(4) + .kr(8) + .sr(1) + .m(2) + .n(4) + .k(k) + .ks(3) + .a_offset(83) + .Test(xnn_qs8_igemm_minmax_ukernel_2x4c8__wasmsimd_ld64); + } + } + + TEST(QS8_IGEMM_MINMAX_2X4C8__WASMSIMD_LD64, zero) { + for (uint32_t mz = 0; mz < 2; mz++) { + for (size_t k = 1; k <= 40; k += 9) { + GemmMicrokernelTester() + .mr(2) + .nr(4) + .kr(8) + .sr(1) + .m(2) + .n(4) + .k(k) + .ks(3) + .a_offset(83) + .zero_index(mz) + .Test(xnn_qs8_igemm_minmax_ukernel_2x4c8__wasmsimd_ld64); + } + } + } + + TEST(QS8_IGEMM_MINMAX_2X4C8__WASMSIMD_LD64, qmin) { + GemmMicrokernelTester() + .mr(2) + .nr(4) + .kr(8) + .sr(1) + .m(2) + .n(4) + .k(8) + .qmin(128) + .Test(xnn_qs8_igemm_minmax_ukernel_2x4c8__wasmsimd_ld64); + } + + TEST(QS8_IGEMM_MINMAX_2X4C8__WASMSIMD_LD64, qmax) { + GemmMicrokernelTester() + .mr(2) + .nr(4) + .kr(8) + .sr(1) + .m(2) + .n(4) + .k(8) + .qmax(128) + .Test(xnn_qs8_igemm_minmax_ukernel_2x4c8__wasmsimd_ld64); + } + + TEST(QS8_IGEMM_MINMAX_2X4C8__WASMSIMD_LD64, strided_cm) { + GemmMicrokernelTester() + .mr(2) + .nr(4) + .kr(8) + .sr(1) + .m(2) + .n(4) + .k(8) + .cm_stride(7) + .Test(xnn_qs8_igemm_minmax_ukernel_2x4c8__wasmsimd_ld64); + } +#endif // XNN_ARCH_WASMSIMD + + +#if XNN_ARCH_WASMSIMD + TEST(QS8_IGEMM_MINMAX_3X4C8__WASMSIMD_LD64, k_eq_8) { + GemmMicrokernelTester() + .mr(3) + .nr(4) + .kr(8) + .sr(1) + .m(3) + .n(4) + .k(8) + .Test(xnn_qs8_igemm_minmax_ukernel_3x4c8__wasmsimd_ld64); + } + + TEST(QS8_IGEMM_MINMAX_3X4C8__WASMSIMD_LD64, strided_cn) { + GemmMicrokernelTester() + .mr(3) + .nr(4) + .kr(8) + .sr(1) + .m(3) + .n(4) + .k(8) + .cn_stride(7) + .Test(xnn_qs8_igemm_minmax_ukernel_3x4c8__wasmsimd_ld64); + } + + TEST(QS8_IGEMM_MINMAX_3X4C8__WASMSIMD_LD64, k_eq_8_subtile) { + for (uint32_t m = 1; m <= 3; m++) { + for (uint32_t n = 1; n <= 4; n++) { + GemmMicrokernelTester() + .mr(3) + .nr(4) + .kr(8) + .sr(1) + .m(m) + .n(n) + .k(8) + .iterations(1) + .Test(xnn_qs8_igemm_minmax_ukernel_3x4c8__wasmsimd_ld64); + } + } + } + + TEST(QS8_IGEMM_MINMAX_3X4C8__WASMSIMD_LD64, k_eq_8_subtile_m) { + for (uint32_t m = 1; m <= 3; m++) { + GemmMicrokernelTester() + .mr(3) + .nr(4) + .kr(8) + .sr(1) + .m(m) + .n(4) + .k(8) + .iterations(1) + .Test(xnn_qs8_igemm_minmax_ukernel_3x4c8__wasmsimd_ld64); + } + } + + TEST(QS8_IGEMM_MINMAX_3X4C8__WASMSIMD_LD64, k_eq_8_subtile_n) { + for (uint32_t n = 1; n <= 4; n++) { + GemmMicrokernelTester() + .mr(3) + .nr(4) + .kr(8) + .sr(1) + .m(3) + .n(n) + .k(8) + .iterations(1) + .Test(xnn_qs8_igemm_minmax_ukernel_3x4c8__wasmsimd_ld64); + } + } + + TEST(QS8_IGEMM_MINMAX_3X4C8__WASMSIMD_LD64, k_lt_8) { + for (size_t k = 1; k < 8; k++) { + GemmMicrokernelTester() + .mr(3) + .nr(4) + .kr(8) + .sr(1) + .m(3) + .n(4) + .k(k) + .Test(xnn_qs8_igemm_minmax_ukernel_3x4c8__wasmsimd_ld64); + } + } + + TEST(QS8_IGEMM_MINMAX_3X4C8__WASMSIMD_LD64, k_lt_8_subtile) { + for (size_t k = 1; k < 8; k++) { + for (uint32_t m = 1; m <= 3; m++) { + for (uint32_t n = 1; n <= 4; n++) { + GemmMicrokernelTester() + .mr(3) + .nr(4) + .kr(8) + .sr(1) + .m(m) + .n(n) + .k(k) + .iterations(1) + .Test(xnn_qs8_igemm_minmax_ukernel_3x4c8__wasmsimd_ld64); + } + } + } + } + + TEST(QS8_IGEMM_MINMAX_3X4C8__WASMSIMD_LD64, k_gt_8) { + for (size_t k = 9; k < 16; k++) { + GemmMicrokernelTester() + .mr(3) + .nr(4) + .kr(8) + .sr(1) + .m(3) + .n(4) + .k(k) + .Test(xnn_qs8_igemm_minmax_ukernel_3x4c8__wasmsimd_ld64); + } + } + + TEST(QS8_IGEMM_MINMAX_3X4C8__WASMSIMD_LD64, k_gt_8_subtile) { + for (size_t k = 9; k < 16; k++) { + for (uint32_t m = 1; m <= 3; m++) { + for (uint32_t n = 1; n <= 4; n++) { + GemmMicrokernelTester() + .mr(3) + .nr(4) + .kr(8) + .sr(1) + .m(m) + .n(n) + .k(k) + .iterations(1) + .Test(xnn_qs8_igemm_minmax_ukernel_3x4c8__wasmsimd_ld64); + } + } + } + } + + TEST(QS8_IGEMM_MINMAX_3X4C8__WASMSIMD_LD64, k_div_8) { + for (size_t k = 16; k <= 80; k += 8) { + GemmMicrokernelTester() + .mr(3) + .nr(4) + .kr(8) + .sr(1) + .m(3) + .n(4) + .k(k) + .Test(xnn_qs8_igemm_minmax_ukernel_3x4c8__wasmsimd_ld64); + } + } + + TEST(QS8_IGEMM_MINMAX_3X4C8__WASMSIMD_LD64, k_div_8_subtile) { + for (size_t k = 16; k <= 80; k += 8) { + for (uint32_t m = 1; m <= 3; m++) { + for (uint32_t n = 1; n <= 4; n++) { + GemmMicrokernelTester() + .mr(3) + .nr(4) + .kr(8) + .sr(1) + .m(m) + .n(n) + .k(k) + .iterations(1) + .Test(xnn_qs8_igemm_minmax_ukernel_3x4c8__wasmsimd_ld64); + } + } + } + } + + TEST(QS8_IGEMM_MINMAX_3X4C8__WASMSIMD_LD64, n_gt_4) { + for (uint32_t n = 5; n < 8; n++) { + for (size_t k = 1; k <= 40; k += 9) { + GemmMicrokernelTester() + .mr(3) + .nr(4) + .kr(8) + .sr(1) + .m(3) + .n(4) + .k(k) + .Test(xnn_qs8_igemm_minmax_ukernel_3x4c8__wasmsimd_ld64); + } + } + } + + TEST(QS8_IGEMM_MINMAX_3X4C8__WASMSIMD_LD64, n_gt_4_strided_cn) { + for (uint32_t n = 5; n < 8; n++) { + for (size_t k = 1; k <= 40; k += 9) { + GemmMicrokernelTester() + .mr(3) + .nr(4) + .kr(8) + .sr(1) + .m(3) + .n(4) + .k(k) + .cn_stride(7) + .Test(xnn_qs8_igemm_minmax_ukernel_3x4c8__wasmsimd_ld64); + } + } + } + + TEST(QS8_IGEMM_MINMAX_3X4C8__WASMSIMD_LD64, n_gt_4_subtile) { + for (uint32_t n = 5; n < 8; n++) { + for (size_t k = 1; k <= 40; k += 9) { + for (uint32_t m = 1; m <= 3; m++) { + GemmMicrokernelTester() + .mr(3) + .nr(4) + .kr(8) + .sr(1) + .m(m) + .n(n) + .k(k) + .iterations(1) + .Test(xnn_qs8_igemm_minmax_ukernel_3x4c8__wasmsimd_ld64); + } + } + } + } + + TEST(QS8_IGEMM_MINMAX_3X4C8__WASMSIMD_LD64, n_div_4) { + for (uint32_t n = 8; n <= 12; n += 4) { + for (size_t k = 1; k <= 40; k += 9) { + GemmMicrokernelTester() + .mr(3) + .nr(4) + .kr(8) + .sr(1) + .m(3) + .n(4) + .k(k) + .Test(xnn_qs8_igemm_minmax_ukernel_3x4c8__wasmsimd_ld64); + } + } + } + + TEST(QS8_IGEMM_MINMAX_3X4C8__WASMSIMD_LD64, n_div_4_strided_cn) { + for (uint32_t n = 8; n <= 12; n += 4) { + for (size_t k = 1; k <= 40; k += 9) { + GemmMicrokernelTester() + .mr(3) + .nr(4) + .kr(8) + .sr(1) + .m(3) + .n(n) + .k(k) + .cn_stride(7) + .Test(xnn_qs8_igemm_minmax_ukernel_3x4c8__wasmsimd_ld64); + } + } + } + + TEST(QS8_IGEMM_MINMAX_3X4C8__WASMSIMD_LD64, n_div_4_subtile) { + for (uint32_t n = 8; n <= 12; n += 4) { + for (size_t k = 1; k <= 40; k += 9) { + for (uint32_t m = 1; m <= 3; m++) { + GemmMicrokernelTester() + .mr(3) + .nr(4) + .kr(8) + .sr(1) + .m(m) + .n(n) + .k(k) + .iterations(1) + .Test(xnn_qs8_igemm_minmax_ukernel_3x4c8__wasmsimd_ld64); + } + } + } + } + + TEST(QS8_IGEMM_MINMAX_3X4C8__WASMSIMD_LD64, small_kernel) { + for (size_t k = 1; k <= 40; k += 9) { + GemmMicrokernelTester() + .mr(3) + .nr(4) + .kr(8) + .sr(1) + .m(3) + .n(4) + .k(k) + .ks(3) + .Test(xnn_qs8_igemm_minmax_ukernel_3x4c8__wasmsimd_ld64); + } + } + + TEST(QS8_IGEMM_MINMAX_3X4C8__WASMSIMD_LD64, small_kernel_subtile) { + for (size_t k = 1; k <= 40; k += 9) { + for (uint32_t m = 1; m <= 3; m++) { + for (uint32_t n = 1; n <= 4; n++) { + GemmMicrokernelTester() + .mr(3) + .nr(4) + .kr(8) + .sr(1) + .m(m) + .n(n) + .k(k) + .ks(3) + .iterations(1) + .Test(xnn_qs8_igemm_minmax_ukernel_3x4c8__wasmsimd_ld64); + } + } + } + } + + TEST(QS8_IGEMM_MINMAX_3X4C8__WASMSIMD_LD64, n_gt_4_small_kernel) { + for (uint32_t n = 5; n < 8; n++) { + for (size_t k = 1; k <= 40; k += 9) { + GemmMicrokernelTester() + .mr(3) + .nr(4) + .kr(8) + .sr(1) + .m(3) + .n(4) + .k(k) + .ks(3) + .Test(xnn_qs8_igemm_minmax_ukernel_3x4c8__wasmsimd_ld64); + } + } + } + + TEST(QS8_IGEMM_MINMAX_3X4C8__WASMSIMD_LD64, n_div_4_small_kernel) { + for (uint32_t n = 8; n <= 12; n += 4) { + for (size_t k = 1; k <= 40; k += 9) { + GemmMicrokernelTester() + .mr(3) + .nr(4) + .kr(8) + .sr(1) + .m(3) + .n(4) + .k(k) + .ks(3) + .Test(xnn_qs8_igemm_minmax_ukernel_3x4c8__wasmsimd_ld64); + } + } + } + + TEST(QS8_IGEMM_MINMAX_3X4C8__WASMSIMD_LD64, strided_cm_subtile) { + for (size_t k = 1; k <= 40; k += 9) { + for (uint32_t m = 1; m <= 3; m++) { + for (uint32_t n = 1; n <= 4; n++) { + GemmMicrokernelTester() + .mr(3) + .nr(4) + .kr(8) + .sr(1) + .m(m) + .n(n) + .k(k) + .cm_stride(7) + .iterations(1) + .Test(xnn_qs8_igemm_minmax_ukernel_3x4c8__wasmsimd_ld64); + } + } + } + } + + TEST(QS8_IGEMM_MINMAX_3X4C8__WASMSIMD_LD64, a_offset) { + for (size_t k = 1; k <= 40; k += 9) { + GemmMicrokernelTester() + .mr(3) + .nr(4) + .kr(8) + .sr(1) + .m(3) + .n(4) + .k(k) + .ks(3) + .a_offset(127) + .Test(xnn_qs8_igemm_minmax_ukernel_3x4c8__wasmsimd_ld64); + } + } + + TEST(QS8_IGEMM_MINMAX_3X4C8__WASMSIMD_LD64, zero) { + for (uint32_t mz = 0; mz < 3; mz++) { + for (size_t k = 1; k <= 40; k += 9) { + GemmMicrokernelTester() + .mr(3) + .nr(4) + .kr(8) + .sr(1) + .m(3) + .n(4) + .k(k) + .ks(3) + .a_offset(127) + .zero_index(mz) + .Test(xnn_qs8_igemm_minmax_ukernel_3x4c8__wasmsimd_ld64); + } + } + } + + TEST(QS8_IGEMM_MINMAX_3X4C8__WASMSIMD_LD64, qmin) { + GemmMicrokernelTester() + .mr(3) + .nr(4) + .kr(8) + .sr(1) + .m(3) + .n(4) + .k(8) + .qmin(128) + .Test(xnn_qs8_igemm_minmax_ukernel_3x4c8__wasmsimd_ld64); + } + + TEST(QS8_IGEMM_MINMAX_3X4C8__WASMSIMD_LD64, qmax) { + GemmMicrokernelTester() + .mr(3) + .nr(4) + .kr(8) + .sr(1) + .m(3) + .n(4) + .k(8) + .qmax(128) + .Test(xnn_qs8_igemm_minmax_ukernel_3x4c8__wasmsimd_ld64); + } + + TEST(QS8_IGEMM_MINMAX_3X4C8__WASMSIMD_LD64, strided_cm) { + GemmMicrokernelTester() + .mr(3) + .nr(4) + .kr(8) + .sr(1) + .m(3) + .n(4) + .k(8) + .cm_stride(7) + .Test(xnn_qs8_igemm_minmax_ukernel_3x4c8__wasmsimd_ld64); + } +#endif // XNN_ARCH_WASMSIMD + + +#if XNN_ARCH_WASMSIMD + TEST(QS8_IGEMM_MINMAX_1X4C8__WASMSIMD_LD128, k_eq_8) { + GemmMicrokernelTester() + .mr(1) + .nr(4) + .kr(8) + .sr(1) + .m(1) + .n(4) + .k(8) + .Test(xnn_qs8_igemm_minmax_ukernel_1x4c8__wasmsimd_ld128); + } + + TEST(QS8_IGEMM_MINMAX_1X4C8__WASMSIMD_LD128, strided_cn) { + GemmMicrokernelTester() + .mr(1) + .nr(4) + .kr(8) + .sr(1) + .m(1) + .n(4) + .k(8) + .cn_stride(7) + .Test(xnn_qs8_igemm_minmax_ukernel_1x4c8__wasmsimd_ld128); + } + + TEST(QS8_IGEMM_MINMAX_1X4C8__WASMSIMD_LD128, k_eq_8_subtile) { + for (uint32_t m = 1; m <= 1; m++) { + for (uint32_t n = 1; n <= 4; n++) { + GemmMicrokernelTester() + .mr(1) + .nr(4) + .kr(8) + .sr(1) + .m(m) + .n(n) + .k(8) + .iterations(1) + .Test(xnn_qs8_igemm_minmax_ukernel_1x4c8__wasmsimd_ld128); + } + } + } + + TEST(QS8_IGEMM_MINMAX_1X4C8__WASMSIMD_LD128, k_eq_8_subtile_m) { + for (uint32_t m = 1; m <= 1; m++) { + GemmMicrokernelTester() + .mr(1) + .nr(4) + .kr(8) + .sr(1) + .m(m) + .n(4) + .k(8) + .iterations(1) + .Test(xnn_qs8_igemm_minmax_ukernel_1x4c8__wasmsimd_ld128); + } + } + + TEST(QS8_IGEMM_MINMAX_1X4C8__WASMSIMD_LD128, k_eq_8_subtile_n) { + for (uint32_t n = 1; n <= 4; n++) { + GemmMicrokernelTester() + .mr(1) + .nr(4) + .kr(8) + .sr(1) + .m(1) + .n(n) + .k(8) + .iterations(1) + .Test(xnn_qs8_igemm_minmax_ukernel_1x4c8__wasmsimd_ld128); + } + } + + TEST(QS8_IGEMM_MINMAX_1X4C8__WASMSIMD_LD128, k_lt_8) { + for (size_t k = 1; k < 8; k++) { + GemmMicrokernelTester() + .mr(1) + .nr(4) + .kr(8) + .sr(1) + .m(1) + .n(4) + .k(k) + .Test(xnn_qs8_igemm_minmax_ukernel_1x4c8__wasmsimd_ld128); + } + } + + TEST(QS8_IGEMM_MINMAX_1X4C8__WASMSIMD_LD128, k_lt_8_subtile) { + for (size_t k = 1; k < 8; k++) { + for (uint32_t m = 1; m <= 1; m++) { + for (uint32_t n = 1; n <= 4; n++) { + GemmMicrokernelTester() + .mr(1) + .nr(4) + .kr(8) + .sr(1) + .m(m) + .n(n) + .k(k) + .iterations(1) + .Test(xnn_qs8_igemm_minmax_ukernel_1x4c8__wasmsimd_ld128); + } + } + } + } + + TEST(QS8_IGEMM_MINMAX_1X4C8__WASMSIMD_LD128, k_gt_8) { + for (size_t k = 9; k < 16; k++) { + GemmMicrokernelTester() + .mr(1) + .nr(4) + .kr(8) + .sr(1) + .m(1) + .n(4) + .k(k) + .Test(xnn_qs8_igemm_minmax_ukernel_1x4c8__wasmsimd_ld128); + } + } + + TEST(QS8_IGEMM_MINMAX_1X4C8__WASMSIMD_LD128, k_gt_8_subtile) { + for (size_t k = 9; k < 16; k++) { + for (uint32_t m = 1; m <= 1; m++) { + for (uint32_t n = 1; n <= 4; n++) { + GemmMicrokernelTester() + .mr(1) + .nr(4) + .kr(8) + .sr(1) + .m(m) + .n(n) + .k(k) + .iterations(1) + .Test(xnn_qs8_igemm_minmax_ukernel_1x4c8__wasmsimd_ld128); + } + } + } + } + + TEST(QS8_IGEMM_MINMAX_1X4C8__WASMSIMD_LD128, k_div_8) { + for (size_t k = 16; k <= 80; k += 8) { + GemmMicrokernelTester() + .mr(1) + .nr(4) + .kr(8) + .sr(1) + .m(1) + .n(4) + .k(k) + .Test(xnn_qs8_igemm_minmax_ukernel_1x4c8__wasmsimd_ld128); + } + } + + TEST(QS8_IGEMM_MINMAX_1X4C8__WASMSIMD_LD128, k_div_8_subtile) { + for (size_t k = 16; k <= 80; k += 8) { + for (uint32_t m = 1; m <= 1; m++) { + for (uint32_t n = 1; n <= 4; n++) { + GemmMicrokernelTester() + .mr(1) + .nr(4) + .kr(8) + .sr(1) + .m(m) + .n(n) + .k(k) + .iterations(1) + .Test(xnn_qs8_igemm_minmax_ukernel_1x4c8__wasmsimd_ld128); + } + } + } + } + + TEST(QS8_IGEMM_MINMAX_1X4C8__WASMSIMD_LD128, n_gt_4) { + for (uint32_t n = 5; n < 8; n++) { + for (size_t k = 1; k <= 40; k += 9) { + GemmMicrokernelTester() + .mr(1) + .nr(4) + .kr(8) + .sr(1) + .m(1) + .n(4) + .k(k) + .Test(xnn_qs8_igemm_minmax_ukernel_1x4c8__wasmsimd_ld128); + } + } + } + + TEST(QS8_IGEMM_MINMAX_1X4C8__WASMSIMD_LD128, n_gt_4_strided_cn) { + for (uint32_t n = 5; n < 8; n++) { + for (size_t k = 1; k <= 40; k += 9) { + GemmMicrokernelTester() + .mr(1) + .nr(4) + .kr(8) + .sr(1) + .m(1) + .n(4) + .k(k) + .cn_stride(7) + .Test(xnn_qs8_igemm_minmax_ukernel_1x4c8__wasmsimd_ld128); + } + } + } + + TEST(QS8_IGEMM_MINMAX_1X4C8__WASMSIMD_LD128, n_gt_4_subtile) { + for (uint32_t n = 5; n < 8; n++) { + for (size_t k = 1; k <= 40; k += 9) { + for (uint32_t m = 1; m <= 1; m++) { + GemmMicrokernelTester() + .mr(1) + .nr(4) + .kr(8) + .sr(1) + .m(m) + .n(n) + .k(k) + .iterations(1) + .Test(xnn_qs8_igemm_minmax_ukernel_1x4c8__wasmsimd_ld128); + } + } + } + } + + TEST(QS8_IGEMM_MINMAX_1X4C8__WASMSIMD_LD128, n_div_4) { + for (uint32_t n = 8; n <= 12; n += 4) { + for (size_t k = 1; k <= 40; k += 9) { + GemmMicrokernelTester() + .mr(1) + .nr(4) + .kr(8) + .sr(1) + .m(1) + .n(4) + .k(k) + .Test(xnn_qs8_igemm_minmax_ukernel_1x4c8__wasmsimd_ld128); + } + } + } + + TEST(QS8_IGEMM_MINMAX_1X4C8__WASMSIMD_LD128, n_div_4_strided_cn) { + for (uint32_t n = 8; n <= 12; n += 4) { + for (size_t k = 1; k <= 40; k += 9) { + GemmMicrokernelTester() + .mr(1) + .nr(4) + .kr(8) + .sr(1) + .m(1) + .n(n) + .k(k) + .cn_stride(7) + .Test(xnn_qs8_igemm_minmax_ukernel_1x4c8__wasmsimd_ld128); + } + } + } + + TEST(QS8_IGEMM_MINMAX_1X4C8__WASMSIMD_LD128, n_div_4_subtile) { + for (uint32_t n = 8; n <= 12; n += 4) { + for (size_t k = 1; k <= 40; k += 9) { + for (uint32_t m = 1; m <= 1; m++) { + GemmMicrokernelTester() + .mr(1) + .nr(4) + .kr(8) + .sr(1) + .m(m) + .n(n) + .k(k) + .iterations(1) + .Test(xnn_qs8_igemm_minmax_ukernel_1x4c8__wasmsimd_ld128); + } + } + } + } + + TEST(QS8_IGEMM_MINMAX_1X4C8__WASMSIMD_LD128, small_kernel) { + for (size_t k = 1; k <= 40; k += 9) { + GemmMicrokernelTester() + .mr(1) + .nr(4) + .kr(8) + .sr(1) + .m(1) + .n(4) + .k(k) + .ks(3) + .Test(xnn_qs8_igemm_minmax_ukernel_1x4c8__wasmsimd_ld128); + } + } + + TEST(QS8_IGEMM_MINMAX_1X4C8__WASMSIMD_LD128, small_kernel_subtile) { + for (size_t k = 1; k <= 40; k += 9) { + for (uint32_t m = 1; m <= 1; m++) { + for (uint32_t n = 1; n <= 4; n++) { + GemmMicrokernelTester() + .mr(1) + .nr(4) + .kr(8) + .sr(1) + .m(m) + .n(n) + .k(k) + .ks(3) + .iterations(1) + .Test(xnn_qs8_igemm_minmax_ukernel_1x4c8__wasmsimd_ld128); + } + } + } + } + + TEST(QS8_IGEMM_MINMAX_1X4C8__WASMSIMD_LD128, n_gt_4_small_kernel) { + for (uint32_t n = 5; n < 8; n++) { + for (size_t k = 1; k <= 40; k += 9) { + GemmMicrokernelTester() + .mr(1) + .nr(4) + .kr(8) + .sr(1) + .m(1) + .n(4) + .k(k) + .ks(3) + .Test(xnn_qs8_igemm_minmax_ukernel_1x4c8__wasmsimd_ld128); + } + } + } + + TEST(QS8_IGEMM_MINMAX_1X4C8__WASMSIMD_LD128, n_div_4_small_kernel) { + for (uint32_t n = 8; n <= 12; n += 4) { + for (size_t k = 1; k <= 40; k += 9) { + GemmMicrokernelTester() + .mr(1) + .nr(4) + .kr(8) + .sr(1) + .m(1) + .n(4) + .k(k) + .ks(3) + .Test(xnn_qs8_igemm_minmax_ukernel_1x4c8__wasmsimd_ld128); + } + } + } + + TEST(QS8_IGEMM_MINMAX_1X4C8__WASMSIMD_LD128, strided_cm_subtile) { + for (size_t k = 1; k <= 40; k += 9) { + for (uint32_t m = 1; m <= 1; m++) { + for (uint32_t n = 1; n <= 4; n++) { + GemmMicrokernelTester() + .mr(1) + .nr(4) + .kr(8) + .sr(1) + .m(m) + .n(n) + .k(k) + .cm_stride(7) + .iterations(1) + .Test(xnn_qs8_igemm_minmax_ukernel_1x4c8__wasmsimd_ld128); + } + } + } + } + + TEST(QS8_IGEMM_MINMAX_1X4C8__WASMSIMD_LD128, a_offset) { + for (size_t k = 1; k <= 40; k += 9) { + GemmMicrokernelTester() + .mr(1) + .nr(4) + .kr(8) + .sr(1) + .m(1) + .n(4) + .k(k) + .ks(3) + .a_offset(43) + .Test(xnn_qs8_igemm_minmax_ukernel_1x4c8__wasmsimd_ld128); + } + } + + TEST(QS8_IGEMM_MINMAX_1X4C8__WASMSIMD_LD128, zero) { + for (uint32_t mz = 0; mz < 1; mz++) { + for (size_t k = 1; k <= 40; k += 9) { + GemmMicrokernelTester() + .mr(1) + .nr(4) + .kr(8) + .sr(1) + .m(1) + .n(4) + .k(k) + .ks(3) + .a_offset(43) + .zero_index(mz) + .Test(xnn_qs8_igemm_minmax_ukernel_1x4c8__wasmsimd_ld128); + } + } + } + + TEST(QS8_IGEMM_MINMAX_1X4C8__WASMSIMD_LD128, qmin) { + GemmMicrokernelTester() + .mr(1) + .nr(4) + .kr(8) + .sr(1) + .m(1) + .n(4) + .k(8) + .qmin(128) + .Test(xnn_qs8_igemm_minmax_ukernel_1x4c8__wasmsimd_ld128); + } + + TEST(QS8_IGEMM_MINMAX_1X4C8__WASMSIMD_LD128, qmax) { + GemmMicrokernelTester() + .mr(1) + .nr(4) + .kr(8) + .sr(1) + .m(1) + .n(4) + .k(8) + .qmax(128) + .Test(xnn_qs8_igemm_minmax_ukernel_1x4c8__wasmsimd_ld128); + } + + TEST(QS8_IGEMM_MINMAX_1X4C8__WASMSIMD_LD128, strided_cm) { + GemmMicrokernelTester() + .mr(1) + .nr(4) + .kr(8) + .sr(1) + .m(1) + .n(4) + .k(8) + .cm_stride(7) + .Test(xnn_qs8_igemm_minmax_ukernel_1x4c8__wasmsimd_ld128); + } +#endif // XNN_ARCH_WASMSIMD + + +#if XNN_ARCH_WASMSIMD + TEST(QS8_IGEMM_MINMAX_2X4C8__WASMSIMD_LD128, k_eq_8) { + GemmMicrokernelTester() + .mr(2) + .nr(4) + .kr(8) + .sr(1) + .m(2) + .n(4) + .k(8) + .Test(xnn_qs8_igemm_minmax_ukernel_2x4c8__wasmsimd_ld128); + } + + TEST(QS8_IGEMM_MINMAX_2X4C8__WASMSIMD_LD128, strided_cn) { + GemmMicrokernelTester() + .mr(2) + .nr(4) + .kr(8) + .sr(1) + .m(2) + .n(4) + .k(8) + .cn_stride(7) + .Test(xnn_qs8_igemm_minmax_ukernel_2x4c8__wasmsimd_ld128); + } + + TEST(QS8_IGEMM_MINMAX_2X4C8__WASMSIMD_LD128, k_eq_8_subtile) { + for (uint32_t m = 1; m <= 2; m++) { + for (uint32_t n = 1; n <= 4; n++) { + GemmMicrokernelTester() + .mr(2) + .nr(4) + .kr(8) + .sr(1) + .m(m) + .n(n) + .k(8) + .iterations(1) + .Test(xnn_qs8_igemm_minmax_ukernel_2x4c8__wasmsimd_ld128); + } + } + } + + TEST(QS8_IGEMM_MINMAX_2X4C8__WASMSIMD_LD128, k_eq_8_subtile_m) { + for (uint32_t m = 1; m <= 2; m++) { + GemmMicrokernelTester() + .mr(2) + .nr(4) + .kr(8) + .sr(1) + .m(m) + .n(4) + .k(8) + .iterations(1) + .Test(xnn_qs8_igemm_minmax_ukernel_2x4c8__wasmsimd_ld128); + } + } + + TEST(QS8_IGEMM_MINMAX_2X4C8__WASMSIMD_LD128, k_eq_8_subtile_n) { + for (uint32_t n = 1; n <= 4; n++) { + GemmMicrokernelTester() + .mr(2) + .nr(4) + .kr(8) + .sr(1) + .m(2) + .n(n) + .k(8) + .iterations(1) + .Test(xnn_qs8_igemm_minmax_ukernel_2x4c8__wasmsimd_ld128); + } + } + + TEST(QS8_IGEMM_MINMAX_2X4C8__WASMSIMD_LD128, k_lt_8) { + for (size_t k = 1; k < 8; k++) { + GemmMicrokernelTester() + .mr(2) + .nr(4) + .kr(8) + .sr(1) + .m(2) + .n(4) + .k(k) + .Test(xnn_qs8_igemm_minmax_ukernel_2x4c8__wasmsimd_ld128); + } + } + + TEST(QS8_IGEMM_MINMAX_2X4C8__WASMSIMD_LD128, k_lt_8_subtile) { + for (size_t k = 1; k < 8; k++) { + for (uint32_t m = 1; m <= 2; m++) { + for (uint32_t n = 1; n <= 4; n++) { + GemmMicrokernelTester() + .mr(2) + .nr(4) + .kr(8) + .sr(1) + .m(m) + .n(n) + .k(k) + .iterations(1) + .Test(xnn_qs8_igemm_minmax_ukernel_2x4c8__wasmsimd_ld128); + } + } + } + } + + TEST(QS8_IGEMM_MINMAX_2X4C8__WASMSIMD_LD128, k_gt_8) { + for (size_t k = 9; k < 16; k++) { + GemmMicrokernelTester() + .mr(2) + .nr(4) + .kr(8) + .sr(1) + .m(2) + .n(4) + .k(k) + .Test(xnn_qs8_igemm_minmax_ukernel_2x4c8__wasmsimd_ld128); + } + } + + TEST(QS8_IGEMM_MINMAX_2X4C8__WASMSIMD_LD128, k_gt_8_subtile) { + for (size_t k = 9; k < 16; k++) { + for (uint32_t m = 1; m <= 2; m++) { + for (uint32_t n = 1; n <= 4; n++) { + GemmMicrokernelTester() + .mr(2) + .nr(4) + .kr(8) + .sr(1) + .m(m) + .n(n) + .k(k) + .iterations(1) + .Test(xnn_qs8_igemm_minmax_ukernel_2x4c8__wasmsimd_ld128); + } + } + } + } + + TEST(QS8_IGEMM_MINMAX_2X4C8__WASMSIMD_LD128, k_div_8) { + for (size_t k = 16; k <= 80; k += 8) { + GemmMicrokernelTester() + .mr(2) + .nr(4) + .kr(8) + .sr(1) + .m(2) + .n(4) + .k(k) + .Test(xnn_qs8_igemm_minmax_ukernel_2x4c8__wasmsimd_ld128); + } + } + + TEST(QS8_IGEMM_MINMAX_2X4C8__WASMSIMD_LD128, k_div_8_subtile) { + for (size_t k = 16; k <= 80; k += 8) { + for (uint32_t m = 1; m <= 2; m++) { + for (uint32_t n = 1; n <= 4; n++) { + GemmMicrokernelTester() + .mr(2) + .nr(4) + .kr(8) + .sr(1) + .m(m) + .n(n) + .k(k) + .iterations(1) + .Test(xnn_qs8_igemm_minmax_ukernel_2x4c8__wasmsimd_ld128); + } + } + } + } + + TEST(QS8_IGEMM_MINMAX_2X4C8__WASMSIMD_LD128, n_gt_4) { + for (uint32_t n = 5; n < 8; n++) { + for (size_t k = 1; k <= 40; k += 9) { + GemmMicrokernelTester() + .mr(2) + .nr(4) + .kr(8) + .sr(1) + .m(2) + .n(4) + .k(k) + .Test(xnn_qs8_igemm_minmax_ukernel_2x4c8__wasmsimd_ld128); + } + } + } + + TEST(QS8_IGEMM_MINMAX_2X4C8__WASMSIMD_LD128, n_gt_4_strided_cn) { + for (uint32_t n = 5; n < 8; n++) { + for (size_t k = 1; k <= 40; k += 9) { + GemmMicrokernelTester() + .mr(2) + .nr(4) + .kr(8) + .sr(1) + .m(2) + .n(4) + .k(k) + .cn_stride(7) + .Test(xnn_qs8_igemm_minmax_ukernel_2x4c8__wasmsimd_ld128); + } + } + } + + TEST(QS8_IGEMM_MINMAX_2X4C8__WASMSIMD_LD128, n_gt_4_subtile) { + for (uint32_t n = 5; n < 8; n++) { + for (size_t k = 1; k <= 40; k += 9) { + for (uint32_t m = 1; m <= 2; m++) { + GemmMicrokernelTester() + .mr(2) + .nr(4) + .kr(8) + .sr(1) + .m(m) + .n(n) + .k(k) + .iterations(1) + .Test(xnn_qs8_igemm_minmax_ukernel_2x4c8__wasmsimd_ld128); + } + } + } + } + + TEST(QS8_IGEMM_MINMAX_2X4C8__WASMSIMD_LD128, n_div_4) { + for (uint32_t n = 8; n <= 12; n += 4) { + for (size_t k = 1; k <= 40; k += 9) { + GemmMicrokernelTester() + .mr(2) + .nr(4) + .kr(8) + .sr(1) + .m(2) + .n(4) + .k(k) + .Test(xnn_qs8_igemm_minmax_ukernel_2x4c8__wasmsimd_ld128); + } + } + } + + TEST(QS8_IGEMM_MINMAX_2X4C8__WASMSIMD_LD128, n_div_4_strided_cn) { + for (uint32_t n = 8; n <= 12; n += 4) { + for (size_t k = 1; k <= 40; k += 9) { + GemmMicrokernelTester() + .mr(2) + .nr(4) + .kr(8) + .sr(1) + .m(2) + .n(n) + .k(k) + .cn_stride(7) + .Test(xnn_qs8_igemm_minmax_ukernel_2x4c8__wasmsimd_ld128); + } + } + } + + TEST(QS8_IGEMM_MINMAX_2X4C8__WASMSIMD_LD128, n_div_4_subtile) { + for (uint32_t n = 8; n <= 12; n += 4) { + for (size_t k = 1; k <= 40; k += 9) { + for (uint32_t m = 1; m <= 2; m++) { + GemmMicrokernelTester() + .mr(2) + .nr(4) + .kr(8) + .sr(1) + .m(m) + .n(n) + .k(k) + .iterations(1) + .Test(xnn_qs8_igemm_minmax_ukernel_2x4c8__wasmsimd_ld128); + } + } + } + } + + TEST(QS8_IGEMM_MINMAX_2X4C8__WASMSIMD_LD128, small_kernel) { + for (size_t k = 1; k <= 40; k += 9) { + GemmMicrokernelTester() + .mr(2) + .nr(4) + .kr(8) + .sr(1) + .m(2) + .n(4) + .k(k) + .ks(3) + .Test(xnn_qs8_igemm_minmax_ukernel_2x4c8__wasmsimd_ld128); + } + } + + TEST(QS8_IGEMM_MINMAX_2X4C8__WASMSIMD_LD128, small_kernel_subtile) { + for (size_t k = 1; k <= 40; k += 9) { + for (uint32_t m = 1; m <= 2; m++) { + for (uint32_t n = 1; n <= 4; n++) { + GemmMicrokernelTester() + .mr(2) + .nr(4) + .kr(8) + .sr(1) + .m(m) + .n(n) + .k(k) + .ks(3) + .iterations(1) + .Test(xnn_qs8_igemm_minmax_ukernel_2x4c8__wasmsimd_ld128); + } + } + } + } + + TEST(QS8_IGEMM_MINMAX_2X4C8__WASMSIMD_LD128, n_gt_4_small_kernel) { + for (uint32_t n = 5; n < 8; n++) { + for (size_t k = 1; k <= 40; k += 9) { + GemmMicrokernelTester() + .mr(2) + .nr(4) + .kr(8) + .sr(1) + .m(2) + .n(4) + .k(k) + .ks(3) + .Test(xnn_qs8_igemm_minmax_ukernel_2x4c8__wasmsimd_ld128); + } + } + } + + TEST(QS8_IGEMM_MINMAX_2X4C8__WASMSIMD_LD128, n_div_4_small_kernel) { + for (uint32_t n = 8; n <= 12; n += 4) { + for (size_t k = 1; k <= 40; k += 9) { + GemmMicrokernelTester() + .mr(2) + .nr(4) + .kr(8) + .sr(1) + .m(2) + .n(4) + .k(k) + .ks(3) + .Test(xnn_qs8_igemm_minmax_ukernel_2x4c8__wasmsimd_ld128); + } + } + } + + TEST(QS8_IGEMM_MINMAX_2X4C8__WASMSIMD_LD128, strided_cm_subtile) { + for (size_t k = 1; k <= 40; k += 9) { + for (uint32_t m = 1; m <= 2; m++) { + for (uint32_t n = 1; n <= 4; n++) { + GemmMicrokernelTester() + .mr(2) + .nr(4) + .kr(8) + .sr(1) + .m(m) + .n(n) + .k(k) + .cm_stride(7) + .iterations(1) + .Test(xnn_qs8_igemm_minmax_ukernel_2x4c8__wasmsimd_ld128); + } + } + } + } + + TEST(QS8_IGEMM_MINMAX_2X4C8__WASMSIMD_LD128, a_offset) { + for (size_t k = 1; k <= 40; k += 9) { + GemmMicrokernelTester() + .mr(2) + .nr(4) + .kr(8) + .sr(1) + .m(2) + .n(4) + .k(k) + .ks(3) + .a_offset(83) + .Test(xnn_qs8_igemm_minmax_ukernel_2x4c8__wasmsimd_ld128); + } + } + + TEST(QS8_IGEMM_MINMAX_2X4C8__WASMSIMD_LD128, zero) { + for (uint32_t mz = 0; mz < 2; mz++) { + for (size_t k = 1; k <= 40; k += 9) { + GemmMicrokernelTester() + .mr(2) + .nr(4) + .kr(8) + .sr(1) + .m(2) + .n(4) + .k(k) + .ks(3) + .a_offset(83) + .zero_index(mz) + .Test(xnn_qs8_igemm_minmax_ukernel_2x4c8__wasmsimd_ld128); + } + } + } + + TEST(QS8_IGEMM_MINMAX_2X4C8__WASMSIMD_LD128, qmin) { + GemmMicrokernelTester() + .mr(2) + .nr(4) + .kr(8) + .sr(1) + .m(2) + .n(4) + .k(8) + .qmin(128) + .Test(xnn_qs8_igemm_minmax_ukernel_2x4c8__wasmsimd_ld128); + } + + TEST(QS8_IGEMM_MINMAX_2X4C8__WASMSIMD_LD128, qmax) { + GemmMicrokernelTester() + .mr(2) + .nr(4) + .kr(8) + .sr(1) + .m(2) + .n(4) + .k(8) + .qmax(128) + .Test(xnn_qs8_igemm_minmax_ukernel_2x4c8__wasmsimd_ld128); + } + + TEST(QS8_IGEMM_MINMAX_2X4C8__WASMSIMD_LD128, strided_cm) { + GemmMicrokernelTester() + .mr(2) + .nr(4) + .kr(8) + .sr(1) + .m(2) + .n(4) + .k(8) + .cm_stride(7) + .Test(xnn_qs8_igemm_minmax_ukernel_2x4c8__wasmsimd_ld128); + } +#endif // XNN_ARCH_WASMSIMD + + +#if XNN_ARCH_WASMSIMD + TEST(QS8_IGEMM_MINMAX_3X4C8__WASMSIMD_LD128, k_eq_8) { + GemmMicrokernelTester() + .mr(3) + .nr(4) + .kr(8) + .sr(1) + .m(3) + .n(4) + .k(8) + .Test(xnn_qs8_igemm_minmax_ukernel_3x4c8__wasmsimd_ld128); + } + + TEST(QS8_IGEMM_MINMAX_3X4C8__WASMSIMD_LD128, strided_cn) { + GemmMicrokernelTester() + .mr(3) + .nr(4) + .kr(8) + .sr(1) + .m(3) + .n(4) + .k(8) + .cn_stride(7) + .Test(xnn_qs8_igemm_minmax_ukernel_3x4c8__wasmsimd_ld128); + } + + TEST(QS8_IGEMM_MINMAX_3X4C8__WASMSIMD_LD128, k_eq_8_subtile) { + for (uint32_t m = 1; m <= 3; m++) { + for (uint32_t n = 1; n <= 4; n++) { + GemmMicrokernelTester() + .mr(3) + .nr(4) + .kr(8) + .sr(1) + .m(m) + .n(n) + .k(8) + .iterations(1) + .Test(xnn_qs8_igemm_minmax_ukernel_3x4c8__wasmsimd_ld128); + } + } + } + + TEST(QS8_IGEMM_MINMAX_3X4C8__WASMSIMD_LD128, k_eq_8_subtile_m) { + for (uint32_t m = 1; m <= 3; m++) { + GemmMicrokernelTester() + .mr(3) + .nr(4) + .kr(8) + .sr(1) + .m(m) + .n(4) + .k(8) + .iterations(1) + .Test(xnn_qs8_igemm_minmax_ukernel_3x4c8__wasmsimd_ld128); + } + } + + TEST(QS8_IGEMM_MINMAX_3X4C8__WASMSIMD_LD128, k_eq_8_subtile_n) { + for (uint32_t n = 1; n <= 4; n++) { + GemmMicrokernelTester() + .mr(3) + .nr(4) + .kr(8) + .sr(1) + .m(3) + .n(n) + .k(8) + .iterations(1) + .Test(xnn_qs8_igemm_minmax_ukernel_3x4c8__wasmsimd_ld128); + } + } + + TEST(QS8_IGEMM_MINMAX_3X4C8__WASMSIMD_LD128, k_lt_8) { + for (size_t k = 1; k < 8; k++) { + GemmMicrokernelTester() + .mr(3) + .nr(4) + .kr(8) + .sr(1) + .m(3) + .n(4) + .k(k) + .Test(xnn_qs8_igemm_minmax_ukernel_3x4c8__wasmsimd_ld128); + } + } + + TEST(QS8_IGEMM_MINMAX_3X4C8__WASMSIMD_LD128, k_lt_8_subtile) { + for (size_t k = 1; k < 8; k++) { + for (uint32_t m = 1; m <= 3; m++) { + for (uint32_t n = 1; n <= 4; n++) { + GemmMicrokernelTester() + .mr(3) + .nr(4) + .kr(8) + .sr(1) + .m(m) + .n(n) + .k(k) + .iterations(1) + .Test(xnn_qs8_igemm_minmax_ukernel_3x4c8__wasmsimd_ld128); + } + } + } + } + + TEST(QS8_IGEMM_MINMAX_3X4C8__WASMSIMD_LD128, k_gt_8) { + for (size_t k = 9; k < 16; k++) { + GemmMicrokernelTester() + .mr(3) + .nr(4) + .kr(8) + .sr(1) + .m(3) + .n(4) + .k(k) + .Test(xnn_qs8_igemm_minmax_ukernel_3x4c8__wasmsimd_ld128); + } + } + + TEST(QS8_IGEMM_MINMAX_3X4C8__WASMSIMD_LD128, k_gt_8_subtile) { + for (size_t k = 9; k < 16; k++) { + for (uint32_t m = 1; m <= 3; m++) { + for (uint32_t n = 1; n <= 4; n++) { + GemmMicrokernelTester() + .mr(3) + .nr(4) + .kr(8) + .sr(1) + .m(m) + .n(n) + .k(k) + .iterations(1) + .Test(xnn_qs8_igemm_minmax_ukernel_3x4c8__wasmsimd_ld128); + } + } + } + } + + TEST(QS8_IGEMM_MINMAX_3X4C8__WASMSIMD_LD128, k_div_8) { + for (size_t k = 16; k <= 80; k += 8) { + GemmMicrokernelTester() + .mr(3) + .nr(4) + .kr(8) + .sr(1) + .m(3) + .n(4) + .k(k) + .Test(xnn_qs8_igemm_minmax_ukernel_3x4c8__wasmsimd_ld128); + } + } + + TEST(QS8_IGEMM_MINMAX_3X4C8__WASMSIMD_LD128, k_div_8_subtile) { + for (size_t k = 16; k <= 80; k += 8) { + for (uint32_t m = 1; m <= 3; m++) { + for (uint32_t n = 1; n <= 4; n++) { + GemmMicrokernelTester() + .mr(3) + .nr(4) + .kr(8) + .sr(1) + .m(m) + .n(n) + .k(k) + .iterations(1) + .Test(xnn_qs8_igemm_minmax_ukernel_3x4c8__wasmsimd_ld128); + } + } + } + } + + TEST(QS8_IGEMM_MINMAX_3X4C8__WASMSIMD_LD128, n_gt_4) { + for (uint32_t n = 5; n < 8; n++) { + for (size_t k = 1; k <= 40; k += 9) { + GemmMicrokernelTester() + .mr(3) + .nr(4) + .kr(8) + .sr(1) + .m(3) + .n(4) + .k(k) + .Test(xnn_qs8_igemm_minmax_ukernel_3x4c8__wasmsimd_ld128); + } + } + } + + TEST(QS8_IGEMM_MINMAX_3X4C8__WASMSIMD_LD128, n_gt_4_strided_cn) { + for (uint32_t n = 5; n < 8; n++) { + for (size_t k = 1; k <= 40; k += 9) { + GemmMicrokernelTester() + .mr(3) + .nr(4) + .kr(8) + .sr(1) + .m(3) + .n(4) + .k(k) + .cn_stride(7) + .Test(xnn_qs8_igemm_minmax_ukernel_3x4c8__wasmsimd_ld128); + } + } + } + + TEST(QS8_IGEMM_MINMAX_3X4C8__WASMSIMD_LD128, n_gt_4_subtile) { + for (uint32_t n = 5; n < 8; n++) { + for (size_t k = 1; k <= 40; k += 9) { + for (uint32_t m = 1; m <= 3; m++) { + GemmMicrokernelTester() + .mr(3) + .nr(4) + .kr(8) + .sr(1) + .m(m) + .n(n) + .k(k) + .iterations(1) + .Test(xnn_qs8_igemm_minmax_ukernel_3x4c8__wasmsimd_ld128); + } + } + } + } + + TEST(QS8_IGEMM_MINMAX_3X4C8__WASMSIMD_LD128, n_div_4) { + for (uint32_t n = 8; n <= 12; n += 4) { + for (size_t k = 1; k <= 40; k += 9) { + GemmMicrokernelTester() + .mr(3) + .nr(4) + .kr(8) + .sr(1) + .m(3) + .n(4) + .k(k) + .Test(xnn_qs8_igemm_minmax_ukernel_3x4c8__wasmsimd_ld128); + } + } + } + + TEST(QS8_IGEMM_MINMAX_3X4C8__WASMSIMD_LD128, n_div_4_strided_cn) { + for (uint32_t n = 8; n <= 12; n += 4) { + for (size_t k = 1; k <= 40; k += 9) { + GemmMicrokernelTester() + .mr(3) + .nr(4) + .kr(8) + .sr(1) + .m(3) + .n(n) + .k(k) + .cn_stride(7) + .Test(xnn_qs8_igemm_minmax_ukernel_3x4c8__wasmsimd_ld128); + } + } + } + + TEST(QS8_IGEMM_MINMAX_3X4C8__WASMSIMD_LD128, n_div_4_subtile) { + for (uint32_t n = 8; n <= 12; n += 4) { + for (size_t k = 1; k <= 40; k += 9) { + for (uint32_t m = 1; m <= 3; m++) { + GemmMicrokernelTester() + .mr(3) + .nr(4) + .kr(8) + .sr(1) + .m(m) + .n(n) + .k(k) + .iterations(1) + .Test(xnn_qs8_igemm_minmax_ukernel_3x4c8__wasmsimd_ld128); + } + } + } + } + + TEST(QS8_IGEMM_MINMAX_3X4C8__WASMSIMD_LD128, small_kernel) { + for (size_t k = 1; k <= 40; k += 9) { + GemmMicrokernelTester() + .mr(3) + .nr(4) + .kr(8) + .sr(1) + .m(3) + .n(4) + .k(k) + .ks(3) + .Test(xnn_qs8_igemm_minmax_ukernel_3x4c8__wasmsimd_ld128); + } + } + + TEST(QS8_IGEMM_MINMAX_3X4C8__WASMSIMD_LD128, small_kernel_subtile) { + for (size_t k = 1; k <= 40; k += 9) { + for (uint32_t m = 1; m <= 3; m++) { + for (uint32_t n = 1; n <= 4; n++) { + GemmMicrokernelTester() + .mr(3) + .nr(4) + .kr(8) + .sr(1) + .m(m) + .n(n) + .k(k) + .ks(3) + .iterations(1) + .Test(xnn_qs8_igemm_minmax_ukernel_3x4c8__wasmsimd_ld128); + } + } + } + } + + TEST(QS8_IGEMM_MINMAX_3X4C8__WASMSIMD_LD128, n_gt_4_small_kernel) { + for (uint32_t n = 5; n < 8; n++) { + for (size_t k = 1; k <= 40; k += 9) { + GemmMicrokernelTester() + .mr(3) + .nr(4) + .kr(8) + .sr(1) + .m(3) + .n(4) + .k(k) + .ks(3) + .Test(xnn_qs8_igemm_minmax_ukernel_3x4c8__wasmsimd_ld128); + } + } + } + + TEST(QS8_IGEMM_MINMAX_3X4C8__WASMSIMD_LD128, n_div_4_small_kernel) { + for (uint32_t n = 8; n <= 12; n += 4) { + for (size_t k = 1; k <= 40; k += 9) { + GemmMicrokernelTester() + .mr(3) + .nr(4) + .kr(8) + .sr(1) + .m(3) + .n(4) + .k(k) + .ks(3) + .Test(xnn_qs8_igemm_minmax_ukernel_3x4c8__wasmsimd_ld128); + } + } + } + + TEST(QS8_IGEMM_MINMAX_3X4C8__WASMSIMD_LD128, strided_cm_subtile) { + for (size_t k = 1; k <= 40; k += 9) { + for (uint32_t m = 1; m <= 3; m++) { + for (uint32_t n = 1; n <= 4; n++) { + GemmMicrokernelTester() + .mr(3) + .nr(4) + .kr(8) + .sr(1) + .m(m) + .n(n) + .k(k) + .cm_stride(7) + .iterations(1) + .Test(xnn_qs8_igemm_minmax_ukernel_3x4c8__wasmsimd_ld128); + } + } + } + } + + TEST(QS8_IGEMM_MINMAX_3X4C8__WASMSIMD_LD128, a_offset) { + for (size_t k = 1; k <= 40; k += 9) { + GemmMicrokernelTester() + .mr(3) + .nr(4) + .kr(8) + .sr(1) + .m(3) + .n(4) + .k(k) + .ks(3) + .a_offset(127) + .Test(xnn_qs8_igemm_minmax_ukernel_3x4c8__wasmsimd_ld128); + } + } + + TEST(QS8_IGEMM_MINMAX_3X4C8__WASMSIMD_LD128, zero) { + for (uint32_t mz = 0; mz < 3; mz++) { + for (size_t k = 1; k <= 40; k += 9) { + GemmMicrokernelTester() + .mr(3) + .nr(4) + .kr(8) + .sr(1) + .m(3) + .n(4) + .k(k) + .ks(3) + .a_offset(127) + .zero_index(mz) + .Test(xnn_qs8_igemm_minmax_ukernel_3x4c8__wasmsimd_ld128); + } + } + } + + TEST(QS8_IGEMM_MINMAX_3X4C8__WASMSIMD_LD128, qmin) { + GemmMicrokernelTester() + .mr(3) + .nr(4) + .kr(8) + .sr(1) + .m(3) + .n(4) + .k(8) + .qmin(128) + .Test(xnn_qs8_igemm_minmax_ukernel_3x4c8__wasmsimd_ld128); + } + + TEST(QS8_IGEMM_MINMAX_3X4C8__WASMSIMD_LD128, qmax) { + GemmMicrokernelTester() + .mr(3) + .nr(4) + .kr(8) + .sr(1) + .m(3) + .n(4) + .k(8) + .qmax(128) + .Test(xnn_qs8_igemm_minmax_ukernel_3x4c8__wasmsimd_ld128); + } + + TEST(QS8_IGEMM_MINMAX_3X4C8__WASMSIMD_LD128, strided_cm) { + GemmMicrokernelTester() + .mr(3) + .nr(4) + .kr(8) + .sr(1) + .m(3) + .n(4) + .k(8) + .cm_stride(7) + .Test(xnn_qs8_igemm_minmax_ukernel_3x4c8__wasmsimd_ld128); + } +#endif // XNN_ARCH_WASMSIMD diff --git a/test/qs8-igemm-minmax.yaml b/test/qs8-igemm-minmax.yaml index 930b4ee8c..bede5a28e 100644 --- a/test/qs8-igemm-minmax.yaml +++ b/test/qs8-igemm-minmax.yaml @@ -96,3 +96,15 @@ k-block: 8 - name: xnn_qs8_igemm_minmax_ukernel_3x8c8__avx2 k-block: 8 +- name: xnn_qs8_igemm_minmax_ukernel_1x4c8__wasmsimd_ld64 + k-block: 8 +- name: xnn_qs8_igemm_minmax_ukernel_2x4c8__wasmsimd_ld64 + k-block: 8 +- name: xnn_qs8_igemm_minmax_ukernel_3x4c8__wasmsimd_ld64 + k-block: 8 +- name: xnn_qs8_igemm_minmax_ukernel_1x4c8__wasmsimd_ld128 + k-block: 8 +- name: xnn_qs8_igemm_minmax_ukernel_2x4c8__wasmsimd_ld128 + k-block: 8 +- name: xnn_qs8_igemm_minmax_ukernel_3x4c8__wasmsimd_ld128 + k-block: 8 |