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path: root/src/f32-dwconv2d-chw
AgeCommit message (Expand)Author
2021-12-13Disable MSan and TSan in most microkernels with Out-of-Bounds readsMarat Dukhan
2021-09-20Leverage f32x4.pmin and f32x4.pmax WAsm SIMD instructionsMarat Dukhan
2021-08-31Leverage v128.const WAsm SIMD instructionMarat Dukhan
2021-08-05Unify on wasm_f64x2_spalt(0.0) to materialize zero SIMD vector in WAsmMarat Dukhan
2021-06-30Replace deprecated wasm_simd128.h intrinsics with new versionsMarat Dukhan
2021-02-13Add space after castingFrank Barchard
2020-12-21WebAssembly DWConv2D 3x3 stride 2 loadsplatFrank Barchard
2020-12-21WebAssembly DWConv2D 5x5 stride 2 loadsplatFrank Barchard
2020-12-15WebAssembly DWConv2D 3x3p1 adapted from NEONFrank Barchard
2020-12-15WASMSIMD dwconv2d 5x5p2 use loadsplatFrank Barchard
2020-12-14WASMSIMD dwconv2d chw 3x3p1 replace loadsplat with vector load and shuffleFrank Barchard
2020-12-11Rename WASMSIMD dwconv2d functions to splat or loadsplatFrank Barchard
2020-12-07Simplify constant expressions in WAsm SIMD DWConv CHWFrank Barchard
2020-12-04WebAssembly SIMD DWConv2D 3x3 stride-2 adapted from NEONFrank Barchard
2020-12-03WebAssembly SIMD DWConv2D 5x5 stride 2 adapted from NEONFrank Barchard
2020-12-03dwconv2d_chw_ukernel_5x5p2__wasmsimd simplify shuffle expressions to a constant.Frank Barchard
2020-12-03Remove code generator for old 5x5p2Frank Barchard
2020-11-30Web Assemble DWConv2D f32_dwconv2d_chw_ukernel_5x5p2__wasmsimd adapted from NeonFrank Barchard
2020-11-23Minor improvements to WAsm SIMD version of DWCONV2D CHWFrank Barchard
2020-11-22WAsm SIMD version of DWCONV2D CHW 3x3p1Frank Barchard
2020-11-18dwconv wasm remove shuffle wrappers.Frank Barchard
2020-11-16WasmSIMD dwconv2d generate x86 optimized version.Frank Barchard
2020-11-16Replace DWConv2D PSIMD with WAsm SIMD.Frank Barchard
2020-10-30SSE variant of 5x5s2 DWCONV CHW micro-kernelsMarat Dukhan
2020-10-30SSE variants of 5x5 DWCONV CHW micro-kernelsMarat Dukhan
2020-10-29Auto-generate 5x5s2 DWCONV CHW micro-kernelsMarat Dukhan
2020-10-28Auto-generate 5x5s2p2 DWCONV CHW micro-kernelsMarat Dukhan
2020-10-26Auto-generate NEON 5x5p2 DWCONV micro-kernelsMarat Dukhan
2020-10-25Auto-generate scalar 5x5p2 DWCONV CHW micro-kernelsMarat Dukhan
2020-10-25Auto-generate scalar versions of DWCONV2D CHW 3x3s2p1 micro-kernelsMarat Dukhan
2020-10-25Auto-generate NEON/NEONFMA versions of DWCONV2D CHW 3x3s2p1 micro-kernelsMarat Dukhan
2020-10-25Auto-generate SSE versions of DWCONV2D CHW 3x3s2p1 micro-kernelsMarat Dukhan
2020-10-24Auto-generate scalar versions of DWCONV2D CHW 3x3p1 micro-kernelsMarat Dukhan
2020-10-24NEON versions of DWCONV2D CHW 3x3p1 micro-kernelsMarat Dukhan
2020-10-24Auto-generate AArch64 NEONFMA versions of DWCONV2D CHW 3x3p1 micro-kernelsMarat Dukhan
2020-10-23SSSE3 versions of DWCONV2D CHW 3x3p1 micro-kernelsMarat Dukhan
2020-10-23Auto-generate SSE versions of DWCONV2D CHW 3x3p1 micro-kernelsMarat Dukhan
2020-10-23Rename DWCONV CHW microkernels to DWCONV2D CHWMarat Dukhan
generated by cgit v1.2.3 (git 2.25.1) at 2024-07-15 21:06:03 +0000