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AgeCommit message (Expand)Author
2022-08-03Add vld2_r to AArch32 assembler, this will be used later for fused operations.Zhi An Ng
2022-08-02Add some AArch32 assembler instructionsZhi An Ng
2022-07-21Add some AArch64 assemblers methodsZhi An Ng
2022-07-21Add ld3r to AArch64 assemblerZhi An Ng
2022-04-13Implement str (pre-indexed and offset) for AArch64 assemblerZhi An Ng
2022-04-01Move src/jit/memory.c to src/memory.c since it contains not just jit related ...Zhi An Ng
2022-03-24Implement xnn_weights_buffer allocation, release, and reservation.Zhi An Ng
2022-03-24Rename xnn_ensure_code_memory_has_space to xnn_reserve_code_memoryZhi An Ng
2022-03-23Create xnn_weights_cache that is a cache to hold repacked weightsZhi An Ng
2022-02-25Rename xnn_grow_code_memory to xnn_ensure_code_memory_has_spaceZhi An Ng
2022-02-25Fix binding of labels to return early if Assembler is in error stateZhi An Ng
2022-02-24Fix growing code memory, should be based on the capacity, not the size.Zhi An Ng
2022-02-24Assembler now appends to the end of code buffer (up to capacity). This will a...Zhi An Ng
2022-02-23Rename src/jit/cache.c to src/code-cache.c and move it to be part of XNNPACK ...Zhi An Ng
2022-02-18Run __builtin__clear_cache only on platforms JIT is supportedZhi An Ng
2022-02-17Add a cache for JIT generated microkernelsZhi An Ng
2022-02-16Roll back JIT cacheZhi An Ng
2022-02-16Add a cache for JIT generated microkernelsZhi An Ng
2022-02-15Implement nop, hlt and code alignment, align at the end of each generated cod...Zhi An Ng
2022-02-07Zero/nullify code_buffer fields upon release of memoryZhi An Ng
2022-02-04Rename ctz to math_ctz_u32 to avoid name conflictsMarat Dukhan
2022-02-03Implement str (s register, post index) for aarch64 assemblerZhi An Ng
2022-02-03Implement ldr (post-index) for aarch64 assemblerZhi An Ng
2022-02-03Port F32 GEMM A75 1x8 microkernel to JIT and specialize for min/max, add test...Zhi An Ng
2022-02-03Implement mov (x registers) for aarch64 assemblerZhi An Ng
2022-02-03Implement stp (x registers) for aarch64 assemblerZhi An Ng
2022-02-03Implement cmp (x registers) for aarch64 assemblerZhi An Ng
2022-02-02Support vld1r_32 with 1 or 2 register(s) in listZhi An Ng
2022-02-01Integrate JIT generated GEMM microkernels into create_convolution2d_nhwcZhi An Ng
2022-01-28Check code_buffer capacity before attempting to release itZhi An Ng
2022-01-27Remove wb from JIT aarch32 instructions, use mem operand and ++ insteadZhi An Ng
2022-01-27Fix encoding of prfmZhi An Ng
2022-01-26Add default cases for switch, GCC warns that control reaches the end of non-v...Zhi An Ng
2022-01-25Change return type for assembler functions to void to simplify code, move emi...Zhi An Ng
2022-01-25Implement ldp (d registers) offset and post index for aarch64 assemblerZhi An Ng
2022-01-25Implement stp (q registers) offset and post indexed for aarch64 assemblerZhi An Ng
2022-01-25Implement tst (immediate) for aarch64 assemblerZhi An Ng
2022-01-25Implement csel for aarch64 assemblerZhi An Ng
2022-01-25Implemnet stp (d register) offset and pre-index for aarch64 assemblerZhi An Ng
2022-01-25Implement add (x registers) for aarch64 assemblerZhi An Ng
2022-01-25Implement cmp (immediate) for aarch64 assemblerZhi An Ng
2022-01-25Fix patching of branch instructions immediateZhi An Ng
2022-01-24Implement ldr for s and d registers and str for d registers (post-indexed) fo...Zhi An Ng
2022-01-21Implement dup (vector) for aarch64 assemblerZhi An Ng
2022-01-21Implement str (q register, post-indexed) and str (s register, offset) for aar...Zhi An Ng
2022-01-21Implement mov (VRegister) for aarch64 assemblerZhi An Ng
2022-01-21Implement stp (post-indexed) for aarch64 assemblerZhi An Ng
2022-01-21Implement add with immediate for aarch64 assemblerZhi An Ng
2022-01-21Rename kTbz enum to kTbxz and add comment to clarify its usage for both TBZ a...Zhi An Ng
2022-01-21Implement unconditional branch for aarch64 assemblerZhi An Ng