From f0ecb5a040ce3b9baf1e8ddd53f02e46470fd965 Mon Sep 17 00:00:00 2001 From: Christophe Lyon Date: Tue, 8 Feb 2011 18:15:05 +0100 Subject: Restore tests for vsli/vsri. Add tests with maximum allowed shift amount. --- ref_vsXi_n.c | 108 +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 108 insertions(+) create mode 100644 ref_vsXi_n.c (limited to 'ref_vsXi_n.c') diff --git a/ref_vsXi_n.c b/ref_vsXi_n.c new file mode 100644 index 0000000..20f207a --- /dev/null +++ b/ref_vsXi_n.c @@ -0,0 +1,108 @@ +/* + +Copyright (c) 2009, 2010, 2011 STMicroelectronics +Written by Christophe Lyon + +Permission is hereby granted, free of charge, to any person obtaining a copy +of this software and associated documentation files (the "Software"), to deal +in the Software without restriction, including without limitation the rights +to use, copy, modify, merge, publish, distribute, sublicense, and/or sell +copies of the Software, and to permit persons to whom the Software is +furnished to do so, subject to the following conditions: + +The above copyright notice and this permission notice shall be included in +all copies or substantial portions of the Software. + +THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR +IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, +FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE +AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER +LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, +OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN +THE SOFTWARE. + +*/ + +#ifdef __arm__ +#include +#else +#error Target not supported +#endif + +#include "stm-arm-neon-ref.h" + +#ifndef INSN_NAME +#define INSN_NAME vsli +#define TEST_MSG "VSLI_N" +#endif + +#define FNNAME1(NAME) void exec_ ## NAME ##_n (void) +#define FNNAME(NAME) FNNAME1(NAME) + +FNNAME (INSN_NAME) +{ + /* vector_res = vsxi_n(vector, vector2, val), + then store the result. */ +#define TEST_VSXI_N1(INSN, Q, T1, T2, W, N, V) \ + VECT_VAR(vector_res, T1, W, N) = \ + INSN##Q##_n_##T2##W(VECT_VAR(vector, T1, W, N), \ + VECT_VAR(vector2, T1, W, N), \ + V); \ + vst1##Q##_##T2##W(VECT_VAR(result, T1, W, N), VECT_VAR(vector_res, T1, W, N)) + +#define TEST_VSXI_N(INSN, Q, T1, T2, W, N, V) \ + TEST_VSXI_N1(INSN, Q, T1, T2, W, N, V) + + /* With ARM RVCT, we need to declare variables before any executable + statement */ + DECL_VARIABLE_ALL_VARIANTS(vector); + DECL_VARIABLE_ALL_VARIANTS(vector2); + DECL_VARIABLE_ALL_VARIANTS(vector_res); + + clean_results (); + + /* Initialize input "vector" from "buffer" */ + TEST_MACRO_ALL_VARIANTS_2_5(TEST_VLOAD, vector, buffer); + + /* Fill input vector2 with arbitrary values */ + TEST_VDUP(vector2, , int, s, 8, 8, 2); + TEST_VDUP(vector2, , int, s, 16, 4, -4); + TEST_VDUP(vector2, , int, s, 32, 2, 3); + TEST_VDUP(vector2, , int, s, 64, 1, 100); + TEST_VDUP(vector2, , uint, u, 8, 8, 20); + TEST_VDUP(vector2, , uint, u, 16, 4, 30); + TEST_VDUP(vector2, , uint, u, 32, 2, 40); + TEST_VDUP(vector2, , uint, u, 64, 1, 2); + TEST_VDUP(vector2, q, int, s, 8, 16, -10); + TEST_VDUP(vector2, q, int, s, 16, 8, -20); + TEST_VDUP(vector2, q, int, s, 32, 4, -30); + TEST_VDUP(vector2, q, int, s, 64, 2, 24); + TEST_VDUP(vector2, q, uint, u, 8, 16, 12); + TEST_VDUP(vector2, q, uint, u, 16, 8, 3); + TEST_VDUP(vector2, q, uint, u, 32, 4, 55); + TEST_VDUP(vector2, q, uint, u, 64, 2, 3); + + /* Choose shift amount arbitrarily */ + TEST_VSXI_N(INSN_NAME, , int, s, 8, 8, 4); + TEST_VSXI_N(INSN_NAME, , int, s, 16, 4, 3); + TEST_VSXI_N(INSN_NAME, , int, s, 32, 2, 1); + TEST_VSXI_N(INSN_NAME, , int, s, 64, 1, 32); + TEST_VSXI_N(INSN_NAME, , uint, u, 8, 8, 2); + TEST_VSXI_N(INSN_NAME, , uint, u, 16, 4, 10); + TEST_VSXI_N(INSN_NAME, , uint, u, 32, 2, 30); + TEST_VSXI_N(INSN_NAME, , uint, u, 64, 1, 3); + TEST_VSXI_N(INSN_NAME, q, int, s, 8, 16, 5); + TEST_VSXI_N(INSN_NAME, q, int, s, 16, 8, 3); + TEST_VSXI_N(INSN_NAME, q, int, s, 32, 4, 20); + TEST_VSXI_N(INSN_NAME, q, int, s, 64, 2, 16); + TEST_VSXI_N(INSN_NAME, q, uint, u, 8, 16, 3); + TEST_VSXI_N(INSN_NAME, q, uint, u, 16, 8, 12); + TEST_VSXI_N(INSN_NAME, q, uint, u, 32, 4, 23); + TEST_VSXI_N(INSN_NAME, q, uint, u, 64, 2, 53); + + dump_results_hex (TEST_MSG); + +#ifdef EXTRA_TESTS + EXTRA_TESTS(); +#endif +} -- cgit v1.2.3