pl/math: Replace WANT_ERRNO with WANT_SIMD_EXCEPT for Neon fenv

We were previously misusing the WANT_ERRNO build flag. This is now
replaced everywhere appropriate with WANT_SIMD_EXCEPT. A small number
of vector routines get fp exceptions right with no modification - the
tests have been updated to track this.

22 files changed, 65 insertions, 56 deletions

diff --git a/pl/math/Dir.mk b/pl/math/Dir.mk
index 1433b7b..60814f8 100644
--- a/pl/math/Dir.mk
+++ b/pl/math/Dir.mk
@@ -200,7 +200,6 @@ $(ulp-itvs): $(ulp-itvs-alias) $(ulp-itvs-noalias)
 	cat $^ | sort -u | sed "s/PL_TEST_INTERVAL //g" > $@
 
 check-pl/math-ulp: $(math-tools) $(ulp-lims) $(ulp-aliases) $(fenv-exps) $(ulp-itvs)
-	WANT_ERRNO=$(WANT_ERRNO) \
 	WANT_SVE_MATH=$(WANT_SVE_MATH) \
 	ULPFLAGS="$(math-ulpflags)" \
 	LIMITS=../../../$(ulp-lims) \
diff --git a/pl/math/include/pl_test.h b/pl/math/include/pl_test.h
index e578a0d..30d39c1 100644
--- a/pl/math/include/pl_test.h
+++ b/pl/math/include/pl_test.h
@@ -20,6 +20,7 @@
    build flags - defer expansion by one pass to allow those flags to be expanded
    properly.  */
 #define PL_TEST_EXPECT_FENV(f, e)
+#define PL_TEST_EXPECT_FENV_ALWAYS(f)
 
 #define PL_TEST_INTERVAL(f, lo, hi, n)
 #define PL_TEST_INTERVAL_C(f, lo, hi, n, c)
diff --git a/pl/math/math_config.h b/pl/math/math_config.h
index 81da863..90d571c 100644
--- a/pl/math/math_config.h
+++ b/pl/math/math_config.h
@@ -24,6 +24,11 @@
    set to 1 if math.h has (math_errhandling & MATH_ERRNO) != 0.  */
 # define WANT_ERRNO 0
 #endif
+#ifndef WANT_SIMD_EXCEPT
+/* If defined to 1, trigger fp exceptions in vector routines, consistently with
+   behaviour expected from the corresponding scalar routine.  */
+#define WANT_SIMD_EXCEPT 0
+#endif
 
 /* Compiler can inline round as a single instruction.  */
 #ifndef HAVE_FAST_ROUND
diff --git a/pl/math/test/pl_test.h b/pl/math/test/pl_test.h
index 9bbcaf1..158db5f 100644
--- a/pl/math/test/pl_test.h
+++ b/pl/math/test/pl_test.h
@@ -10,7 +10,7 @@
    on PL_TEST_ULP to add EXPECT_FENV to all scalar routines.  */
 #if !(V_SUPPORTED || SV_SUPPORTED)
 #define PL_TEST_ULP(f, l)                                                      \
-  PL_TEST_EXPECT_FENV (f, 1)                                                   \
+  PL_TEST_EXPECT_FENV_ALWAYS (f)                                               \
   PL_TEST_ULP f l
 #else
 #define PL_TEST_ULP(f, l) PL_TEST_ULP f l
@@ -27,6 +27,7 @@
 #define PL_TEST_EXPECT_FENV(f, e) PL_TEST_EXPECT_FENV_ (f, e)
 #define PL_TEST_EXPECT_FENV_(f, e) PL_TEST_EXPECT_FENV_##e (f)
 #define PL_TEST_EXPECT_FENV_1(f) PL_TEST_EXPECT_FENV_ENABLED f
+#define PL_TEST_EXPECT_FENV_ALWAYS(f) PL_TEST_EXPECT_FENV (f, 1)
 
 #define PL_TEST_INTERVAL(f, lo, hi, n) PL_TEST_INTERVAL f lo hi n
 #define PL_TEST_INTERVAL_C(f, lo, hi, n, c) PL_TEST_INTERVAL f lo hi n c
diff --git a/pl/math/v_asinh_2u5.c b/pl/math/v_asinh_2u5.c
index 4eeec4a..04d369d 100644
--- a/pl/math/v_asinh_2u5.c
+++ b/pl/math/v_asinh_2u5.c
@@ -98,19 +98,19 @@ VPCS_ATTR v_f64_t V_NAME (asinh) (v_f64_t x)
   v_u64_t gt1 = v_cond_u64 (top12 >= OneTop);
   v_u64_t special = v_cond_u64 (top12 >= HugeBound);
 
-#if WANT_ERRNO
+#if WANT_SIMD_EXCEPT
   v_u64_t tiny = v_cond_u64 (top12 < TinyBound);
   special |= tiny;
 #endif
 
   /* Option 1: |x| >= 1.
      Compute asinh(x) according by asinh(x) = log(x + sqrt(x^2 + 1)).
-     If WANT_ERRNO is enabled, sidestep special values, which will overflow, by
-     setting special lanes to 1. These will be fixed later.  */
+     If WANT_SIMD_EXCEPT is enabled, sidestep special values, which will
+     overflow, by setting special lanes to 1. These will be fixed later.  */
   v_f64_t option_1 = v_f64 (0);
   if (likely (v_any_u64 (gt1)))
     {
-#if WANT_ERRNO
+#if WANT_SIMD_EXCEPT
       v_f64_t xm = v_sel_f64 (special, v_f64 (1), ax);
 #else
       v_f64_t xm = ax;
@@ -120,16 +120,16 @@ VPCS_ATTR v_f64_t V_NAME (asinh) (v_f64_t x)
 
   /* Option 2: |x| < 1.
      Compute asinh(x) using a polynomial.
-     If WANT_ERRNO is enabled, sidestep special lanes, which will overflow, and
-     tiny lanes, which will underflow, by setting them to 0. They will be fixed
-     later, either by selecting x or falling back to the scalar special-case.
-     The largest observed error in this region is 1.47 ULPs:
+     If WANT_SIMD_EXCEPT is enabled, sidestep special lanes, which will
+     overflow, and tiny lanes, which will underflow, by setting them to 0. They
+     will be fixed later, either by selecting x or falling back to the scalar
+     special-case. The largest observed error in this region is 1.47 ULPs:
      __v_asinh(0x1.fdfcd00cc1e6ap-1) got 0x1.c1d6bf874019bp-1
 				    want 0x1.c1d6bf874019cp-1.  */
   v_f64_t option_2 = v_f64 (0);
   if (likely (v_any_u64 (~gt1)))
     {
-#if WANT_ERRNO
+#if WANT_SIMD_EXCEPT
       ax = v_sel_f64 (tiny | gt1, v_f64 (0), ax);
 #endif
       v_f64_t x2 = ax * ax;
@@ -138,7 +138,7 @@ VPCS_ATTR v_f64_t V_NAME (asinh) (v_f64_t x)
       v_f64_t z8 = z4 * z4;
       v_f64_t p = ESTRIN_17 (x2, z2, z4, z8, z8 * z8, C);
       option_2 = v_fma_f64 (p, x2 * ax, ax);
-#if WANT_ERRNO
+#if WANT_SIMD_EXCEPT
       option_2 = v_sel_f64 (tiny, x, option_2);
 #endif
     }
@@ -156,7 +156,7 @@ VPCS_ALIAS
 
 PL_SIG (V, D, 1, asinh, -10.0, 10.0)
 PL_TEST_ULP (V_NAME (asinh), 1.54)
-PL_TEST_EXPECT_FENV (V_NAME (asinh), WANT_ERRNO)
+PL_TEST_EXPECT_FENV (V_NAME (asinh), WANT_SIMD_EXCEPT)
 /* Test vector asinh 3 times, with control lane < 1, > 1 and special.
    Ensures the v_sel is choosing the right option in all cases.  */
 #define V_ASINH_INTERVAL(lo, hi, n)                                            \
diff --git a/pl/math/v_asinhf_2u7.c b/pl/math/v_asinhf_2u7.c
index 79bf80f..4710a22 100644
--- a/pl/math/v_asinhf_2u7.c
+++ b/pl/math/v_asinhf_2u7.c
@@ -35,7 +35,7 @@ VPCS_ATTR v_f32_t V_NAME (asinhf) (v_f32_t x)
   v_f32_t ax = v_as_f32_u32 (iax);
   v_u32_t special = v_cond_u32 (iax >= BigBound);
 
-#if WANT_ERRNO
+#if WANT_SIMD_EXCEPT
   /* Sidestep tiny and large values to avoid inadvertently triggering
      under/overflow.  */
   special |= v_cond_u32 (iax < TinyBound);
@@ -57,7 +57,7 @@ VPCS_ALIAS
 
 PL_SIG (V, F, 1, asinh, -10.0, 10.0)
 PL_TEST_ULP (V_NAME (asinhf), 2.17)
-PL_TEST_EXPECT_FENV (V_NAME (asinhf), WANT_ERRNO)
+PL_TEST_EXPECT_FENV (V_NAME (asinhf), WANT_SIMD_EXCEPT)
 PL_TEST_INTERVAL (V_NAME (asinhf), 0, 0x1p-12, 40000)
 PL_TEST_INTERVAL (V_NAME (asinhf), 0x1p-12, 1.0, 40000)
 PL_TEST_INTERVAL (V_NAME (asinhf), 1.0, 0x1p11, 40000)
diff --git a/pl/math/v_atanhf_3u1.c b/pl/math/v_atanhf_3u1.c
index 68dbdf6..7a027fc 100644
--- a/pl/math/v_atanhf_3u1.c
+++ b/pl/math/v_atanhf_3u1.c
@@ -31,7 +31,7 @@ VPCS_ATTR v_f32_t V_NAME (atanhf) (v_f32_t x)
 
   v_f32_t ax = v_as_f32_u32 (iax);
 
-#if WANT_ERRNO
+#if WANT_SIMD_EXCEPT
   v_u32_t special = v_cond_u32 ((iax >= One) | (iax <= TinyBound));
   /* Side-step special cases by setting those lanes to 0, which will trigger no
      exceptions. These will be fixed up later.  */
@@ -51,7 +51,7 @@ VPCS_ALIAS
 
 PL_SIG (V, F, 1, atanh, -1.0, 1.0)
 PL_TEST_ULP (V_NAME (atanhf), 2.59)
-PL_TEST_EXPECT_FENV (V_NAME (atanhf), WANT_ERRNO)
+PL_TEST_EXPECT_FENV (V_NAME (atanhf), WANT_SIMD_EXCEPT)
 PL_TEST_INTERVAL_C (V_NAME (atanhf), 0, 0x1p-12, 500, 0)
 PL_TEST_INTERVAL_C (V_NAME (atanhf), 0x1p-12, 1, 200000, 0)
 PL_TEST_INTERVAL_C (V_NAME (atanhf), 1, inf, 1000, 0)
diff --git a/pl/math/v_cbrtf_1u5.c b/pl/math/v_cbrtf_1u5.c
index cffc488..38c20e3 100644
--- a/pl/math/v_cbrtf_1u5.c
+++ b/pl/math/v_cbrtf_1u5.c
@@ -89,7 +89,7 @@ VPCS_ALIAS
 
 PL_SIG (V, F, 1, cbrt, -10.0, 10.0)
 PL_TEST_ULP (V_NAME (cbrtf), 1.03)
-PL_TEST_EXPECT_FENV (V_NAME (cbrtf), WANT_ERRNO)
+PL_TEST_EXPECT_FENV_ALWAYS (V_NAME (cbrtf))
 PL_TEST_INTERVAL (V_NAME (cbrtf), 0, inf, 1000000)
 PL_TEST_INTERVAL (V_NAME (cbrtf), -0, -inf, 1000000)
 #endif
diff --git a/pl/math/v_cosh_2u.c b/pl/math/v_cosh_2u.c
index 20d5b38..67390d4 100644
--- a/pl/math/v_cosh_2u.c
+++ b/pl/math/v_cosh_2u.c
@@ -87,7 +87,7 @@ VPCS_ALIAS
 
 PL_SIG (V, D, 1, cosh, -10.0, 10.0)
 PL_TEST_ULP (V_NAME (cosh), 1.43)
-PL_TEST_EXPECT_FENV (V_NAME (cosh), WANT_ERRNO)
+PL_TEST_EXPECT_FENV_ALWAYS (V_NAME (cosh))
 PL_TEST_INTERVAL (V_NAME (cosh), 0, 0x1.6p9, 100000)
 PL_TEST_INTERVAL (V_NAME (cosh), -0, -0x1.6p9, 100000)
 PL_TEST_INTERVAL (V_NAME (cosh), 0x1.6p9, inf, 1000)
diff --git a/pl/math/v_coshf_2u4.c b/pl/math/v_coshf_2u4.c
index 6ea6eb3..bee46ed 100644
--- a/pl/math/v_coshf_2u4.c
+++ b/pl/math/v_coshf_2u4.c
@@ -30,10 +30,10 @@ VPCS_ATTR v_f32_t V_NAME (coshf) (v_f32_t x)
   v_f32_t ax = v_as_f32_u32 (iax);
   v_u32_t special = v_cond_u32 (iax >= SpecialBound);
 
-#if WANT_ERRNO
-  /* If errno is to be set correctly, fall back to the scalar variant for all
-     inputs if any input is a special value or above the bound at which expf
-     overflows. */
+#if WANT_SIMD_EXCEPT
+  /* If fp exceptions are to be triggered correctly, fall back to the scalar
+     variant for all inputs if any input is a special value or above the bound
+     at which expf overflows. */
   if (unlikely (v_any_u32 (special)))
     return v_call_f32 (coshf, x, x, v_u32 (-1));
 
@@ -49,7 +49,7 @@ VPCS_ATTR v_f32_t V_NAME (coshf) (v_f32_t x)
   v_f32_t t = V_NAME (expf) (ax);
   v_f32_t y = t * Half + Half / t;
 
-#if WANT_ERRNO
+#if WANT_SIMD_EXCEPT
   if (unlikely (v_any_u32 (tiny)))
     return v_sel_f32 (tiny, v_f32 (1), y);
 #else
@@ -63,7 +63,7 @@ VPCS_ALIAS
 
 PL_SIG (V, F, 1, cosh, -10.0, 10.0)
 PL_TEST_ULP (V_NAME (coshf), 1.89)
-PL_TEST_EXPECT_FENV (V_NAME (coshf), WANT_ERRNO)
+PL_TEST_EXPECT_FENV (V_NAME (coshf), WANT_SIMD_EXCEPT)
 PL_TEST_INTERVAL (V_NAME (coshf), 0, 0x1p-63, 100)
 PL_TEST_INTERVAL (V_NAME (coshf), 0, 0x1.5a92d8p+6, 80000)
 PL_TEST_INTERVAL (V_NAME (coshf), 0x1.5a92d8p+6, inf, 2000)
diff --git a/pl/math/v_expm1_2u5.c b/pl/math/v_expm1_2u5.c
index 3f63760..879fcb6 100644
--- a/pl/math/v_expm1_2u5.c
+++ b/pl/math/v_expm1_2u5.c
@@ -55,9 +55,9 @@ v_f64_t V_NAME (expm1) (v_f64_t x)
   v_u64_t ix = v_as_u64_f64 (x);
   v_u64_t ax = ix & AbsMask;
 
-#if WANT_ERRNO
-  /* If errno is to be set correctly, fall back to the scalar variant for all
-     lanes if any of them should trigger an exception.  */
+#if WANT_SIMD_EXCEPT
+  /* If fp exceptions are to be triggered correctly, fall back to the scalar
+     variant for all lanes if any of them should trigger an exception.  */
   v_u64_t special = v_cond_u64 ((ax >= SpecialBound) | (ax <= TinyBound));
   if (unlikely (v_any_u64 (special)))
     return v_call_f64 (expm1, x, x, v_u64 (-1));
@@ -92,7 +92,7 @@ v_f64_t V_NAME (expm1) (v_f64_t x)
   /* expm1(x) ~= p * t + (t - 1).  */
   v_f64_t y = v_fma_f64 (p, t, t - 1);
 
-#if !WANT_ERRNO
+#if !WANT_SIMD_EXCEPT
   if (unlikely (v_any_u64 (special)))
     return v_call_f64 (expm1, x, y, special);
 #endif
@@ -103,7 +103,7 @@ VPCS_ALIAS
 
 PL_SIG (V, D, 1, expm1, -9.9, 9.9)
 PL_TEST_ULP (V_NAME (expm1), 1.68)
-PL_TEST_EXPECT_FENV (V_NAME (expm1), WANT_ERRNO)
+PL_TEST_EXPECT_FENV (V_NAME (expm1), WANT_SIMD_EXCEPT)
 PL_TEST_INTERVAL (V_NAME (expm1), 0, 0x1p-51, 1000)
 PL_TEST_INTERVAL (V_NAME (expm1), -0, -0x1p-51, 1000)
 PL_TEST_INTERVAL (V_NAME (expm1), 0x1p-51, 0x1.63108c75a1937p+9, 100000)
diff --git a/pl/math/v_expm1f_1u6.c b/pl/math/v_expm1f_1u6.c
index 9977b8e..7a59ddc 100644
--- a/pl/math/v_expm1f_1u6.c
+++ b/pl/math/v_expm1f_1u6.c
@@ -34,9 +34,9 @@ v_f32_t V_NAME (expm1f) (v_f32_t x)
   v_u32_t ix = v_as_u32_f32 (x);
   v_u32_t ax = ix & AbsMask;
 
-#if WANT_ERRNO
-  /* If errno is to be set correctly, fall back to the scalar variant for all
-     lanes if any of them should trigger an exception.  */
+#if WANT_SIMD_EXCEPT
+  /* If fp exceptions are to be triggered correctly, fall back to the scalar
+     variant for all lanes if any of them should trigger an exception.  */
   v_u32_t special
     = v_cond_u32 ((ax >= SpecialBound) | (ix == 0x80000000) | (ax < TinyBound));
   if (unlikely (v_any_u32 (special)))
@@ -75,7 +75,7 @@ v_f32_t V_NAME (expm1f) (v_f32_t x)
   /* expm1(x) ~= p * t + (t - 1).  */
   v_f32_t y = v_fma_f32 (p, t, t - 1);
 
-#if !WANT_ERRNO
+#if !WANT_SIMD_EXCEPT
   if (unlikely (v_any_u32 (special)))
     return v_call_f32 (expm1f, x, y, special);
 #endif
@@ -86,7 +86,7 @@ VPCS_ALIAS
 
 PL_SIG (V, F, 1, expm1, -9.9, 9.9)
 PL_TEST_ULP (V_NAME (expm1f), 1.02)
-PL_TEST_EXPECT_FENV (V_NAME (expm1f), WANT_ERRNO)
+PL_TEST_EXPECT_FENV (V_NAME (expm1f), WANT_SIMD_EXCEPT)
 PL_TEST_INTERVAL (V_NAME (expm1f), 0, 0x1p-23, 1000)
 PL_TEST_INTERVAL (V_NAME (expm1f), -0, -0x1p-23, 1000)
 PL_TEST_INTERVAL (V_NAME (expm1f), 0x1p-23, 0x1.644716p6, 1000000)
diff --git a/pl/math/v_log10_2u5.c b/pl/math/v_log10_2u5.c
index 6fb7447..e8d8021 100644
--- a/pl/math/v_log10_2u5.c
+++ b/pl/math/v_log10_2u5.c
@@ -103,6 +103,7 @@ VPCS_ALIAS
 
 PL_SIG (V, D, 1, log10, 0.01, 11.1)
 PL_TEST_ULP (V_NAME (log10), 1.97)
+PL_TEST_EXPECT_FENV_ALWAYS (V_NAME (log10))
 PL_TEST_INTERVAL (V_NAME (log10), 0, 0xffff000000000000, 10000)
 PL_TEST_INTERVAL (V_NAME (log10), 0x1p-4, 0x1p4, 400000)
 PL_TEST_INTERVAL (V_NAME (log10), 0, inf, 400000)
diff --git a/pl/math/v_log10f_3u5.c b/pl/math/v_log10f_3u5.c
index 4c22540..a032fa9 100644
--- a/pl/math/v_log10f_3u5.c
+++ b/pl/math/v_log10f_3u5.c
@@ -76,6 +76,7 @@ VPCS_ALIAS
 
 PL_SIG (V, F, 1, log10, 0.01, 11.1)
 PL_TEST_ULP (V_NAME (log10f), 2.81)
+PL_TEST_EXPECT_FENV_ALWAYS (V_NAME (log10f))
 PL_TEST_INTERVAL (V_NAME (log10f), 0, 0xffff0000, 10000)
 PL_TEST_INTERVAL (V_NAME (log10f), 0x1p-4, 0x1p4, 500000)
 #endif
diff --git a/pl/math/v_log1p_2u5.c b/pl/math/v_log1p_2u5.c
index ccde382..7ff948f 100644
--- a/pl/math/v_log1p_2u5.c
+++ b/pl/math/v_log1p_2u5.c
@@ -51,7 +51,7 @@ VPCS_ATTR v_f64_t V_NAME (log1p) (v_f64_t x)
     = v_cond_u64 ((ia >= v_u64 (0x7ff0000000000000))
 		  | (ix >= 0xbff0000000000000) | (ix == 0x8000000000000000));
 
-#if WANT_ERRNO
+#if WANT_SIMD_EXCEPT
   if (unlikely (v_any_u64 (special)))
     x = v_sel_f64 (special, v_f64 (0), x);
 #endif
@@ -107,7 +107,7 @@ VPCS_ALIAS
 
 PL_SIG (V, D, 1, log1p, -0.9, 10.0)
 PL_TEST_ULP (V_NAME (log1p), 1.97)
-PL_TEST_EXPECT_FENV (V_NAME (log1p), WANT_ERRNO)
+PL_TEST_EXPECT_FENV (V_NAME (log1p), WANT_SIMD_EXCEPT)
 PL_TEST_INTERVAL (V_NAME (log1p), -10.0, 10.0, 10000)
 PL_TEST_INTERVAL (V_NAME (log1p), 0.0, 0x1p-23, 50000)
 PL_TEST_INTERVAL (V_NAME (log1p), 0x1p-23, 0.001, 50000)
diff --git a/pl/math/v_log1pf_2u1.c b/pl/math/v_log1pf_2u1.c
index 96ac02d..ab5e7b7 100644
--- a/pl/math/v_log1pf_2u1.c
+++ b/pl/math/v_log1pf_2u1.c
@@ -68,7 +68,7 @@ handle_special (float x)
       /* x == -Inf   => log1pf(x) = NaN.
 	 x <  -1.0   => log1pf(x) = NaN.
 	 x == +/-NaN => log1pf(x) = NaN.  */
-#if WANT_ERRNO
+#if WANT_SIMD_EXCEPT
       return __math_invalidf (asfloat (ia));
 #else
       return NAN;
@@ -77,7 +77,7 @@ handle_special (float x)
   if (ix == 0xbf800000)
     {
       /* x == -1.0 => log1pf(x) = -Inf.  */
-#if WANT_ERRNO
+#if WANT_SIMD_EXCEPT
       return __math_divzerof (ix);
 #else
       return -INFINITY;
@@ -100,7 +100,7 @@ VPCS_ATTR v_f32_t V_NAME (log1pf) (v_f32_t x)
       | v_cond_u32 (ix >= MinusOne);
   v_f32_t special_arg = x;
 
-#if WANT_ERRNO
+#if WANT_SIMD_EXCEPT
   if (unlikely (v_any_u32 (special_cases)))
     /* Side-step special lanes so fenv exceptions are not triggered
        inadvertently.  */
@@ -147,7 +147,7 @@ VPCS_ALIAS
 
 PL_SIG (V, F, 1, log1p, -0.9, 10.0)
 PL_TEST_ULP (V_NAME (log1pf), 1.53)
-PL_TEST_EXPECT_FENV (V_NAME (log1pf), WANT_ERRNO)
+PL_TEST_EXPECT_FENV (V_NAME (log1pf), WANT_SIMD_EXCEPT)
 PL_TEST_INTERVAL (V_NAME (log1pf), -10.0, 10.0, 10000)
 PL_TEST_INTERVAL (V_NAME (log1pf), 0.0, 0x1p-23, 30000)
 PL_TEST_INTERVAL (V_NAME (log1pf), 0x1p-23, 0.001, 50000)
diff --git a/pl/math/v_log2_3u.c b/pl/math/v_log2_3u.c
index 7dca684..e0a854f 100644
--- a/pl/math/v_log2_3u.c
+++ b/pl/math/v_log2_3u.c
@@ -90,6 +90,7 @@ VPCS_ALIAS
 
 PL_SIG (V, D, 1, log2, 0.01, 11.1)
 PL_TEST_ULP (V_NAME (log2), 2.10)
+PL_TEST_EXPECT_FENV_ALWAYS (V_NAME (log2))
 PL_TEST_INTERVAL (V_NAME (log2), -0.0, -0x1p126, 100)
 PL_TEST_INTERVAL (V_NAME (log2), 0x1p-149, 0x1p-126, 4000)
 PL_TEST_INTERVAL (V_NAME (log2), 0x1p-126, 0x1p-23, 50000)
diff --git a/pl/math/v_log2f_2u5.c b/pl/math/v_log2f_2u5.c
index 343185c..f4fa0ab 100644
--- a/pl/math/v_log2f_2u5.c
+++ b/pl/math/v_log2f_2u5.c
@@ -58,7 +58,7 @@ VPCS_ALIAS
 
 PL_SIG (V, F, 1, log2, 0.01, 11.1)
 PL_TEST_ULP (V_NAME (log2f), 1.99)
-PL_TEST_EXPECT_FENV (V_NAME (log2f), WANT_ERRNO)
+PL_TEST_EXPECT_FENV_ALWAYS (V_NAME (log2f))
 PL_TEST_INTERVAL (V_NAME (log2f), -0.0, -0x1p126, 100)
 PL_TEST_INTERVAL (V_NAME (log2f), 0x1p-149, 0x1p-126, 4000)
 PL_TEST_INTERVAL (V_NAME (log2f), 0x1p-126, 0x1p-23, 50000)
diff --git a/pl/math/v_sinh_3u.c b/pl/math/v_sinh_3u.c
index 019cf84..37d7e45 100644
--- a/pl/math/v_sinh_3u.c
+++ b/pl/math/v_sinh_3u.c
@@ -46,7 +46,7 @@ VPCS_ALIAS
 
 PL_SIG (V, D, 1, sinh, -10.0, 10.0)
 PL_TEST_ULP (V_NAME (sinh), 2.08)
-PL_TEST_EXPECT_FENV (V_NAME (sinh), WANT_ERRNO)
+PL_TEST_EXPECT_FENV_ALWAYS (V_NAME (sinh))
 PL_TEST_INTERVAL (V_NAME (sinh), 0, 0x1p-51, 100)
 PL_TEST_INTERVAL (V_NAME (sinh), -0, -0x1p-51, 100)
 PL_TEST_INTERVAL (V_NAME (sinh), 0x1p-51, 0x1.62e42fefa39fp+9, 100000)
diff --git a/pl/math/v_sinhf_2u3.c b/pl/math/v_sinhf_2u3.c
index a8bf5ae..50fc786 100644
--- a/pl/math/v_sinhf_2u3.c
+++ b/pl/math/v_sinhf_2u3.c
@@ -45,7 +45,7 @@ VPCS_ALIAS
 
 PL_SIG (V, F, 1, sinh, -10.0, 10.0)
 PL_TEST_ULP (V_NAME (sinhf), 1.76)
-PL_TEST_EXPECT_FENV (V_NAME (sinhf), WANT_ERRNO)
+PL_TEST_EXPECT_FENV_ALWAYS (V_NAME (sinhf))
 PL_TEST_INTERVAL (V_NAME (sinhf), 0, 0x1.62e43p+6, 100000)
 PL_TEST_INTERVAL (V_NAME (sinhf), -0, -0x1.62e43p+6, 100000)
 PL_TEST_INTERVAL (V_NAME (sinhf), 0x1.62e43p+6, 0x1.65a9fap+6, 100)
diff --git a/pl/math/v_tanf_3u2.c b/pl/math/v_tanf_3u2.c
index 648690d..6125319 100644
--- a/pl/math/v_tanf_3u2.c
+++ b/pl/math/v_tanf_3u2.c
@@ -37,9 +37,9 @@ static inline v_f32_t
 eval_poly (v_f32_t z)
 {
   v_f32_t z2 = z * z;
-#if WANT_ERRNO
-  /* Tiny z (<= 0x1p-31) will underflow when calculating z^4. If errno is to be
-     set correctly, sidestep this by fixing such lanes to 0.  */
+#if WANT_SIMD_EXCEPT
+  /* Tiny z (<= 0x1p-31) will underflow when calculating z^4. If fp exceptions
+     are to be triggered correctly, sidestep this by fixing such lanes to 0.  */
   v_u32_t will_uflow = v_cond_u32 ((v_as_u32_f32 (z) & AbsMask) <= TinyBound);
   if (unlikely (v_any_u32 (will_uflow)))
     z2 = v_sel_f32 (will_uflow, v_f32 (0), z2);
@@ -61,10 +61,10 @@ v_f32_t V_NAME (tanf) (v_f32_t x)
 
   /* iax >= RangeVal means x, if not inf or NaN, is too large to perform fast
      regression.  */
-#if WANT_ERRNO
-  /* If errno is to be set correctly, also special-case tiny input, as this will
-     load to overflow later. Fix any special lanes to 1 to prevent any
-     exceptions being triggered.  */
+#if WANT_SIMD_EXCEPT
+  /* If fp exceptions are to be triggered correctly, also special-case tiny
+     input, as this will load to overflow later. Fix any special lanes to 1 to
+     prevent any exceptions being triggered.  */
   v_u32_t special = v_cond_u32 (iax - TinyBound >= RangeVal - TinyBound);
   if (unlikely (v_any_u32 (special)))
     x = v_sel_f32 (special, v_f32 (1.0f), x);
@@ -119,7 +119,7 @@ VPCS_ALIAS
 
 PL_SIG (V, F, 1, tan, -3.1, 3.1)
 PL_TEST_ULP (V_NAME (tanf), 2.7)
-PL_TEST_EXPECT_FENV (V_NAME (tanf), WANT_ERRNO)
+PL_TEST_EXPECT_FENV (V_NAME (tanf), WANT_SIMD_EXCEPT)
 PL_TEST_INTERVAL (V_NAME (tanf), -0.0, -0x1p126, 100)
 PL_TEST_INTERVAL (V_NAME (tanf), 0x1p-149, 0x1p-126, 4000)
 PL_TEST_INTERVAL (V_NAME (tanf), 0x1p-126, 0x1p-23, 50000)
diff --git a/pl/math/v_tanhf_2u6.c b/pl/math/v_tanhf_2u6.c
index c10be40..dedc085 100644
--- a/pl/math/v_tanhf_2u6.c
+++ b/pl/math/v_tanhf_2u6.c
@@ -69,9 +69,9 @@ VPCS_ATTR v_f32_t V_NAME (tanhf) (v_f32_t x)
   v_u32_t is_boring = v_cond_u32 (iax > BoringBound);
   v_f32_t boring = v_as_f32_u32 (sign | One);
 
-#if WANT_ERRNO
-  /* If errno needs to be set properly, set all special and boring lanes to 1,
-     which will trigger no exceptions, and fix them up later.  */
+#if WANT_SIMD_EXCEPT
+  /* If fp exceptions are to be triggered properly, set all special and boring
+     lanes to 1, which will trigger no exceptions, and fix them up later.  */
   v_u32_t special = v_cond_u32 ((iax > 0x7f800000) | (iax < 0x34000000));
   ix = v_sel_u32 (is_boring, v_u32 (One), ix);
   if (unlikely (v_any_u32 (special)))
@@ -92,7 +92,7 @@ VPCS_ALIAS
 
 PL_SIG (V, F, 1, tanh, -10.0, 10.0)
 PL_TEST_ULP (V_NAME (tanhf), 2.09)
-PL_TEST_EXPECT_FENV (V_NAME (tanhf), WANT_ERRNO)
+PL_TEST_EXPECT_FENV (V_NAME (tanhf), WANT_SIMD_EXCEPT)
 PL_TEST_INTERVAL (V_NAME (tanhf), 0, 0x1p-23, 1000)
 PL_TEST_INTERVAL (V_NAME (tanhf), -0, -0x1p-23, 1000)
 PL_TEST_INTERVAL (V_NAME (tanhf), 0x1p-23, 0x1.205966p+3, 100000)