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| author | Vijayenthiran Subramaniam <vijayenthiran.subramaniam@arm.com> | 2021-07-06 14:52:04 +0530 |
|---|---|---|
| committer | Vijayenthiran Subramaniam <vijayenthiran.subramaniam@arm.com> | 2021-08-24 11:07:43 +0530 |
| commit | 3139270693ab0fc6d66fed4fe11e183829b47e2e (patch) | |
| tree | ae6bffd894ce9ee2f4475e3845c66aef45670ab0 | |
| parent | acfe3be2828735fa07868c117315a5ea43cb3853 (diff) | |
| download | arm-trusted-firmware-3139270693ab0fc6d66fed4fe11e183829b47e2e.tar.gz | |
feat(board/rdn2): add tzc master source ids for soc dma
Add TZC master source id for DMA in the SoC space and for the DMAs
behind the I/O Virtualization block to allow the non-secure transactions
from these DMAs targeting DRAM.
Signed-off-by: Vijayenthiran Subramaniam <vijayenthiran.subramaniam@arm.com>
Change-Id: I77a2947b01b4b49a7c1940f09cf62b7b5257657c
| -rw-r--r-- | plat/arm/board/rdn2/include/platform_def.h | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/plat/arm/board/rdn2/include/platform_def.h b/plat/arm/board/rdn2/include/platform_def.h index 30a0c5c26..194814f95 100644 --- a/plat/arm/board/rdn2/include/platform_def.h +++ b/plat/arm/board/rdn2/include/platform_def.h @@ -44,6 +44,8 @@ #define TZC_NSAID_ALL_AP U(0) #define TZC_NSAID_PCI U(1) #define TZC_NSAID_HDLCD0 U(2) +#define TZC_NSAID_DMA U(5) +#define TZC_NSAID_DMA2 U(8) #define TZC_NSAID_CLCD U(7) #define TZC_NSAID_AP U(9) #define TZC_NSAID_VIRTIO U(15) @@ -52,6 +54,8 @@ (TZC_REGION_ACCESS_RDWR(TZC_NSAID_ALL_AP)) | \ (TZC_REGION_ACCESS_RDWR(TZC_NSAID_HDLCD0)) | \ (TZC_REGION_ACCESS_RDWR(TZC_NSAID_PCI)) | \ + (TZC_REGION_ACCESS_RDWR(TZC_NSAID_DMA)) | \ + (TZC_REGION_ACCESS_RDWR(TZC_NSAID_DMA2)) | \ (TZC_REGION_ACCESS_RDWR(TZC_NSAID_AP)) | \ (TZC_REGION_ACCESS_RDWR(TZC_NSAID_CLCD)) | \ (TZC_REGION_ACCESS_RDWR(TZC_NSAID_VIRTIO)) |