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authorArtsem Artsemenka <artsem.artsemenka@arm.com>2019-11-26 16:40:31 +0000
committerArtsem Artsemenka <artsem.artsemenka@arm.com>2019-12-06 17:42:45 +0000
commitdb3ae8538b8a2cc89e2211201ec96df72e597ae0 (patch)
treefec6243e7c813c65384a5b6eab77239211cba149
parent0376e7c4aa2ce9ae94d72555cea27cd7aff8e32a (diff)
downloadarm-trusted-firmware-db3ae8538b8a2cc89e2211201ec96df72e597ae0.tar.gz
S-EL2 Support: Check for AArch64
Check that entry point information requesting S-EL2 has AArch64 as an execution state during context setup. Signed-off-by: Artsem Artsemenka <artsem.artsemenka@arm.com> Change-Id: I447263692fed6e55c1b076913e6eb73b1ea735b7
-rw-r--r--include/arch/aarch64/arch.h2
-rw-r--r--lib/el3_runtime/aarch64/context_mgmt.c8
2 files changed, 8 insertions, 2 deletions
diff --git a/include/arch/aarch64/arch.h b/include/arch/aarch64/arch.h
index e48e20185..1fcd0f9ba 100644
--- a/include/arch/aarch64/arch.h
+++ b/include/arch/aarch64/arch.h
@@ -141,7 +141,7 @@
#define ID_AA64PFR0_SVE_SHIFT U(32)
#define ID_AA64PFR0_SVE_MASK ULL(0xf)
#define ID_AA64PFR0_SEL2_SHIFT U(36)
-#define ID_AA64PFR0_SEL2_MASK U(0xf)
+#define ID_AA64PFR0_SEL2_MASK ULL(0xf)
#define ID_AA64PFR0_MPAM_SHIFT U(40)
#define ID_AA64PFR0_MPAM_MASK ULL(0xf)
#define ID_AA64PFR0_DIT_SHIFT U(48)
diff --git a/lib/el3_runtime/aarch64/context_mgmt.c b/lib/el3_runtime/aarch64/context_mgmt.c
index 752a2606e..b7908adec 100644
--- a/lib/el3_runtime/aarch64/context_mgmt.c
+++ b/lib/el3_runtime/aarch64/context_mgmt.c
@@ -182,8 +182,14 @@ void cm_setup_context(cpu_context_t *ctx, const entry_point_info_t *ep)
}
/* Enable S-EL2 if the next EL is EL2 and security state is secure */
- if ((security_state == SECURE) && (GET_EL(ep->spsr) == MODE_EL2))
+ if ((security_state == SECURE) && (GET_EL(ep->spsr) == MODE_EL2)) {
+ if (GET_RW(ep->spsr) != MODE_RW_64) {
+ ERROR("S-EL2 can not be used in AArch32.");
+ panic();
+ }
+
scr_el3 |= SCR_EEL2_BIT;
+ }
/*
* Initialise SCTLR_EL1 to the reset value corresponding to the target