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| author | Deepika Bhavnani <deepika.bhavnani@arm.com> | 2019-12-13 10:53:56 -0600 |
|---|---|---|
| committer | Deepika Bhavnani <deepika.bhavnani@arm.com> | 2020-01-24 10:02:15 -0600 |
| commit | 6cdef9ba1144776c14bebe2846391cec74594865 (patch) | |
| tree | d5a28d11d9f98587862681671a0f782cc39b31a7 | |
| parent | b25340793e0920db6e5d1ce8e7852ba872ccfa95 (diff) | |
| download | arm-trusted-firmware-6cdef9ba1144776c14bebe2846391cec74594865.tar.gz | |
xilinx: Unify Platform specific defines for PSCI module
PLATFORM_CORE_COUNT - Unsigned int
PLATFORM_CLUSTER_COUNT - Unsigned int
PLATFORM_MAX_CPUS_PER_CLUSTER - Unsigned int
PLATFORM_CORE_COUNT_PER_CLUSTER - Unsigned int
Signed-off-by: Deepika Bhavnani <deepika.bhavnani@arm.com>
Change-Id: I76f5535f1cbdaf3fc1235cd824111d9afe8f7e1b
| -rw-r--r-- | plat/xilinx/versal/include/platform_def.h | 2 | ||||
| -rw-r--r-- | plat/xilinx/zynqmp/include/platform_def.h | 6 |
2 files changed, 4 insertions, 4 deletions
diff --git a/plat/xilinx/versal/include/platform_def.h b/plat/xilinx/versal/include/platform_def.h index 9f8392ce9..4cdaea219 100644 --- a/plat/xilinx/versal/include/platform_def.h +++ b/plat/xilinx/versal/include/platform_def.h @@ -17,7 +17,7 @@ /* Size of cacheable stacks */ #define PLATFORM_STACK_SIZE 0x440 -#define PLATFORM_CORE_COUNT 2 +#define PLATFORM_CORE_COUNT U(2) #define PLAT_MAX_PWR_LVL 1 #define PLAT_MAX_RET_STATE 1 #define PLAT_MAX_OFF_STATE 2 diff --git a/plat/xilinx/zynqmp/include/platform_def.h b/plat/xilinx/zynqmp/include/platform_def.h index 7b062fcaa..27968409e 100644 --- a/plat/xilinx/zynqmp/include/platform_def.h +++ b/plat/xilinx/zynqmp/include/platform_def.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2014-2018, ARM Limited and Contributors. All rights reserved. + * Copyright (c) 2014-2020, ARM Limited and Contributors. All rights reserved. * * SPDX-License-Identifier: BSD-3-Clause */ @@ -21,8 +21,8 @@ /* Size of cacheable stacks */ #define PLATFORM_STACK_SIZE 0x440 -#define PLATFORM_CORE_COUNT 4 -#define PLAT_NUM_POWER_DOMAINS 5 +#define PLATFORM_CORE_COUNT U(4) +#define PLAT_NUM_POWER_DOMAINS U(5) #define PLAT_MAX_PWR_LVL U(1) #define PLAT_MAX_RET_STATE U(1) #define PLAT_MAX_OFF_STATE U(2) |