diff options
| author | Sandrine Bailleux <sandrine.bailleux@arm.com> | 2021-02-09 14:47:12 +0000 |
|---|---|---|
| committer | TrustedFirmware Code Review <review@review.trustedfirmware.org> | 2021-02-09 14:47:12 +0000 |
| commit | bb9ecd0d532e9631b0d0a15001a1eb85b620507e (patch) | |
| tree | 15f3f98e40b7d7bd8c1e79a3f9cc6842503f4566 | |
| parent | 8098d54409719ee58c736b15c2bef7619fc199e8 (diff) | |
| parent | a97c390b9fa44b95e94f2f8b39897769fb1ac800 (diff) | |
| download | arm-trusted-firmware-bb9ecd0d532e9631b0d0a15001a1eb85b620507e.tar.gz | |
Merge "fdts: use scmi_dvfs clock index 1 for cores 4-7" into integration
| -rw-r--r-- | fdts/tc0.dts | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/fdts/tc0.dts b/fdts/tc0.dts index b17807aa1..2d7611cf2 100644 --- a/fdts/tc0.dts +++ b/fdts/tc0.dts @@ -119,7 +119,7 @@ compatible = "arm,armv8"; reg = <0x400>; enable-method = "psci"; - clocks = <&scmi_dvfs 0>; + clocks = <&scmi_dvfs 1>; cpu-idle-states = <&CPU_SLEEP_0 &CLUSTER_SLEEP_0>; }; @@ -128,7 +128,7 @@ compatible = "arm,armv8"; reg = <0x500>; enable-method = "psci"; - clocks = <&scmi_dvfs 0>; + clocks = <&scmi_dvfs 1>; cpu-idle-states = <&CPU_SLEEP_0 &CLUSTER_SLEEP_0>; }; @@ -137,7 +137,7 @@ compatible = "arm,armv8"; reg = <0x600>; enable-method = "psci"; - clocks = <&scmi_dvfs 0>; + clocks = <&scmi_dvfs 1>; cpu-idle-states = <&CPU_SLEEP_0 &CLUSTER_SLEEP_0>; }; @@ -146,7 +146,7 @@ compatible = "arm,armv8"; reg = <0x700>; enable-method = "psci"; - clocks = <&scmi_dvfs 0>; + clocks = <&scmi_dvfs 1>; cpu-idle-states = <&CPU_SLEEP_0 &CLUSTER_SLEEP_0>; }; |