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| author | Madhukar Pappireddy <madhukar.pappireddy@arm.com> | 2021-08-20 16:33:57 +0200 |
|---|---|---|
| committer | TrustedFirmware Code Review <review@review.trustedfirmware.org> | 2021-08-20 16:33:57 +0200 |
| commit | 15405fccae1f2a9f2a1cf9a466653144c9373209 (patch) | |
| tree | 055136cdb41fc309747d0e277c93046cfb7d42c3 | |
| parent | bd4b4b03c2cc8d05bb670ad80e277c48f2b2750e (diff) | |
| parent | 99080bd1273331007f0b2d6f64fed51ac6861bcd (diff) | |
| download | arm-trusted-firmware-15405fccae1f2a9f2a1cf9a466653144c9373209.tar.gz | |
Merge "fix(plat/st): apply security at the end of BL2" into integration
| -rw-r--r-- | plat/st/stm32mp1/bl2_plat_setup.c | 7 |
1 files changed, 5 insertions, 2 deletions
diff --git a/plat/st/stm32mp1/bl2_plat_setup.c b/plat/st/stm32mp1/bl2_plat_setup.c index 3e179fbbf..b4c42fc06 100644 --- a/plat/st/stm32mp1/bl2_plat_setup.c +++ b/plat/st/stm32mp1/bl2_plat_setup.c @@ -153,8 +153,6 @@ void bl2_platform_setup(void) #ifdef AARCH32_SP_OPTEE INFO("BL2 runs OP-TEE setup\n"); - /* Initialize tzc400 after DDR initialization */ - stm32mp1_security_setup(); #else INFO("BL2 runs SP_MIN setup\n"); #endif @@ -384,4 +382,9 @@ int bl2_plat_handle_post_image_load(unsigned int image_id) return err; } + +void bl2_el3_plat_prepare_exit(void) +{ + stm32mp1_security_setup(); +} #endif |