diff options
author | Konstantin Porotchkin <kostap@marvell.com> | 2020-07-26 17:49:54 +0300 |
---|---|---|
committer | Konstantin Porotchkin <kostap@marvell.com> | 2021-02-11 09:43:18 +0000 |
commit | 57660d9d794565f8f48194ba4ac85746f4f48736 (patch) | |
tree | cb911f5c068c5f206b4c32fa6eaf8cfe2e163bfe | |
parent | 6aa9f5d164e8f6e16a92f1dc1f8ced52307a7a3a (diff) | |
download | arm-trusted-firmware-57660d9d794565f8f48194ba4ac85746f4f48736.tar.gz |
plat/marvell/armada/a8k: support HW RNG by SMC
Add initialization for TRNG-IP-76 driver and support SMC call
0xC200FF11 used for reading HW RNG value by secondary bootloader
software for KASLR support.
Signed-off-by: Konstantin Porotchkin <kostap@marvell.com>
Change-Id: I1d644f67457b28d347523f8a7bfc4eacc45cba68
Reviewed-on: https://sj1git1.cavium.com/c/IP/SW/boot/atf/+/32688
Reviewed-by: Stefan Chulski <stefanc@marvell.com>
Reviewed-by: Ofer Heifetz <oferh@marvell.com>
-rw-r--r-- | drivers/marvell/mochi/cp110_setup.c | 23 | ||||
-rw-r--r-- | plat/marvell/armada/a8k/common/a8k_common.mk | 3 | ||||
-rw-r--r-- | plat/marvell/armada/common/mrvl_sip_svc.c | 9 |
3 files changed, 33 insertions, 2 deletions
diff --git a/drivers/marvell/mochi/cp110_setup.c b/drivers/marvell/mochi/cp110_setup.c index 0fa049764..b9d1ec39f 100644 --- a/drivers/marvell/mochi/cp110_setup.c +++ b/drivers/marvell/mochi/cp110_setup.c @@ -12,6 +12,7 @@ #include <drivers/marvell/amb_adec.h> #include <drivers/marvell/iob.h> #include <drivers/marvell/mochi/cp110_setup.h> +#include <drivers/rambus/trng_ip_76.h> #include <plat_marvell.h> @@ -105,6 +106,11 @@ #define MVEBU_RTC_READ_OUTPUT_DELAY_MASK 0xFFFF #define MVEBU_RTC_READ_OUTPUT_DELAY_DEFAULT 0x1F +/******************************************************************************* + * TRNG Configuration + ******************************************************************************/ +#define MVEBU_TRNG_BASE (0x760000) + enum axi_attr { AXI_ADUNIT_ATTR = 0, AXI_COMUNIT_ATTR, @@ -378,6 +384,20 @@ static void cp110_amb_adec_init(uintptr_t base) init_amb_adec(base); } +static void cp110_trng_init(uintptr_t base) +{ + static bool done; + int ret; + + if (!done) { + ret = eip76_rng_probe(base + MVEBU_TRNG_BASE); + if (ret != 0) { + ERROR("Failed to init TRNG @ 0x%lx\n", base); + return; + } + done = true; + } +} void cp110_init(uintptr_t cp110_base, uint32_t stream_id) { INFO("%s: Initialize CPx - base = %lx\n", __func__, cp110_base); @@ -405,6 +425,9 @@ void cp110_init(uintptr_t cp110_base, uint32_t stream_id) /* Reset RTC if needed */ cp110_rtc_init(cp110_base); + + /* TRNG init - for CP0 only */ + cp110_trng_init(cp110_base); } /* Do the minimal setup required to configure the CP in BLE */ diff --git a/plat/marvell/armada/a8k/common/a8k_common.mk b/plat/marvell/armada/a8k/common/a8k_common.mk index 63cfce22c..8a463eafe 100644 --- a/plat/marvell/armada/a8k/common/a8k_common.mk +++ b/plat/marvell/armada/a8k/common/a8k_common.mk @@ -114,7 +114,8 @@ MARVELL_DRV := $(MARVELL_DRV_BASE)/io_win.c \ $(MARVELL_DRV_BASE)/cache_llc.c \ $(MARVELL_DRV_BASE)/comphy/phy-comphy-cp110.c \ $(MARVELL_DRV_BASE)/mc_trustzone/mc_trustzone.c \ - $(MARVELL_DRV_BASE)/mg_conf_cm3/mg_conf_cm3.c + $(MARVELL_DRV_BASE)/mg_conf_cm3/mg_conf_cm3.c \ + drivers/rambus/trng_ip_76.c BL31_PORTING_SOURCES := $(BOARD_DIR)/board/marvell_plat_config.c diff --git a/plat/marvell/armada/common/mrvl_sip_svc.c b/plat/marvell/armada/common/mrvl_sip_svc.c index 0291024d7..64187fb48 100644 --- a/plat/marvell/armada/common/mrvl_sip_svc.c +++ b/plat/marvell/armada/common/mrvl_sip_svc.c @@ -9,6 +9,7 @@ #include <common/runtime_svc.h> #include <drivers/marvell/cache_llc.h> #include <drivers/marvell/mochi/ap_setup.h> +#include <drivers/rambus/trng_ip_76.h> #include <lib/smccc.h> #include <marvell_plat_priv.h> @@ -37,6 +38,9 @@ #define MV_SIP_PMU_IRQ_ENABLE 0x82000012 #define MV_SIP_PMU_IRQ_DISABLE 0x82000013 +/* TRNG */ +#define MV_SIP_RNG_64 0xC200FF11 + #define MAX_LANE_NR 6 #define MVEBU_COMPHY_OFFSET 0x441000 #define MVEBU_CP_BASE_MASK (~0xffffff) @@ -68,6 +72,7 @@ uintptr_t mrvl_sip_smc_handler(uint32_t smc_fid, u_register_t flags) { u_register_t ret; + uint32_t w2[2] = {0, 0}; int i; debug("%s: got SMC (0x%x) x1 0x%lx, x2 0x%lx, x3 0x%lx\n", @@ -131,7 +136,9 @@ uintptr_t mrvl_sip_smc_handler(uint32_t smc_fid, mvebu_pmu_interrupt_disable(); SMC_RET1(handle, 0); #endif - + case MV_SIP_RNG_64: + ret = eip76_rng_get_random((uint8_t *)&w2, 4 * (x1 % 2 + 1)); + SMC_RET3(handle, ret, w2[0], w2[1]); default: ERROR("%s: unhandled SMC (0x%x)\n", __func__, smc_fid); SMC_RET1(handle, SMC_UNK); |