diff options
| author | Madhukar Pappireddy <madhukar.pappireddy@arm.com> | 2019-12-18 15:56:27 -0600 |
|---|---|---|
| committer | Madhukar Pappireddy <madhukar.pappireddy@arm.com> | 2019-12-23 11:21:16 -0600 |
| commit | 83e955241aafb4bfac8f2b6db402d7bfc34a5167 (patch) | |
| tree | 35a44b43b9f5f73e43ec8040107ba63d419dfdf7 /docs | |
| parent | 86ed8953b5233570c49a58060d424b7863d3a396 (diff) | |
| download | arm-trusted-firmware-83e955241aafb4bfac8f2b6db402d7bfc34a5167.tar.gz | |
Workaround for Hercules erratum 1688305
Erratum 1688305 is a Cat B erratum present in r0p0, r0p1 versions
of Hercules core. The erratum can be avoided by setting bit 1 of the
implementation defined register CPUACTLR2_EL1 to 1 to prevent store-
release from being dispatched before it is the oldest.
Change-Id: I2ac04f5d9423868b6cdd4ceb3d0ffa46e570efed
Signed-off-by: Madhukar Pappireddy <madhukar.pappireddy@arm.com>
Diffstat (limited to 'docs')
| -rw-r--r-- | docs/design/cpu-specific-build-macros.rst | 6 |
1 files changed, 6 insertions, 0 deletions
diff --git a/docs/design/cpu-specific-build-macros.rst b/docs/design/cpu-specific-build-macros.rst index 891703bf0..7fa027f42 100644 --- a/docs/design/cpu-specific-build-macros.rst +++ b/docs/design/cpu-specific-build-macros.rst @@ -227,6 +227,12 @@ For Cortex-A76, the following errata build flags are defined : - ``ERRATA_A76_1275112``: This applies errata 1275112 workaround to Cortex-A76 CPU. This needs to be enabled only for revision <= r3p0 of the CPU. +For Hercules, the following errata build flags are defined : + +- ``ERRATA_HERCULES_1688305``: This applies errata 1688305 workaround to + Hercules CPU. This needs to be enabled only for revision r0p0 - r1p0 of + the CPU. + For Neoverse N1, the following errata build flags are defined : - ``ERRATA_N1_1073348``: This applies errata 1073348 workaround to Neoverse-N1 |