diff options
| author | Chandni Cherukuri <chandni.cherukuri@arm.com> | 2020-10-01 13:10:45 +0530 |
|---|---|---|
| committer | chandni cherukuri <chandni.cherukuri@arm.com> | 2020-10-02 10:35:25 +0000 |
| commit | 8445253e3ff0f17e04bb0dd8d0744548481cb795 (patch) | |
| tree | 1e726c0b1e50ba6ea9912311c3bfd9114390dd97 /docs | |
| parent | 6c07a9273b5e66d7234ecc52195f8eefbfe88205 (diff) | |
| download | arm-trusted-firmware-8445253e3ff0f17e04bb0dd8d0744548481cb795.tar.gz | |
morello: Add Morello platform documentation
Morello platform has a SCP which brings the primary Rainier CPU
out of reset which starts executing at BL31.
This patch provides documentation support for Morello platform.
Signed-off-by: Chandni Cherukuri <chandni.cherukuri@arm.com>
Change-Id: I38f596668e2b14862d543fabc04549ff34bfb8a2
Diffstat (limited to 'docs')
| -rw-r--r-- | docs/plat/arm/index.rst | 1 | ||||
| -rw-r--r-- | docs/plat/arm/morello/index.rst | 33 |
2 files changed, 34 insertions, 0 deletions
diff --git a/docs/plat/arm/index.rst b/docs/plat/arm/index.rst index 9c2fcb102..f72992b80 100644 --- a/docs/plat/arm/index.rst +++ b/docs/plat/arm/index.rst @@ -11,6 +11,7 @@ Arm Development Platforms tc0/index arm_fpga/index arm-build-options + morello/index This chapter holds documentation related to Arm's development platforms, including both software models (FVPs) and hardware development boards diff --git a/docs/plat/arm/morello/index.rst b/docs/plat/arm/morello/index.rst new file mode 100644 index 000000000..b18001cae --- /dev/null +++ b/docs/plat/arm/morello/index.rst @@ -0,0 +1,33 @@ +Morello Platform +================ + +Morello is an ARMv8-A platform that implements the capability architecture extension. +The platform port present at `site <https://git.trustedfirmware.org/TF-A/trusted-firmware-a.git>`_ +provides ARMv8-A architecture enablement. + +Capability architecture specific changes will be added `here <https://git.morello-project.org/morello>`_ + +Further information on Morello Platform is available at `info <https://developer.arm.com/architectures/cpu-architecture/a-profile/morello>`_ + +Boot Sequence +------------- + +The execution begins from SCP_BL1 which loads the SCP_BL2 and starts its +execution. SCP_BL2 powers up the AP which starts execution at AP_BL31. The AP +then continues executing and hands off execution to Non-secure world (UEFI). + +Build Procedure (TF-A only) +~~~~~~~~~~~~~~~~~~~~~~~~~~~ + +- Obtain arm `toolchain <https://developer.arm.com/tools-and-software/open-source-software/developer-tools/gnu-toolchain/gnu-a/downloads>`_. + Set the CROSS_COMPILE environment variable to point to the toolchain folder. + +- Build TF-A: + + .. code:: shell + + export CROSS_COMPILE=<path-to-aarch64-gcc>/bin/aarch64-none-elf- + + make PLAT=morello all + +*Copyright (c) 2020, Arm Limited. All rights reserved.* |