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| author | Android Build Coastguard Worker <android-build-coastguard-worker@google.com> | 2023-07-07 05:01:01 +0000 |
|---|---|---|
| committer | Android Build Coastguard Worker <android-build-coastguard-worker@google.com> | 2023-07-07 05:01:01 +0000 |
| commit | bda097d8fc4ca1ac3d6b28ba00a493cbb089502d (patch) | |
| tree | 2ce8a4e341ac9f98fb265347777487eda74eba48 /drivers/arm/gic/v3/gic600_multichip.c | |
| parent | 9fd1e09b2de3798cc1a98af3bddd5c5436a85091 (diff) | |
| parent | 138668cae2394deb5d695c70fe4aa9760c4458ee (diff) | |
| download | arm-trusted-firmware-bda097d8fc4ca1ac3d6b28ba00a493cbb089502d.tar.gz | |
Snap for 10453563 from 138668cae2394deb5d695c70fe4aa9760c4458ee to mainline-permission-releaseaml_per_341711000aml_per_341614000aml_per_341510010aml_per_341410020aml_per_341311000aml_per_341110020aml_per_341110010aml_per_341011100aml_per_341011020aml_per_340916010android14-mainline-permission-release
Change-Id: I4fca2def31d0e2c8d0f47b9877765e00815f92da
Diffstat (limited to 'drivers/arm/gic/v3/gic600_multichip.c')
| -rw-r--r-- | drivers/arm/gic/v3/gic600_multichip.c | 26 |
1 files changed, 20 insertions, 6 deletions
diff --git a/drivers/arm/gic/v3/gic600_multichip.c b/drivers/arm/gic/v3/gic600_multichip.c index ca7c43bf9..5f42ad994 100644 --- a/drivers/arm/gic/v3/gic600_multichip.c +++ b/drivers/arm/gic/v3/gic600_multichip.c @@ -11,14 +11,13 @@ #include <assert.h> #include <common/debug.h> +#include <drivers/arm/arm_gicv3_common.h> #include <drivers/arm/gic600_multichip.h> #include <drivers/arm/gicv3.h> #include "../common/gic_common_private.h" #include "gic600_multichip_private.h" -#warning "GIC-600 Multichip driver is currently experimental and the API may change in future." - /******************************************************************************* * GIC-600 multichip operation related helper functions ******************************************************************************/ @@ -73,6 +72,7 @@ static void set_gicd_chipr_n(uintptr_t base, unsigned int spi_id_max) { unsigned int spi_block_min, spi_blocks; + unsigned int gicd_iidr_val = gicd_read_iidr(base); uint64_t chipr_n_val; /* @@ -100,8 +100,24 @@ static void set_gicd_chipr_n(uintptr_t base, spi_block_min = SPI_BLOCK_MIN_VALUE(spi_id_min); spi_blocks = SPI_BLOCKS_VALUE(spi_id_min, spi_id_max); - chipr_n_val = (GICD_CHIPR_VALUE(chip_addr, spi_block_min, spi_blocks)) | - GICD_CHIPRx_SOCKET_STATE; + switch ((gicd_iidr_val & IIDR_MODEL_MASK)) { + case IIDR_MODEL_ARM_GIC_600: + chipr_n_val = GICD_CHIPR_VALUE_GIC_600(chip_addr, + spi_block_min, + spi_blocks); + break; + case IIDR_MODEL_ARM_GIC_700: + chipr_n_val = GICD_CHIPR_VALUE_GIC_700(chip_addr, + spi_block_min, + spi_blocks); + break; + default: + ERROR("Unsupported GIC model 0x%x for multichip setup.\n", + gicd_iidr_val); + panic(); + break; + } + chipr_n_val |= GICD_CHIPRx_SOCKET_STATE; /* * Wait for DCHIPR.PUP to be zero before commencing writes to @@ -194,8 +210,6 @@ void gic600_multichip_init(struct gic600_multichip_data *multichip_data) gic600_multichip_validate_data(multichip_data); - INFO("GIC-600 Multichip driver is experimental\n"); - /* * Ensure that G0/G1S/G1NS interrupts are disabled. This also ensures * that GIC-600 Multichip configuration is done first. |