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| author | Usama Arif <usama.arif@arm.com> | 2021-03-30 16:39:19 +0100 |
|---|---|---|
| committer | Nicola Mazzucato <nicola.mazzucato@arm.com> | 2021-04-14 12:13:26 +0100 |
| commit | 69f2ace106075699870ab2b404a420f18492a4cd (patch) | |
| tree | 21c2b0358b3382d06cff561c6e6f07bfcf6bbbee /fdts | |
| parent | 8078b5c5a0c2a47710df96412d88df53486e2b29 (diff) | |
| download | arm-trusted-firmware-69f2ace106075699870ab2b404a420f18492a4cd.tar.gz | |
tc0: update GICR base address
The number of ITS have changed from 4 to 1, resulting
in GICR base address change.
Signed-off-by: Usama Arif <usama.arif@arm.com>
Change-Id: I28101f0d1faf9f3c58591b642033c3fd49a275e7
Diffstat (limited to 'fdts')
| -rw-r--r-- | fdts/tc0.dts | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/fdts/tc0.dts b/fdts/tc0.dts index 2d7611cf2..382860d9d 100644 --- a/fdts/tc0.dts +++ b/fdts/tc0.dts @@ -1,5 +1,5 @@ /* - * Copyright (c) 2020, Arm Limited. All rights reserved. + * Copyright (c) 2020-2021, Arm Limited. All rights reserved. * * SPDX-License-Identifier: BSD-3-Clause */ @@ -236,7 +236,7 @@ ranges; interrupt-controller; reg = <0x0 0x30000000 0 0x10000>, /* GICD */ - <0x0 0x30140000 0 0x200000>; /* GICR */ + <0x0 0x30080000 0 0x200000>; /* GICR */ interrupts = <0x1 0x9 0x4>; }; |