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| author | Madhukar Pappireddy <madhukar.pappireddy@arm.com> | 2019-11-09 23:28:08 -0600 |
|---|---|---|
| committer | Madhukar Pappireddy <madhukar.pappireddy@arm.com> | 2019-11-26 12:56:30 -0600 |
| commit | e34cc0cedca6e229847c232fe58d37fad2610ce9 (patch) | |
| tree | 07a1398e798a731a5ca4b4113f357532c9ec8144 /include/arch | |
| parent | d537ee795c1390601428d6b5b3499d05b62ad271 (diff) | |
| download | arm-trusted-firmware-e34cc0cedca6e229847c232fe58d37fad2610ce9.tar.gz | |
Changes to support updated register usage in SMCCC v1.2
From AArch64 state, arguments are passed in registers W0-W7(X0-X7)
and results are returned in W0-W7(X0-X7) for SMC32(SMC64) calls.
From AArch32 state, arguments are passed in registers R0-R7 and
results are returned in registers R0-R7 for SMC32 calls.
Most of the functions and macros already existed to support using
upto 8 registers for passing/returning parameters/results. Added
few helper macros for SMC calls from AArch32 state.
Link to the specification:
https://developer.arm.com/docs/den0028/c
Change-Id: I87976b42454dc3fc45c8343e9640aa78210e9741
Signed-off-by: Madhukar Pappireddy <madhukar.pappireddy@arm.com>
Diffstat (limited to 'include/arch')
| -rw-r--r-- | include/arch/aarch32/smccc_helpers.h | 18 |
1 files changed, 17 insertions, 1 deletions
diff --git a/include/arch/aarch32/smccc_helpers.h b/include/arch/aarch32/smccc_helpers.h index b2ee3cfe0..2ce7874ef 100644 --- a/include/arch/aarch32/smccc_helpers.h +++ b/include/arch/aarch32/smccc_helpers.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2016-2018, ARM Limited and Contributors. All rights reserved. + * Copyright (c) 2016-2019, ARM Limited and Contributors. All rights reserved. * * SPDX-License-Identifier: BSD-3-Clause */ @@ -130,6 +130,22 @@ CASSERT(SMC_CTX_SIZE == sizeof(smc_ctx_t), assert_smc_ctx_size_mismatch); ((smc_ctx_t *)(_h))->r3 = (_r3); \ SMC_RET3(_h, (_r0), (_r1), (_r2)); \ } +#define SMC_RET5(_h, _r0, _r1, _r2, _r3, _r4) { \ + ((smc_ctx_t *)(_h))->r4 = (_r4); \ + SMC_RET4(_h, (_r0), (_r1), (_r2), (_r3)); \ +} +#define SMC_RET6(_h, _r0, _r1, _r2, _r3, _r4, _r5) { \ + ((smc_ctx_t *)(_h))->r5 = (_r5); \ + SMC_RET5(_h, (_r0), (_r1), (_r2), (_r3), (_r4)); \ +} +#define SMC_RET7(_h, _r0, _r1, _r2, _r3, _r4, _r5, _r6) { \ + ((smc_ctx_t *)(_h))->r6 = (_r6); \ + SMC_RET6(_h, (_r0), (_r1), (_r2), (_r3), (_r4), (_r5)); \ +} +#define SMC_RET8(_h, _r0, _r1, _r2, _r3, _r4, _r5, _r6, _r7) { \ + ((smc_ctx_t *)(_h))->r7 = (_r7); \ + SMC_RET7(_h, (_r0), (_r1), (_r2), (_r3), (_r4), (_r5), (_r6)); \ +} /* * Helper macro to retrieve the SMC parameters from smc_ctx_t. |