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| author | Andre Przywara <andre.przywara@arm.com> | 2020-09-07 14:53:58 +0100 |
|---|---|---|
| committer | Andre Przywara <andre.przywara@arm.com> | 2020-09-29 13:28:25 +0100 |
| commit | 79d89e3da078fa0e169a47bcc360c5e3308cdf42 (patch) | |
| tree | ca8c394b940db0c5db405f0d7b903bb517752af8 /include/drivers | |
| parent | e89b813129fca7276e23182d2c7ebbf774010d9d (diff) | |
| download | arm-trusted-firmware-79d89e3da078fa0e169a47bcc360c5e3308cdf42.tar.gz | |
drivers: arm: gicv3: Allow detecting number of cores
A GICv3 interrupt controller will be instantiated for a certain number
of cores. This will result in the respective number of GICR frames. The
last frame will have the "Last" bit set in its GICR_TYPER register.
For platforms with a topology unknown at build time (the Arm FPGAs, for
instance), we need to learn the number of used cores at runtime, to size
the GICR region in the devicetree accordingly.
Add a generic function that iterates over all GICR frames until it
encounters one with the "Last" bit set. It returns the number of cores
the GICv3 has been configured for.
Change-Id: I79f033c50dfc1c275aba7122725868811abcc4f8
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Diffstat (limited to 'include/drivers')
| -rw-r--r-- | include/drivers/arm/gicv3.h | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/include/drivers/arm/gicv3.h b/include/drivers/arm/gicv3.h index 18d5b73e2..d8ac4cb33 100644 --- a/include/drivers/arm/gicv3.h +++ b/include/drivers/arm/gicv3.h @@ -488,6 +488,7 @@ void gicv3_distif_init(void); void gicv3_rdistif_init(unsigned int proc_num); void gicv3_rdistif_on(unsigned int proc_num); void gicv3_rdistif_off(unsigned int proc_num); +unsigned int gicv3_rdistif_get_number_frames(const uintptr_t gicr_frame); void gicv3_cpuif_enable(unsigned int proc_num); void gicv3_cpuif_disable(unsigned int proc_num); unsigned int gicv3_get_pending_interrupt_type(void); |