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| author | Mark Dykes <mark.dykes@arm.com> | 2021-06-08 18:26:52 +0200 |
|---|---|---|
| committer | TrustedFirmware Code Review <review@review.trustedfirmware.org> | 2021-06-08 18:26:52 +0200 |
| commit | 66bf006e28d118a7f13cba94f181b68ecff4355c (patch) | |
| tree | 0134599b53320ddc53ed980c06637b07bfc94d8c /lib | |
| parent | 8055bbf7bb6d33694e3354992924fac0c9948c23 (diff) | |
| parent | 12f6c0649732a35a7ed45ba350a963f09a5710ca (diff) | |
| download | arm-trusted-firmware-66bf006e28d118a7f13cba94f181b68ecff4355c.tar.gz | |
Merge "fix(security): Set MDCR_EL3.MCCD bit" into integration
Diffstat (limited to 'lib')
| -rw-r--r-- | lib/el3_runtime/aarch64/context.S | 18 |
1 files changed, 10 insertions, 8 deletions
diff --git a/lib/el3_runtime/aarch64/context.S b/lib/el3_runtime/aarch64/context.S index 7daf30da1..0ec9ffd5d 100644 --- a/lib/el3_runtime/aarch64/context.S +++ b/lib/el3_runtime/aarch64/context.S @@ -697,13 +697,14 @@ func save_gp_pmcr_pauth_regs str x18, [sp, #CTX_GPREGS_OFFSET + CTX_GPREG_SP_EL0] /* ---------------------------------------------------------- - * Check if earlier initialization MDCR_EL3.SCCD to 1 failed, - * meaning that ARMv8-PMU is not implemented and PMCR_EL0 - * should be saved in non-secure context. + * Check if earlier initialization MDCR_EL3.SCCD/MCCD to 1 + * failed, meaning that FEAT_PMUv3p5/7 is not implemented and + * PMCR_EL0 should be saved in non-secure context. * ---------------------------------------------------------- */ + mov_imm x10, (MDCR_SCCD_BIT | MDCR_MCCD_BIT) mrs x9, mdcr_el3 - tst x9, #MDCR_SCCD_BIT + tst x9, x10 bne 1f /* Secure Cycle Counter is not disabled */ @@ -792,13 +793,14 @@ func restore_gp_pmcr_pauth_regs /* ---------------------------------------------------------- * Back to Non-secure state. - * Check if earlier initialization MDCR_EL3.SCCD to 1 failed, - * meaning that ARMv8-PMU is not implemented and PMCR_EL0 - * should be restored from non-secure context. + * Check if earlier initialization MDCR_EL3.SCCD/MCCD to 1 + * failed, meaning that FEAT_PMUv3p5/7 is not implemented and + * PMCR_EL0 should be restored from non-secure context. * ---------------------------------------------------------- */ + mov_imm x1, (MDCR_SCCD_BIT | MDCR_MCCD_BIT) mrs x0, mdcr_el3 - tst x0, #MDCR_SCCD_BIT + tst x0, x1 bne 2f ldr x0, [sp, #CTX_EL3STATE_OFFSET + CTX_PMCR_EL0] msr pmcr_el0, x0 |