diff options
| author | Alexei Fedorov <Alexei.Fedorov@arm.com> | 2020-12-01 13:22:25 +0000 |
|---|---|---|
| committer | Alexei Fedorov <Alexei.Fedorov@arm.com> | 2020-12-02 13:53:03 +0000 |
| commit | 0563ab08e892b899905193d4e482440eecd2d36a (patch) | |
| tree | eb2a91f643a4aa11787ea25e53ef79e1c1d606d0 /lib | |
| parent | 91cc872c64d5fdd300dde2bb16a626952b4654db (diff) | |
| download | arm-trusted-firmware-0563ab08e892b899905193d4e482440eecd2d36a.tar.gz | |
Aarch64: Add support for FEAT_MTE3
This patch provides the following changes:
- Adds definition for FEAT_MTE3 value in ID_AA64PFR1_EL1 register
- Enables Memory Tagging Extension for FEAT_MTE3.
Change-Id: I735988575466fdc083892ec12c1aee89b5faa472
Signed-off-by: Alexei Fedorov <Alexei.Fedorov@arm.com>
Diffstat (limited to 'lib')
| -rw-r--r-- | lib/el3_runtime/aarch64/context_mgmt.c | 31 |
1 files changed, 17 insertions, 14 deletions
diff --git a/lib/el3_runtime/aarch64/context_mgmt.c b/lib/el3_runtime/aarch64/context_mgmt.c index b460731e8..72d463b71 100644 --- a/lib/el3_runtime/aarch64/context_mgmt.c +++ b/lib/el3_runtime/aarch64/context_mgmt.c @@ -144,30 +144,33 @@ void cm_setup_context(cpu_context_t *ctx, const entry_point_info_t *ep) scr_el3 |= SCR_API_BIT | SCR_APK_BIT; #endif /* !CTX_INCLUDE_PAUTH_REGS */ +#if !CTX_INCLUDE_MTE_REGS || ENABLE_ASSERTIONS + /* Get Memory Tagging Extension support level */ + unsigned int mte = get_armv8_5_mte_support(); +#endif /* * Enable MTE support. Support is enabled unilaterally for the normal * world, and only for the secure world when CTX_INCLUDE_MTE_REGS is * set. */ #if CTX_INCLUDE_MTE_REGS - assert(get_armv8_5_mte_support() == MTE_IMPLEMENTED_ELX); + assert((mte == MTE_IMPLEMENTED_ELX) || (mte == MTE_IMPLEMENTED_ASY)); scr_el3 |= SCR_ATA_BIT; #else - unsigned int mte = get_armv8_5_mte_support(); - if (mte == MTE_IMPLEMENTED_EL0) { - /* - * Can enable MTE across both worlds as no MTE registers are - * used - */ - scr_el3 |= SCR_ATA_BIT; - } else if (mte == MTE_IMPLEMENTED_ELX && security_state == NON_SECURE) { - /* - * Can only enable MTE in Non-Secure world without register - * saving - */ + /* + * When MTE is only implemented at EL0, it can be enabled + * across both worlds as no MTE registers are used. + */ + if ((mte == MTE_IMPLEMENTED_EL0) || + /* + * When MTE is implemented at all ELs, it can be only enabled + * in Non-Secure world without register saving. + */ + (((mte == MTE_IMPLEMENTED_ELX) || (mte == MTE_IMPLEMENTED_ASY)) && + (security_state == NON_SECURE))) { scr_el3 |= SCR_ATA_BIT; } -#endif +#endif /* CTX_INCLUDE_MTE_REGS */ #ifdef IMAGE_BL31 /* |