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| author | Varun Wadekar <vwadekar@nvidia.com> | 2020-08-14 20:32:44 +0000 |
|---|---|---|
| committer | TrustedFirmware Code Review <review@review.trustedfirmware.org> | 2020-08-14 20:32:44 +0000 |
| commit | a409179e1afb85bacacc0fb3d956924c7cd6227e (patch) | |
| tree | e6b8ad786eea0a589d0407edbcb2f645d5a6e523 /lib | |
| parent | fe6a3d1a3380ac372de24306454dcb8e93545d43 (diff) | |
| parent | a4a9547c82b07465d736f25ebdea8b584112addb (diff) | |
| download | arm-trusted-firmware-a409179e1afb85bacacc0fb3d956924c7cd6227e.tar.gz | |
Merge "lib: cpus: denver: add some MIDR values" into integration
Diffstat (limited to 'lib')
| -rw-r--r-- | lib/cpus/aarch64/denver.S | 28 |
1 files changed, 28 insertions, 0 deletions
diff --git a/lib/cpus/aarch64/denver.S b/lib/cpus/aarch64/denver.S index bdca4c343..d662e7f89 100644 --- a/lib/cpus/aarch64/denver.S +++ b/lib/cpus/aarch64/denver.S @@ -387,3 +387,31 @@ declare_cpu_ops_wa denver, DENVER_MIDR_PN4, \ CPU_NO_EXTRA2_FUNC, \ denver_core_pwr_dwn, \ denver_cluster_pwr_dwn + +declare_cpu_ops_wa denver, DENVER_MIDR_PN5, \ + denver_reset_func, \ + check_errata_cve_2017_5715, \ + CPU_NO_EXTRA2_FUNC, \ + denver_core_pwr_dwn, \ + denver_cluster_pwr_dwn + +declare_cpu_ops_wa denver, DENVER_MIDR_PN6, \ + denver_reset_func, \ + check_errata_cve_2017_5715, \ + CPU_NO_EXTRA2_FUNC, \ + denver_core_pwr_dwn, \ + denver_cluster_pwr_dwn + +declare_cpu_ops_wa denver, DENVER_MIDR_PN7, \ + denver_reset_func, \ + check_errata_cve_2017_5715, \ + CPU_NO_EXTRA2_FUNC, \ + denver_core_pwr_dwn, \ + denver_cluster_pwr_dwn + +declare_cpu_ops_wa denver, DENVER_MIDR_PN8, \ + denver_reset_func, \ + check_errata_cve_2017_5715, \ + CPU_NO_EXTRA2_FUNC, \ + denver_core_pwr_dwn, \ + denver_cluster_pwr_dwn |