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| author | johpow01 <john.powell@arm.com> | 2021-07-08 14:14:00 -0500 |
|---|---|---|
| committer | johpow01 <john.powell@arm.com> | 2021-11-12 10:38:00 -0600 |
| commit | dc78e62d80e64bf4fe5d5bf4844a7bd1696b7c92 (patch) | |
| tree | 443e3060373aaccb2c65986f068b685673c3d496 /make_helpers | |
| parent | 2242773ddbd959677af69d9df3aba3fd1b0bb4e1 (diff) | |
| download | arm-trusted-firmware-dc78e62d80e64bf4fe5d5bf4844a7bd1696b7c92.tar.gz | |
feat(sme): enable SME functionality
This patch adds two new compile time options to enable SME in TF-A:
ENABLE_SME_FOR_NS and ENABLE_SME_FOR_SWD for use in non-secure and
secure worlds respectively. Setting ENABLE_SME_FOR_NS=1 will enable
SME for non-secure worlds and trap SME, SVE, and FPU/SIMD instructions
in secure context. Setting ENABLE_SME_FOR_SWD=1 will disable these
traps, but support for SME context management does not yet exist in
SPM so building with SPD=spmd will fail.
The existing ENABLE_SVE_FOR_NS and ENABLE_SVE_FOR_SWD options cannot
be used with SME as it is a superset of SVE and will enable SVE and
FPU/SIMD along with SME.
Signed-off-by: John Powell <john.powell@arm.com>
Change-Id: Iaaac9d22fe37b4a92315207891da848a8fd0ed73
Diffstat (limited to 'make_helpers')
| -rw-r--r-- | make_helpers/defaults.mk | 37 |
1 files changed, 20 insertions, 17 deletions
diff --git a/make_helpers/defaults.mk b/make_helpers/defaults.mk index 45f5fa87f..e88148f4e 100644 --- a/make_helpers/defaults.mk +++ b/make_helpers/defaults.mk @@ -134,7 +134,7 @@ ENABLE_BTI := 0 ENABLE_PAUTH := 0 # Flag to enable access to the HCRX_EL2 register by setting SCR_EL3.HXEn. -ENABLE_FEAT_HCX := 0 +ENABLE_FEAT_HCX := 0 # By default BL31 encryption disabled ENCRYPT_BL31 := 0 @@ -222,13 +222,13 @@ RESET_TO_BL31 := 0 SAVE_KEYS := 0 # Software Delegated Exception support -SDEI_SUPPORT := 0 +SDEI_SUPPORT := 0 # True Random Number firmware Interface -TRNG_SUPPORT := 0 +TRNG_SUPPORT := 0 # SMCCC PCI support -SMC_PCI_SUPPORT := 0 +SMC_PCI_SUPPORT := 0 # Whether code and read-only data should be put on separate memory pages. The # platform Makefile is free to override this value. @@ -303,7 +303,7 @@ ENABLE_SPE_FOR_LOWER_ELS := 1 # SPE is only supported on AArch64 so disable it on AArch32. ifeq (${ARCH},aarch32) - override ENABLE_SPE_FOR_LOWER_ELS := 0 + override ENABLE_SPE_FOR_LOWER_ELS := 0 endif # Include Memory Tagging Extension registers in cpu context. This must be set @@ -316,15 +316,18 @@ ENABLE_AMU_AUXILIARY_COUNTERS := 0 ENABLE_AMU_FCONF := 0 AMU_RESTRICT_COUNTERS := 0 -# By default, enable Scalable Vector Extension if implemented only for Non-secure -# lower ELs -# Note SVE is only supported on AArch64 - therefore do not enable in AArch32 -ifneq (${ARCH},aarch32) - ENABLE_SVE_FOR_NS := 1 - ENABLE_SVE_FOR_SWD := 0 -else - override ENABLE_SVE_FOR_NS := 0 - override ENABLE_SVE_FOR_SWD := 0 +# Enable SVE for non-secure world by default +ENABLE_SVE_FOR_NS := 1 +ENABLE_SVE_FOR_SWD := 0 + +# SME defaults to disabled +ENABLE_SME_FOR_NS := 0 +ENABLE_SME_FOR_SWD := 0 + +# If SME is enabled then force SVE off +ifeq (${ENABLE_SME_FOR_NS},1) + override ENABLE_SVE_FOR_NS := 0 + override ENABLE_SVE_FOR_SWD := 0 endif SANITIZE_UB := off @@ -348,7 +351,7 @@ CTX_INCLUDE_EL2_REGS := 0 SUPPORT_STACK_MEMTAG := no # Select workaround for AT speculative behaviour. -ERRATA_SPECULATIVE_AT := 0 +ERRATA_SPECULATIVE_AT := 0 # Trap RAS error record access from lower EL RAS_TRAP_LOWER_EL_ERR_ACCESS := 0 @@ -379,9 +382,9 @@ PSA_FWU_SUPPORT := 0 # Note FEAT_TRBE is only supported on AArch64 - therefore do not enable in # AArch32. ifneq (${ARCH},aarch32) - ENABLE_TRBE_FOR_NS := 0 + ENABLE_TRBE_FOR_NS := 0 else - override ENABLE_TRBE_FOR_NS := 0 + override ENABLE_TRBE_FOR_NS := 0 endif # By default, disable access of trace system registers from NS lower |