diff options
| author | Konstantin Porotchkin <kostap@marvell.com> | 2020-06-19 17:48:48 +0200 |
|---|---|---|
| committer | Marcin Wojtas <mw@semihalf.com> | 2020-06-19 18:02:28 +0200 |
| commit | 63a0b12794ca38d0bdf8982ae4009b78350c43e5 (patch) | |
| tree | 38050097fcba9917ce898b7e8106e4b987846313 /plat/marvell/armada/a8k/common | |
| parent | c96aa7fb3d9b306d50d71659a3c3d036ac9e3673 (diff) | |
| download | arm-trusted-firmware-63a0b12794ca38d0bdf8982ae4009b78350c43e5.tar.gz | |
plat: marvell: armada: platform definitions cleanup
- Remove
TRUSTED_DRAM_BASE
TRUSTED_DRAM_SIZE
MARVELL_TRUSTED_SRAM_BASE
- Rename
PLAT_MARVELL_TRUSTED_DRAM_* -> PLAT_MARVELL_TRUSTED_RAM_*
PLAT_MARVELL_TRUSTED_SRAM_* -> MARVELL_TRUSTED_DRAM_*
MARVELL_MAP_SHARED_RAM -> MARVELL_MAP_SECURE_RAM
- Move
MARVELL_TRUSTED_DRAM_SIZE to marvell_def.h
- Enable MARVELL_MAP_SECURE_RAM region in BL2U memory map
- Add dependency of MARVELL_MAP_SHARED_RAM on LLC_SRAM
- Add minor style improvents
Change-Id: Iebc03361e4f88489af1597f54e137b27c241814c
Signed-off-by: Konstantin Porotchkin <kostap@marvell.com>
[Improve patch after rebase]
Signed-off-by: Marcin Wojtas <mw@semihalf.com>
Diffstat (limited to 'plat/marvell/armada/a8k/common')
| -rw-r--r-- | plat/marvell/armada/a8k/common/aarch64/a8k_common.c | 8 | ||||
| -rw-r--r-- | plat/marvell/armada/a8k/common/include/platform_def.h | 15 |
2 files changed, 14 insertions, 9 deletions
diff --git a/plat/marvell/armada/a8k/common/aarch64/a8k_common.c b/plat/marvell/armada/a8k/common/aarch64/a8k_common.c index 7c2bf318f..a2e7402e6 100644 --- a/plat/marvell/armada/a8k/common/aarch64/a8k_common.c +++ b/plat/marvell/armada/a8k/common/aarch64/a8k_common.c @@ -18,14 +18,14 @@ */ #if IMAGE_BL1 const mmap_region_t plat_marvell_mmap[] = { - MARVELL_MAP_SHARED_RAM, + MARVELL_MAP_SECURE_RAM, MAP_DEVICE0, {0} }; #endif #if IMAGE_BL2 const mmap_region_t plat_marvell_mmap[] = { - MARVELL_MAP_SHARED_RAM, + MARVELL_MAP_SECURE_RAM, MAP_DEVICE0, MARVELL_MAP_DRAM, {0} @@ -34,6 +34,7 @@ const mmap_region_t plat_marvell_mmap[] = { #if IMAGE_BL2U const mmap_region_t plat_marvell_mmap[] = { + MARVELL_MAP_SECURE_RAM, MAP_DEVICE0, {0} }; @@ -48,7 +49,7 @@ const mmap_region_t plat_marvell_mmap[] = { #if IMAGE_BL31 const mmap_region_t plat_marvell_mmap[] = { - MARVELL_MAP_SHARED_RAM, + MARVELL_MAP_SECURE_RAM, MAP_DEVICE0, MARVELL_MAP_DRAM, {0} @@ -56,6 +57,7 @@ const mmap_region_t plat_marvell_mmap[] = { #endif #if IMAGE_BL32 const mmap_region_t plat_marvell_mmap[] = { + MARVELL_MAP_SECURE_RAM, MAP_DEVICE0, {0} }; diff --git a/plat/marvell/armada/a8k/common/include/platform_def.h b/plat/marvell/armada/a8k/common/include/platform_def.h index 06e781464..d0df06271 100644 --- a/plat/marvell/armada/a8k/common/include/platform_def.h +++ b/plat/marvell/armada/a8k/common/include/platform_def.h @@ -92,13 +92,16 @@ #define PLAT_MARVELL_CORE_COUNT (PLAT_MARVELL_CLUSTER_COUNT * \ PLAT_MARVELL_CLUSTER_CORE_COUNT) -/* DRAM[2MB..66MB] is used as Trusted ROM */ +/* Part of DRAM that is used as Trusted ROM */ #define PLAT_MARVELL_TRUSTED_ROM_BASE PLAT_MARVELL_ATF_LOAD_ADDR /* 64 MB TODO: reduce this to minimum needed according to fip image size */ #define PLAT_MARVELL_TRUSTED_ROM_SIZE 0x04000000 -/* Reserve 16M for SCP (Secure PayLoad) Trusted DRAM */ -#define PLAT_MARVELL_TRUSTED_DRAM_BASE 0x04400000 -#define PLAT_MARVELL_TRUSTED_DRAM_SIZE 0x01000000 /* 16 MB */ +/* Reserve 16M for SCP (Secure PayLoad) Trusted RAM */ +#define PLAT_MARVELL_TRUSTED_RAM_BASE 0x04400000 +#define PLAT_MARVELL_TRUSTED_RAM_SIZE 0x01000000 /* 16 MB DRAM */ + +#define PLAT_MARVELL_LLC_SRAM_BASE PLAT_MARVELL_TRUSTED_RAM_BASE +#define PLAT_MARVELL_LLC_SRAM_SIZE 0x00100000 /* 1 MB SRAM */ /* * PLAT_ARM_MAX_BL1_RW_SIZE is calculated using the current BL1 RW debug size @@ -182,8 +185,8 @@ /* Mailbox base address (note the lower memory space * is reserved for BLE data) */ -#define PLAT_MARVELL_MAILBOX_BASE (MARVELL_TRUSTED_SRAM_BASE \ - + 0x400) +#define PLAT_MARVELL_MAILBOX_BASE (MARVELL_SHARED_RAM_BASE \ + + 0x400) #define PLAT_MARVELL_MAILBOX_SIZE 0x100 #define PLAT_MARVELL_MAILBOX_MAGIC_NUM 0x6D72766C /* mrvl */ |