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authorlwpDarren <lwp513@qq.com>2021-08-18 00:54:19 +0800
committerlwp513 <lwp513@qq.com>2021-08-18 16:13:22 +0100
commit325716c97b7835b8d249f12c1461556bab8c53a0 (patch)
tree969908b808ad0b0d3d859a0c680a3f49786fe0e1 /plat/qemu
parent391828923fdd846ebc41745b72343b2a0b6a7204 (diff)
downloadarm-trusted-firmware-325716c97b7835b8d249f12c1461556bab8c53a0.tar.gz
fix(plat/qemu): (NS_DRAM0_BASE + NS_DRAM0_SIZE) ADDR overflow 32bit
after this commit: If15cf3b9d3e2e7876c40ce888f22e887893fe696 plat/qemu/common/qemu_pm.c:116: (entrypoint < (NS_DRAM0_BASE + NS_DRAM0_SIZE))) the above line (NS_DRAM0_BASE + NS_DRAM0_SIZE) = 0x100000000, which will overflow 32bit and cause ERROR SO add ULL to fix it tested on compiler: gcc version 10.2.1 20201103 (GNU Toolchain for the A-profile Architecture 10.2-2020.11 (arm-10.16)) Signed-off-by: Darren Liang <lwp513@qq.com> Change-Id: I1d769b0803142d37bd2968d765ab04a9c7c5c21a
Diffstat (limited to 'plat/qemu')
-rw-r--r--plat/qemu/qemu/include/platform_def.h4
1 files changed, 2 insertions, 2 deletions
diff --git a/plat/qemu/qemu/include/platform_def.h b/plat/qemu/qemu/include/platform_def.h
index 0891d809d..c02eff9a8 100644
--- a/plat/qemu/qemu/include/platform_def.h
+++ b/plat/qemu/qemu/include/platform_def.h
@@ -80,8 +80,8 @@
#define SEC_ROM_BASE 0x00000000
#define SEC_ROM_SIZE 0x00020000
-#define NS_DRAM0_BASE 0x40000000
-#define NS_DRAM0_SIZE 0xc0000000
+#define NS_DRAM0_BASE ULL(0x40000000)
+#define NS_DRAM0_SIZE ULL(0xc0000000)
#define SEC_SRAM_BASE 0x0e000000
#define SEC_SRAM_SIZE 0x00060000