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| author | Jorge Ramirez-Ortiz <jorge.ramirez.ortiz@gmail.com> | 2018-11-19 19:26:56 +0100 |
|---|---|---|
| committer | Jorge Ramirez-Ortiz <jorge.ramirez.ortiz@gmail.com> | 2018-11-20 10:45:55 +0100 |
| commit | 6e93392b7a761c43c1f4b5b564fe57c51d806388 (patch) | |
| tree | eaacf046f88c50a54287fe8bef1aaaf85cdb38da /plat/renesas | |
| parent | 119480f496569d8b0251c1a73551b2781ea3e979 (diff) | |
| download | arm-trusted-firmware-6e93392b7a761c43c1f4b5b564fe57c51d806388.tar.gz | |
rcar-gen3: control RPC hyper-flash access
RCAR_RPC_HYPERFLASH_LOCKED can be set to 0 as a build option if the
user needs to allow u-boot to reprogram the ATF firmware using a FIP
image (as a faster alternative of toggling numerous DIP switches on
the board and using ascii-xfer of srec files)
The code being controlled with this commit should only be re-enabled for
debugging (_never_ on a product release)
Signed-off-by: Jorge Ramirez-Ortiz <jorge.ramirez.ortiz@gmail.com>
Diffstat (limited to 'plat/renesas')
| -rw-r--r-- | plat/renesas/rcar/bl2_secure_setting.c | 10 | ||||
| -rw-r--r-- | plat/renesas/rcar/platform.mk | 7 |
2 files changed, 14 insertions, 3 deletions
diff --git a/plat/renesas/rcar/bl2_secure_setting.c b/plat/renesas/rcar/bl2_secure_setting.c index 35c658c0d..c0d49debc 100644 --- a/plat/renesas/rcar/bl2_secure_setting.c +++ b/plat/renesas/rcar/bl2_secure_setting.c @@ -66,7 +66,9 @@ static const struct { /* {SEC_SEL12, 0xFFFFFFFFU}, */ /* Bit22: RPC slave ports. */ /* 0: registers accessed from secure resource only. */ - /* {SEC_SEL13, 0xFFBFFFFFU},*/ +#if (RCAR_RPC_HYPERFLASH_LOCKED == 1) + {SEC_SEL13, 0xFFBFFFFFU}, +#endif /* Bit27: System Timer (SCMT) slave ports */ /* 0: registers accessed from secure resource only */ /* Bit26: System Watchdog Timer (SWDT) slave ports */ @@ -183,8 +185,10 @@ static const struct { /** Security group 1 attribute setting for slave ports 13 */ /* Bit22: RPC slave ports. */ /* SecurityGroup3 */ - /* {SEC_GRP0COND13, 0x00400000U}, */ - /* {SEC_GRP1COND13, 0x00400000U}, */ +#if (RCAR_RPC_HYPERFLASH_LOCKED == 1) + {SEC_GRP0COND13, 0x00400000U}, + {SEC_GRP1COND13, 0x00400000U}, +#endif /** Security group 0 attribute setting for slave ports 14 */ /** Security group 1 attribute setting for slave ports 14 */ /* Bit26: System Timer (SCMT) slave ports */ diff --git a/plat/renesas/rcar/platform.mk b/plat/renesas/rcar/platform.mk index 95b7902f0..f7d6216a8 100644 --- a/plat/renesas/rcar/platform.mk +++ b/plat/renesas/rcar/platform.mk @@ -137,6 +137,13 @@ else $(eval $(call add_define,RCAR_LSI)) endif +# lock RPC HYPERFLASH access by default +# unlock to repogram the ATF firmware from u-boot +ifndef RCAR_RPC_HYPERFLASH_LOCKED +RCAR_RPC_HYPERFLASH_LOCKED := 1 +endif +$(eval $(call add_define,RCAR_RPC_HYPERFLASH_LOCKED)) + # Process RCAR_SECURE_BOOT flag ifndef RCAR_SECURE_BOOT RCAR_SECURE_BOOT := 1 |