diff options
author | Antonio Nino Diaz <antonio.ninodiaz@arm.com> | 2019-01-28 14:35:40 +0000 |
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committer | Antonio Nino Diaz <antonio.ninodiaz@arm.com> | 2019-01-28 14:35:50 +0000 |
commit | d31dcdc5f6a39db01525d54f882ea34a5b924c2f (patch) | |
tree | d637f854e2ec1a095deb0b7e72b27837b7fb79cc /plat/rockchip/rk3328 | |
parent | e9b77791ab11b25391ef758d41a39584d14ff2e9 (diff) | |
download | arm-trusted-firmware-d31dcdc5f6a39db01525d54f882ea34a5b924c2f.tar.gz |
rockchip: Fix GICv2 interrupts
After the removal of deprecated interfaces in TF 2.0 the migration to
the new GIC driver interfaces was done incorrectly in rk3328 and rk3368:
2d6f1f01b141 ("rockchip: Migrate to new interfaces").
In the GICv2 driver it is mandated that all interrupts are Group 0
interrupts. This patch simply moves all Group 1 interrupts to Group 0.
Change-Id: I224c0135603eb5b81bd512976361500c0d129a91
Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
Diffstat (limited to 'plat/rockchip/rk3328')
-rw-r--r-- | plat/rockchip/rk3328/rk3328_def.h | 12 |
1 files changed, 5 insertions, 7 deletions
diff --git a/plat/rockchip/rk3328/rk3328_def.h b/plat/rockchip/rk3328/rk3328_def.h index 4704a72ed..0ce13ad12 100644 --- a/plat/rockchip/rk3328/rk3328_def.h +++ b/plat/rockchip/rk3328/rk3328_def.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2017, ARM Limited and Contributors. All rights reserved. + * Copyright (c) 2017-2019, ARM Limited and Contributors. All rights reserved. * * SPDX-License-Identifier: BSD-3-Clause */ @@ -131,15 +131,13 @@ #define RK_IRQ_SEC_SGI_7 15 /* - * Define a list of Group 1 Secure and Group 0 interrupts as per GICv3 - * terminology. On a GICv2 system or mode, the lists will be merged and treated - * as Group 0 interrupts. + * Define a list of Group 0 interrupts. */ -#define PLAT_RK_GICV2_G1S_IRQS \ +#define PLAT_RK_GICV2_G0_IRQS \ INTR_PROP_DESC(RK_IRQ_SEC_PHY_TIMER, GIC_HIGHEST_SEC_PRIORITY, \ - GICV2_INTR_GROUP1, GIC_INTR_CFG_LEVEL), \ + GICV2_INTR_GROUP0, GIC_INTR_CFG_LEVEL), \ INTR_PROP_DESC(RK_IRQ_SEC_SGI_6, GIC_HIGHEST_SEC_PRIORITY, \ - GICV2_INTR_GROUP1, GIC_INTR_CFG_LEVEL) + GICV2_INTR_GROUP0, GIC_INTR_CFG_LEVEL) #define SHARE_MEM_BASE 0x100000/* [1MB, 1MB+60K]*/ #define SHARE_MEM_PAGE_NUM 15 |