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author | Louis Mayencourt <louis.mayencourt@arm.com> | 2020-01-24 13:30:28 +0000 |
---|---|---|
committer | Louis Mayencourt <louis.mayencourt@arm.com> | 2020-01-28 11:10:48 +0000 |
commit | f1be00da0b0acf90355558e01d5f8e1f79c0d481 (patch) | |
tree | 17f863ee4f3f43cbeaa35e70e72e514774815642 /plat | |
parent | 262c5d30689403112568979dd6154849037fb122 (diff) | |
download | arm-trusted-firmware-f1be00da0b0acf90355558e01d5f8e1f79c0d481.tar.gz |
Use correct type when reading SCR register
The Secure Configuration Register is 64-bits in AArch64 and 32-bits in
AArch32. Use u_register_t instead of unsigned int to reflect this.
Change-Id: I51b69467baba36bf0cfaec2595dc8837b1566934
Signed-off-by: Louis Mayencourt <louis.mayencourt@arm.com>
Diffstat (limited to 'plat')
-rw-r--r-- | plat/arm/common/arm_common.c | 4 | ||||
-rw-r--r-- | plat/mediatek/mt8173/plat_pm.c | 4 | ||||
-rw-r--r-- | plat/mediatek/mt8183/plat_pm.c | 4 | ||||
-rw-r--r-- | plat/renesas/rcar/plat_pm.c | 4 | ||||
-rw-r--r-- | plat/rockchip/common/plat_pm.c | 4 | ||||
-rw-r--r-- | plat/socionext/synquacer/sq_psci.c | 4 | ||||
-rw-r--r-- | plat/ti/k3/common/k3_psci.c | 4 |
7 files changed, 14 insertions, 14 deletions
diff --git a/plat/arm/common/arm_common.c b/plat/arm/common/arm_common.c index 03d842a51..255e6b421 100644 --- a/plat/arm/common/arm_common.c +++ b/plat/arm/common/arm_common.c @@ -1,5 +1,5 @@ /* - * Copyright (c) 2015-2019, ARM Limited and Contributors. All rights reserved. + * Copyright (c) 2015-2020, ARM Limited and Contributors. All rights reserved. * * SPDX-License-Identifier: BSD-3-Clause */ @@ -173,7 +173,7 @@ unsigned int plat_get_syscnt_freq2(void) int plat_sdei_validate_entry_point(uintptr_t ep, unsigned int client_mode) { uint64_t par, pa; - uint32_t scr_el3; + u_register_t scr_el3; /* Doing Non-secure address translation requires SCR_EL3.NS set */ scr_el3 = read_scr_el3(); diff --git a/plat/mediatek/mt8173/plat_pm.c b/plat/mediatek/mt8173/plat_pm.c index c8d45993f..67f1c731b 100644 --- a/plat/mediatek/mt8173/plat_pm.c +++ b/plat/mediatek/mt8173/plat_pm.c @@ -1,5 +1,5 @@ /* - * Copyright (c) 2013-2015, ARM Limited and Contributors. All rights reserved. + * Copyright (c) 2013-2020, ARM Limited and Contributors. All rights reserved. * * SPDX-License-Identifier: BSD-3-Clause */ @@ -236,7 +236,7 @@ static void mt_platform_restore_context(unsigned long mpidr) static void plat_cpu_standby(plat_local_state_t cpu_state) { - unsigned int scr; + u_register_t scr; scr = read_scr_el3(); write_scr_el3(scr | SCR_IRQ_BIT); diff --git a/plat/mediatek/mt8183/plat_pm.c b/plat/mediatek/mt8183/plat_pm.c index 2358ec6c4..6094a17be 100644 --- a/plat/mediatek/mt8183/plat_pm.c +++ b/plat/mediatek/mt8183/plat_pm.c @@ -1,5 +1,5 @@ /* - * Copyright (c) 2019, MediaTek Inc. All rights reserved. + * Copyright (c) 2019-2020, MediaTek Inc. All rights reserved. * * SPDX-License-Identifier: BSD-3-Clause */ @@ -197,7 +197,7 @@ static void plat_cluster_pwron_common(uint64_t mpidr, int cluster) static void plat_cpu_standby(plat_local_state_t cpu_state) { - unsigned int scr; + u_register_t scr; scr = read_scr_el3(); write_scr_el3(scr | SCR_IRQ_BIT | SCR_FIQ_BIT); diff --git a/plat/renesas/rcar/plat_pm.c b/plat/renesas/rcar/plat_pm.c index e678da5dc..6fc47b95c 100644 --- a/plat/renesas/rcar/plat_pm.c +++ b/plat/renesas/rcar/plat_pm.c @@ -1,5 +1,5 @@ /* - * Copyright (c) 2015-2019, Renesas Electronics Corporation. All rights reserved. + * Copyright (c) 2015-2020, Renesas Electronics Corporation. All rights reserved. * * SPDX-License-Identifier: BSD-3-Clause */ @@ -56,7 +56,7 @@ static void rcar_program_mailbox(uint64_t mpidr, uint64_t address) static void rcar_cpu_standby(plat_local_state_t cpu_state) { - uint32_t scr_el3 = read_scr_el3(); + u_register_t scr_el3 = read_scr_el3(); write_scr_el3(scr_el3 | SCR_IRQ_BIT); dsb(); diff --git a/plat/rockchip/common/plat_pm.c b/plat/rockchip/common/plat_pm.c index c9563c9ed..69268870d 100644 --- a/plat/rockchip/common/plat_pm.c +++ b/plat/rockchip/common/plat_pm.c @@ -1,5 +1,5 @@ /* - * Copyright (c) 2013-2016, ARM Limited and Contributors. All rights reserved. + * Copyright (c) 2013-2020, ARM Limited and Contributors. All rights reserved. * * SPDX-License-Identifier: BSD-3-Clause */ @@ -182,7 +182,7 @@ void rockchip_get_sys_suspend_power_state(psci_power_state_t *req_state) ******************************************************************************/ void rockchip_cpu_standby(plat_local_state_t cpu_state) { - unsigned int scr; + u_register_t scr; assert(cpu_state == PLAT_MAX_RET_STATE); diff --git a/plat/socionext/synquacer/sq_psci.c b/plat/socionext/synquacer/sq_psci.c index 731b19a32..0c97fcf79 100644 --- a/plat/socionext/synquacer/sq_psci.c +++ b/plat/socionext/synquacer/sq_psci.c @@ -1,5 +1,5 @@ /* - * Copyright (c) 2018, ARM Limited and Contributors. All rights reserved. + * Copyright (c) 2018-2020, ARM Limited and Contributors. All rights reserved. * * SPDX-License-Identifier: BSD-3-Clause */ @@ -155,7 +155,7 @@ void __dead2 sq_system_reset(void) void sq_cpu_standby(plat_local_state_t cpu_state) { - unsigned int scr; + u_register_t scr; assert(cpu_state == SQ_LOCAL_STATE_RET); diff --git a/plat/ti/k3/common/k3_psci.c b/plat/ti/k3/common/k3_psci.c index de9cefe5b..58588b055 100644 --- a/plat/ti/k3/common/k3_psci.c +++ b/plat/ti/k3/common/k3_psci.c @@ -1,5 +1,5 @@ /* - * Copyright (c) 2017-2018, ARM Limited and Contributors. All rights reserved. + * Copyright (c) 2017-2020, ARM Limited and Contributors. All rights reserved. * * SPDX-License-Identifier: BSD-3-Clause */ @@ -21,7 +21,7 @@ uintptr_t k3_sec_entrypoint; static void k3_cpu_standby(plat_local_state_t cpu_state) { - unsigned int scr; + u_register_t scr; scr = read_scr_el3(); /* Enable the Non secure interrupt to wake the CPU */ |